71 	return i915->display.dmc.dmc;  in i915_to_dmc()
298 	struct intel_dmc *dmc = i915_to_dmc(i915);  in has_dmc_id_fw()  local
300 	return dmc && dmc->dmc_info[dmc_id].payload;  in has_dmc_id_fw()
521 			struct intel_dmc *dmc,  in dmc_mmiodata()  argument
525 			    dmc->dmc_info[dmc_id].mmioaddr[i],  in dmc_mmiodata()
526 			    dmc->dmc_info[dmc_id].mmiodata[i]))  in dmc_mmiodata()
532 		return dmc->dmc_info[dmc_id].mmiodata[i];  in dmc_mmiodata()
546 	struct intel_dmc *dmc = i915_to_dmc(i915);  in intel_dmc_load_program()  local
562 		for (i = 0; i < dmc->dmc_info[dmc_id].dmc_fw_size; i++) {  in intel_dmc_load_program()
564 					  DMC_PROGRAM(dmc->dmc_info[dmc_id].start_mmioaddr, i),  in intel_dmc_load_program()
565 					  dmc->dmc_info[dmc_id].payload[i]);  in intel_dmc_load_program()
572 		for (i = 0; i < dmc->dmc_info[dmc_id].mmio_count; i++) {  in intel_dmc_load_program()
573 			intel_de_write(i915, dmc->dmc_info[dmc_id].mmioaddr[i],  in intel_dmc_load_program()
574 				       dmc_mmiodata(i915, dmc, dmc_id, i));  in intel_dmc_load_program()
611 	struct intel_dmc *dmc = i915_to_dmc(i915);  in assert_dmc_loaded()  local
613 	drm_WARN_ONCE(&i915->drm, !dmc, "DMC not initialized\n");  in assert_dmc_loaded()
614 	drm_WARN_ONCE(&i915->drm, dmc &&  in assert_dmc_loaded()
615 		      !intel_de_read(i915, DMC_PROGRAM(dmc->dmc_info[DMC_FW_MAIN].start_mmioaddr, 0)),  in assert_dmc_loaded()
644 static void dmc_set_fw_offset(struct intel_dmc *dmc,  in dmc_set_fw_offset()  argument
650 	struct drm_i915_private *i915 = dmc->i915;  in dmc_set_fw_offset()
666 		if (dmc->dmc_info[dmc_id].present)  in dmc_set_fw_offset()
670 			dmc->dmc_info[dmc_id].present = true;  in dmc_set_fw_offset()
671 			dmc->dmc_info[dmc_id].dmc_offset = fw_info[i].offset;  in dmc_set_fw_offset()
676 static bool dmc_mmio_addr_sanity_check(struct intel_dmc *dmc,  in dmc_mmio_addr_sanity_check()  argument
680 	struct drm_i915_private *i915 = dmc->i915;  in dmc_mmio_addr_sanity_check()
709 static u32 parse_dmc_fw_header(struct intel_dmc *dmc,  in parse_dmc_fw_header()  argument
713 	struct drm_i915_private *i915 = dmc->i915;  in parse_dmc_fw_header()
714 	struct dmc_fw_info *dmc_info = &dmc->dmc_info[dmc_id];  in parse_dmc_fw_header()
778 	if (!dmc_mmio_addr_sanity_check(dmc, mmioaddr, mmio_count,  in parse_dmc_fw_header()
798 	if (payload_size > dmc->max_fw_size) {  in parse_dmc_fw_header()
819 parse_dmc_fw_package(struct intel_dmc *dmc,  in parse_dmc_fw_package()  argument
824 	struct drm_i915_private *i915 = dmc->i915;  in parse_dmc_fw_package()
862 	dmc_set_fw_offset(dmc, fw_info, num_entries, si,  in parse_dmc_fw_package()
874 static u32 parse_dmc_fw_css(struct intel_dmc *dmc,  in parse_dmc_fw_css()  argument
878 	struct drm_i915_private *i915 = dmc->i915;  in parse_dmc_fw_css()
893 	dmc->version = css_header->version;  in parse_dmc_fw_css()
898 static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)  in parse_dmc_fw()  argument
900 	struct drm_i915_private *i915 = dmc->i915;  in parse_dmc_fw()
915 	r = parse_dmc_fw_css(dmc, css_header, fw->size);  in parse_dmc_fw()
923 	r = parse_dmc_fw_package(dmc, package_header, si, fw->size - readcount);  in parse_dmc_fw()
930 		if (!dmc->dmc_info[dmc_id].present)  in parse_dmc_fw()
933 		offset = readcount + dmc->dmc_info[dmc_id].dmc_offset * 4;  in parse_dmc_fw()
940 		parse_dmc_fw_header(dmc, dmc_header, fw->size - offset, dmc_id);  in parse_dmc_fw()
946 	drm_WARN_ON(&i915->drm, i915->display.dmc.wakeref);  in intel_dmc_runtime_pm_get()
947 	i915->display.dmc.wakeref = intel_display_power_get(i915, POWER_DOMAIN_INIT);  in intel_dmc_runtime_pm_get()
953 		fetch_and_zero(&i915->display.dmc.wakeref);  in intel_dmc_runtime_pm_put()
968 	struct intel_dmc *dmc = container_of(work, typeof(*dmc), work);  in dmc_load_work_fn()  local
969 	struct drm_i915_private *i915 = dmc->i915;  in dmc_load_work_fn()
974 	err = request_firmware(&fw, dmc->fw_path, i915->drm.dev);  in dmc_load_work_fn()
980 				    dmc->fw_path, fallback_path);  in dmc_load_work_fn()
983 				dmc->fw_path = fallback_path;  in dmc_load_work_fn()
987 	parse_dmc_fw(dmc, fw);  in dmc_load_work_fn()
994 			 dmc->fw_path, DMC_VERSION_MAJOR(dmc->version),  in dmc_load_work_fn()
995 			 DMC_VERSION_MINOR(dmc->version));  in dmc_load_work_fn()
1000 			   dmc->fw_path);  in dmc_load_work_fn()
1017 	struct intel_dmc *dmc;  in intel_dmc_init()  local
1032 	dmc = kzalloc(sizeof(*dmc), GFP_KERNEL);  in intel_dmc_init()
1033 	if (!dmc)  in intel_dmc_init()
1036 	dmc->i915 = i915;  in intel_dmc_init()
1038 	INIT_WORK(&dmc->work, dmc_load_work_fn);  in intel_dmc_init()
1041 		dmc->fw_path = MTL_DMC_PATH;  in intel_dmc_init()
1042 		dmc->max_fw_size = XELPDP_DMC_MAX_FW_SIZE;  in intel_dmc_init()
1044 		dmc->fw_path = DG2_DMC_PATH;  in intel_dmc_init()
1045 		dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;  in intel_dmc_init()
1047 		dmc->fw_path = ADLP_DMC_PATH;  in intel_dmc_init()
1048 		dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;  in intel_dmc_init()
1050 		dmc->fw_path = ADLS_DMC_PATH;  in intel_dmc_init()
1051 		dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;  in intel_dmc_init()
1053 		dmc->fw_path = DG1_DMC_PATH;  in intel_dmc_init()
1054 		dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;  in intel_dmc_init()
1056 		dmc->fw_path = RKL_DMC_PATH;  in intel_dmc_init()
1057 		dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;  in intel_dmc_init()
1059 		dmc->fw_path = TGL_DMC_PATH;  in intel_dmc_init()
1060 		dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;  in intel_dmc_init()
1062 		dmc->fw_path = ICL_DMC_PATH;  in intel_dmc_init()
1063 		dmc->max_fw_size = ICL_DMC_MAX_FW_SIZE;  in intel_dmc_init()
1065 		dmc->fw_path = GLK_DMC_PATH;  in intel_dmc_init()
1066 		dmc->max_fw_size = GLK_DMC_MAX_FW_SIZE;  in intel_dmc_init()
1070 		dmc->fw_path = KBL_DMC_PATH;  in intel_dmc_init()
1071 		dmc->max_fw_size = KBL_DMC_MAX_FW_SIZE;  in intel_dmc_init()
1073 		dmc->fw_path = SKL_DMC_PATH;  in intel_dmc_init()
1074 		dmc->max_fw_size = SKL_DMC_MAX_FW_SIZE;  in intel_dmc_init()
1076 		dmc->fw_path = BXT_DMC_PATH;  in intel_dmc_init()
1077 		dmc->max_fw_size = BXT_DMC_MAX_FW_SIZE;  in intel_dmc_init()
1087 		dmc->fw_path = i915->params.dmc_firmware_path;  in intel_dmc_init()
1090 	if (!dmc->fw_path) {  in intel_dmc_init()
1096 	i915->display.dmc.dmc = dmc;  in intel_dmc_init()
1098 	drm_dbg_kms(&i915->drm, "Loading %s\n", dmc->fw_path);  in intel_dmc_init()
1099 	queue_work(i915->unordered_wq, &dmc->work);  in intel_dmc_init()
1104 	kfree(dmc);  in intel_dmc_init()
1117 	struct intel_dmc *dmc = i915_to_dmc(i915);  in intel_dmc_suspend()  local
1122 	if (dmc)  in intel_dmc_suspend()
1123 		flush_work(&dmc->work);  in intel_dmc_suspend()
1159 	struct intel_dmc *dmc = i915_to_dmc(i915);  in intel_dmc_fini()  local
1166 	drm_WARN_ON(&i915->drm, i915->display.dmc.wakeref);  in intel_dmc_fini()
1168 	if (dmc) {  in intel_dmc_fini()
1170 			kfree(dmc->dmc_info[dmc_id].payload);  in intel_dmc_fini()
1172 		kfree(dmc);  in intel_dmc_fini()
1173 		i915->display.dmc.dmc = NULL;  in intel_dmc_fini()
1180 	struct intel_dmc *dmc = i915_to_dmc(i915);  in intel_dmc_print_error_state()  local
1185 	i915_error_printf(m, "DMC initialized: %s\n", str_yes_no(dmc));  in intel_dmc_print_error_state()
1188 	if (dmc)  in intel_dmc_print_error_state()
1190 				  DMC_VERSION_MAJOR(dmc->version),  in intel_dmc_print_error_state()
1191 				  DMC_VERSION_MINOR(dmc->version));  in intel_dmc_print_error_state()
1197 	struct intel_dmc *dmc = i915_to_dmc(i915);  in intel_dmc_debugfs_status_show()  local
1206 	seq_printf(m, "DMC initialized: %s\n", str_yes_no(dmc));  in intel_dmc_debugfs_status_show()
1209 	seq_printf(m, "path: %s\n", dmc ? dmc->fw_path : "N/A");  in intel_dmc_debugfs_status_show()
1223 	seq_printf(m, "version: %d.%d\n", DMC_VERSION_MAJOR(dmc->version),  in intel_dmc_debugfs_status_show()
1224 		   DMC_VERSION_MINOR(dmc->version));  in intel_dmc_debugfs_status_show()
1253 		   intel_de_read(i915, DMC_PROGRAM(dmc->dmc_info[DMC_FW_MAIN].start_mmioaddr, 0)));  in intel_dmc_debugfs_status_show()