64 	struct imx8qxp_pc *pc;  member
76 static inline u32 imx8qxp_pc_read(struct imx8qxp_pc *pc, unsigned int offset)  in imx8qxp_pc_read()  argument
78 	return readl(pc->base + offset);  in imx8qxp_pc_read()
82 imx8qxp_pc_write(struct imx8qxp_pc *pc, unsigned int offset, u32 value)  in imx8qxp_pc_write()  argument
84 	writel(value, pc->base + offset);  in imx8qxp_pc_write()
88 imx8qxp_pc_write_set(struct imx8qxp_pc *pc, unsigned int offset, u32 value)  in imx8qxp_pc_write_set()  argument
90 	imx8qxp_pc_write(pc, offset + PC_REG_SET, value);  in imx8qxp_pc_write_set()
94 imx8qxp_pc_write_clr(struct imx8qxp_pc *pc, unsigned int offset, u32 value)  in imx8qxp_pc_write_clr()  argument
96 	imx8qxp_pc_write(pc, offset + PC_REG_CLR, value);  in imx8qxp_pc_write_clr()
114 	struct imx8qxp_pc *pc = ch->pc;  in imx8qxp_pc_bridge_attach()  local
117 		DRM_DEV_ERROR(pc->dev,  in imx8qxp_pc_bridge_attach()
123 		DRM_DEV_ERROR(pc->dev, "missing encoder\n");  in imx8qxp_pc_bridge_attach()
138 	struct imx8qxp_pc *pc = ch->pc;  in imx8qxp_pc_bridge_mode_set()  local
142 	ret = pm_runtime_get_sync(pc->dev);  in imx8qxp_pc_bridge_mode_set()
144 		DRM_DEV_ERROR(pc->dev,  in imx8qxp_pc_bridge_mode_set()
147 	ret = clk_prepare_enable(pc->clk_apb);  in imx8qxp_pc_bridge_mode_set()
149 		DRM_DEV_ERROR(pc->dev, "%s: failed to enable apb clock: %d\n",  in imx8qxp_pc_bridge_mode_set()
153 	imx8qxp_pc_write_clr(pc, PC_CTRL_REG,  in imx8qxp_pc_bridge_mode_set()
157 	imx8qxp_pc_write_clr(pc, PC_CTRL_REG,  in imx8qxp_pc_bridge_mode_set()
161 	imx8qxp_pc_write_set(pc, PC_CTRL_REG,  in imx8qxp_pc_bridge_mode_set()
165 	imx8qxp_pc_write_set(pc, PC_CTRL_REG, PC_VSYNC_MASK_ENABLE);  in imx8qxp_pc_bridge_mode_set()
168 	val = imx8qxp_pc_read(pc, PC_CTRL_REG);  in imx8qxp_pc_bridge_mode_set()
176 	imx8qxp_pc_write(pc, PC_CTRL_REG, val);  in imx8qxp_pc_bridge_mode_set()
179 	imx8qxp_pc_write_set(pc, PC_CTRL_REG, PC_DISP_BYPASS(ch->stream_id));  in imx8qxp_pc_bridge_mode_set()
181 	clk_disable_unprepare(pc->clk_apb);  in imx8qxp_pc_bridge_mode_set()
189 	struct imx8qxp_pc *pc = ch->pc;  in imx8qxp_pc_bridge_atomic_disable()  local
192 	ret = pm_runtime_put(pc->dev);  in imx8qxp_pc_bridge_atomic_disable()
194 		DRM_DEV_ERROR(pc->dev, "failed to put runtime PM: %d\n", ret);  in imx8qxp_pc_bridge_atomic_disable()
277 	struct imx8qxp_pc *pc;  in imx8qxp_pc_bridge_probe()  local
285 	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);  in imx8qxp_pc_bridge_probe()
286 	if (!pc)  in imx8qxp_pc_bridge_probe()
289 	pc->base = devm_platform_ioremap_resource(pdev, 0);  in imx8qxp_pc_bridge_probe()
290 	if (IS_ERR(pc->base))  in imx8qxp_pc_bridge_probe()
291 		return PTR_ERR(pc->base);  in imx8qxp_pc_bridge_probe()
293 	pc->dev = dev;  in imx8qxp_pc_bridge_probe()
295 	pc->clk_apb = devm_clk_get(dev, "apb");  in imx8qxp_pc_bridge_probe()
296 	if (IS_ERR(pc->clk_apb)) {  in imx8qxp_pc_bridge_probe()
297 		ret = PTR_ERR(pc->clk_apb);  in imx8qxp_pc_bridge_probe()
303 	platform_set_drvdata(pdev, pc);  in imx8qxp_pc_bridge_probe()
315 		ch = &pc->ch[i];  in imx8qxp_pc_bridge_probe()
316 		ch->pc = pc;  in imx8qxp_pc_bridge_probe()
353 	if (i == 1 && pc->ch[0].next_bridge)  in imx8qxp_pc_bridge_probe()
354 		drm_bridge_remove(&pc->ch[0].bridge);  in imx8qxp_pc_bridge_probe()
362 	struct imx8qxp_pc *pc = platform_get_drvdata(pdev);  in imx8qxp_pc_bridge_remove()  local
367 		ch = &pc->ch[i];  in imx8qxp_pc_bridge_remove()
382 	struct imx8qxp_pc *pc = platform_get_drvdata(pdev);  in imx8qxp_pc_runtime_suspend()  local
385 	ret = clk_prepare_enable(pc->clk_apb);  in imx8qxp_pc_runtime_suspend()
387 		DRM_DEV_ERROR(pc->dev, "%s: failed to enable apb clock: %d\n",  in imx8qxp_pc_runtime_suspend()
391 	imx8qxp_pc_write_clr(pc, PC_SW_RESET_REG, PC_FULL_RESET_N);  in imx8qxp_pc_runtime_suspend()
393 	clk_disable_unprepare(pc->clk_apb);  in imx8qxp_pc_runtime_suspend()
404 	struct imx8qxp_pc *pc = platform_get_drvdata(pdev);  in imx8qxp_pc_runtime_resume()  local
407 	ret = clk_prepare_enable(pc->clk_apb);  in imx8qxp_pc_runtime_resume()
409 		DRM_DEV_ERROR(pc->dev, "%s: failed to enable apb clock: %d\n",  in imx8qxp_pc_runtime_resume()
415 	imx8qxp_pc_write_set(pc, PC_SW_RESET_REG, PC_FULL_RESET_N);  in imx8qxp_pc_runtime_resume()
417 	clk_disable_unprepare(pc->clk_apb);  in imx8qxp_pc_runtime_resume()