Lines Matching refs:dp
26 void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool enable) in analogix_dp_enable_video_mute() argument
31 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
33 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
35 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
37 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
41 void analogix_dp_stop_video(struct analogix_dp_device *dp) in analogix_dp_stop_video() argument
45 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
47 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
50 void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable) in analogix_dp_lane_swap() argument
61 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_MAP); in analogix_dp_lane_swap()
64 void analogix_dp_init_analog_param(struct analogix_dp_device *dp) in analogix_dp_init_analog_param() argument
69 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_1); in analogix_dp_init_analog_param()
72 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2); in analogix_dp_init_analog_param()
74 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) { in analogix_dp_init_analog_param()
76 if (dp->plat_data->dev_type == RK3288_DP) in analogix_dp_init_analog_param()
79 writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1); in analogix_dp_init_analog_param()
80 writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2); in analogix_dp_init_analog_param()
81 writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3); in analogix_dp_init_analog_param()
82 writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4); in analogix_dp_init_analog_param()
83 writel(0x22, dp->reg_base + ANALOGIX_DP_PLL_REG_5); in analogix_dp_init_analog_param()
87 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_3); in analogix_dp_init_analog_param()
91 writel(reg, dp->reg_base + ANALOGIX_DP_PLL_FILTER_CTL_1); in analogix_dp_init_analog_param()
95 writel(reg, dp->reg_base + ANALOGIX_DP_TX_AMP_TUNING_CTL); in analogix_dp_init_analog_param()
98 void analogix_dp_init_interrupt(struct analogix_dp_device *dp) in analogix_dp_init_interrupt() argument
101 writel(INT_POL1 | INT_POL0, dp->reg_base + ANALOGIX_DP_INT_CTL); in analogix_dp_init_interrupt()
104 writel(0xff, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1); in analogix_dp_init_interrupt()
105 writel(0x4f, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_2); in analogix_dp_init_interrupt()
106 writel(0xe0, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_3); in analogix_dp_init_interrupt()
107 writel(0xe7, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4); in analogix_dp_init_interrupt()
108 writel(0x63, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_init_interrupt()
111 writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1); in analogix_dp_init_interrupt()
112 writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2); in analogix_dp_init_interrupt()
113 writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3); in analogix_dp_init_interrupt()
114 writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_init_interrupt()
115 writel(0x00, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_init_interrupt()
118 void analogix_dp_reset(struct analogix_dp_device *dp) in analogix_dp_reset() argument
122 analogix_dp_stop_video(dp); in analogix_dp_reset()
123 analogix_dp_enable_video_mute(dp, 0); in analogix_dp_reset()
125 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_reset()
133 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_reset()
138 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset()
142 analogix_dp_lane_swap(dp, 0); in analogix_dp_reset()
144 writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_reset()
145 writel(0x40, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_reset()
146 writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_reset()
147 writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_reset()
149 writel(0x0, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_reset()
150 writel(0x0, dp->reg_base + ANALOGIX_DP_HDCP_CTL); in analogix_dp_reset()
152 writel(0x5e, dp->reg_base + ANALOGIX_DP_HPD_DEGLITCH_L); in analogix_dp_reset()
153 writel(0x1a, dp->reg_base + ANALOGIX_DP_HPD_DEGLITCH_H); in analogix_dp_reset()
155 writel(0x10, dp->reg_base + ANALOGIX_DP_LINK_DEBUG_CTL); in analogix_dp_reset()
157 writel(0x0, dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset()
159 writel(0x0, dp->reg_base + ANALOGIX_DP_VIDEO_FIFO_THRD); in analogix_dp_reset()
160 writel(0x20, dp->reg_base + ANALOGIX_DP_AUDIO_MARGIN); in analogix_dp_reset()
162 writel(0x4, dp->reg_base + ANALOGIX_DP_M_VID_GEN_FILTER_TH); in analogix_dp_reset()
163 writel(0x2, dp->reg_base + ANALOGIX_DP_M_AUD_GEN_FILTER_TH); in analogix_dp_reset()
165 writel(0x00000101, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_reset()
168 void analogix_dp_swreset(struct analogix_dp_device *dp) in analogix_dp_swreset() argument
170 writel(RESET_DP_TX, dp->reg_base + ANALOGIX_DP_TX_SW_RESET); in analogix_dp_swreset()
173 void analogix_dp_config_interrupt(struct analogix_dp_device *dp) in analogix_dp_config_interrupt() argument
179 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1); in analogix_dp_config_interrupt()
182 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2); in analogix_dp_config_interrupt()
185 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3); in analogix_dp_config_interrupt()
188 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_config_interrupt()
191 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_config_interrupt()
194 void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp) in analogix_dp_mute_hpd_interrupt() argument
199 reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_mute_hpd_interrupt()
201 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_mute_hpd_interrupt()
203 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_mute_hpd_interrupt()
205 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_mute_hpd_interrupt()
208 void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp) in analogix_dp_unmute_hpd_interrupt() argument
214 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_unmute_hpd_interrupt()
217 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_unmute_hpd_interrupt()
220 enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp) in analogix_dp_get_pll_lock_status() argument
224 reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_get_pll_lock_status()
231 void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable) in analogix_dp_set_pll_power_down() argument
237 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) { in analogix_dp_set_pll_power_down()
242 reg = readl(dp->reg_base + pd_addr); in analogix_dp_set_pll_power_down()
247 writel(reg, dp->reg_base + pd_addr); in analogix_dp_set_pll_power_down()
250 void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp, in analogix_dp_set_analog_power_down() argument
258 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_set_analog_power_down()
263 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_set_analog_power_down()
268 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
273 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
277 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
283 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
287 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
293 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
297 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
303 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
307 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
313 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
321 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_set_analog_power_down()
326 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
332 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
333 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_set_analog_power_down()
339 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
342 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
345 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
348 writel(0x00, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
356 int analogix_dp_init_analog_func(struct analogix_dp_device *dp) in analogix_dp_init_analog_func() argument
361 analogix_dp_set_analog_power_down(dp, POWER_ALL, 0); in analogix_dp_init_analog_func()
364 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1); in analogix_dp_init_analog_func()
366 reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_init_analog_func()
368 writel(reg, dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_init_analog_func()
371 if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) { in analogix_dp_init_analog_func()
372 analogix_dp_set_pll_power_down(dp, 0); in analogix_dp_init_analog_func()
374 while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) { in analogix_dp_init_analog_func()
377 dev_err(dp->dev, "failed to get pll lock status\n"); in analogix_dp_init_analog_func()
385 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_analog_func()
388 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_analog_func()
392 void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp) in analogix_dp_clear_hotplug_interrupts() argument
396 if (dp->hpd_gpiod) in analogix_dp_clear_hotplug_interrupts()
400 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4); in analogix_dp_clear_hotplug_interrupts()
403 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_clear_hotplug_interrupts()
406 void analogix_dp_init_hpd(struct analogix_dp_device *dp) in analogix_dp_init_hpd() argument
410 if (dp->hpd_gpiod) in analogix_dp_init_hpd()
413 analogix_dp_clear_hotplug_interrupts(dp); in analogix_dp_init_hpd()
415 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_hpd()
417 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_hpd()
420 void analogix_dp_force_hpd(struct analogix_dp_device *dp) in analogix_dp_force_hpd() argument
424 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_force_hpd()
426 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_force_hpd()
429 enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp) in analogix_dp_get_irq_type() argument
433 if (dp->hpd_gpiod) { in analogix_dp_get_irq_type()
434 reg = gpiod_get_value(dp->hpd_gpiod); in analogix_dp_get_irq_type()
441 reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4); in analogix_dp_get_irq_type()
456 void analogix_dp_reset_aux(struct analogix_dp_device *dp) in analogix_dp_reset_aux() argument
461 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset_aux()
463 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset_aux()
466 void analogix_dp_init_aux(struct analogix_dp_device *dp) in analogix_dp_init_aux() argument
472 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_init_aux()
474 analogix_dp_set_analog_power_down(dp, AUX_BLOCK, true); in analogix_dp_init_aux()
476 analogix_dp_set_analog_power_down(dp, AUX_BLOCK, false); in analogix_dp_init_aux()
478 analogix_dp_reset_aux(dp); in analogix_dp_init_aux()
481 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_init_aux()
490 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL); in analogix_dp_init_aux()
494 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_DEFER_CTL); in analogix_dp_init_aux()
497 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_aux()
499 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_aux()
502 int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp) in analogix_dp_get_plug_in_status() argument
506 if (dp->hpd_gpiod) { in analogix_dp_get_plug_in_status()
507 if (gpiod_get_value(dp->hpd_gpiod)) in analogix_dp_get_plug_in_status()
510 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_get_plug_in_status()
518 void analogix_dp_enable_sw_function(struct analogix_dp_device *dp) in analogix_dp_enable_sw_function() argument
522 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_enable_sw_function()
524 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_enable_sw_function()
527 void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype) in analogix_dp_set_link_bandwidth() argument
533 writel(reg, dp->reg_base + ANALOGIX_DP_LINK_BW_SET); in analogix_dp_set_link_bandwidth()
536 void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype) in analogix_dp_get_link_bandwidth() argument
540 reg = readl(dp->reg_base + ANALOGIX_DP_LINK_BW_SET); in analogix_dp_get_link_bandwidth()
544 void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count) in analogix_dp_set_lane_count() argument
549 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET); in analogix_dp_set_lane_count()
552 void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count) in analogix_dp_get_lane_count() argument
556 reg = readl(dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET); in analogix_dp_get_lane_count()
560 void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp, in analogix_dp_enable_enhanced_mode() argument
566 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
568 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
570 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
572 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
576 void analogix_dp_set_training_pattern(struct analogix_dp_device *dp, in analogix_dp_set_training_pattern() argument
584 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
588 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
592 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
596 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
602 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
609 void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp, in analogix_dp_set_lane0_pre_emphasis() argument
614 reg = readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_pre_emphasis()
617 writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_pre_emphasis()
620 void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp, in analogix_dp_set_lane1_pre_emphasis() argument
625 reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_pre_emphasis()
628 writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_pre_emphasis()
631 void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp, in analogix_dp_set_lane2_pre_emphasis() argument
636 reg = readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_set_lane2_pre_emphasis()
639 writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_set_lane2_pre_emphasis()
642 void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp, in analogix_dp_set_lane3_pre_emphasis() argument
647 reg = readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_set_lane3_pre_emphasis()
650 writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_set_lane3_pre_emphasis()
653 void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp, in analogix_dp_set_lane0_link_training() argument
659 writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_link_training()
662 void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp, in analogix_dp_set_lane1_link_training() argument
668 writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_link_training()
671 void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp, in analogix_dp_set_lane2_link_training() argument
677 writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_set_lane2_link_training()
680 void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp, in analogix_dp_set_lane3_link_training() argument
686 writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_set_lane3_link_training()
689 u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp) in analogix_dp_get_lane0_link_training() argument
691 return readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_get_lane0_link_training()
694 u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp) in analogix_dp_get_lane1_link_training() argument
696 return readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_get_lane1_link_training()
699 u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp) in analogix_dp_get_lane2_link_training() argument
701 return readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_get_lane2_link_training()
704 u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp) in analogix_dp_get_lane3_link_training() argument
706 return readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_get_lane3_link_training()
709 void analogix_dp_reset_macro(struct analogix_dp_device *dp) in analogix_dp_reset_macro() argument
713 reg = readl(dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
715 writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
721 writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
724 void analogix_dp_init_video(struct analogix_dp_device *dp) in analogix_dp_init_video() argument
729 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1); in analogix_dp_init_video()
732 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_init_video()
735 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_init_video()
738 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_video()
741 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_8); in analogix_dp_init_video()
744 void analogix_dp_set_video_color_format(struct analogix_dp_device *dp) in analogix_dp_set_video_color_format() argument
749 reg = (dp->video_info.dynamic_range << IN_D_RANGE_SHIFT) | in analogix_dp_set_video_color_format()
750 (dp->video_info.color_depth << IN_BPC_SHIFT) | in analogix_dp_set_video_color_format()
751 (dp->video_info.color_space << IN_COLOR_F_SHIFT); in analogix_dp_set_video_color_format()
752 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_2); in analogix_dp_set_video_color_format()
755 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_set_video_color_format()
757 if (dp->video_info.ycbcr_coeff) in analogix_dp_set_video_color_format()
761 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_set_video_color_format()
764 int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp) in analogix_dp_is_slave_video_stream_clock_on() argument
768 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
769 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
771 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
774 dev_dbg(dp->dev, "Input stream clock not detected.\n"); in analogix_dp_is_slave_video_stream_clock_on()
778 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
779 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
781 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
782 dev_dbg(dp->dev, "wait SYS_CTL_2.\n"); in analogix_dp_is_slave_video_stream_clock_on()
785 dev_dbg(dp->dev, "Input stream clk is changing\n"); in analogix_dp_is_slave_video_stream_clock_on()
792 void analogix_dp_set_video_cr_mn(struct analogix_dp_device *dp, in analogix_dp_set_video_cr_mn() argument
799 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
801 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
803 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_0); in analogix_dp_set_video_cr_mn()
805 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_1); in analogix_dp_set_video_cr_mn()
807 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_2); in analogix_dp_set_video_cr_mn()
810 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_0); in analogix_dp_set_video_cr_mn()
812 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_1); in analogix_dp_set_video_cr_mn()
814 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_2); in analogix_dp_set_video_cr_mn()
816 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
818 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
820 writel(0x00, dp->reg_base + ANALOGIX_DP_N_VID_0); in analogix_dp_set_video_cr_mn()
821 writel(0x80, dp->reg_base + ANALOGIX_DP_N_VID_1); in analogix_dp_set_video_cr_mn()
822 writel(0x00, dp->reg_base + ANALOGIX_DP_N_VID_2); in analogix_dp_set_video_cr_mn()
826 void analogix_dp_set_video_timing_mode(struct analogix_dp_device *dp, u32 type) in analogix_dp_set_video_timing_mode() argument
831 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
833 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
835 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
837 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
841 void analogix_dp_enable_video_master(struct analogix_dp_device *dp, bool enable) in analogix_dp_enable_video_master() argument
846 reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
849 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
851 reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
854 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
858 void analogix_dp_start_video(struct analogix_dp_device *dp) in analogix_dp_start_video() argument
862 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_start_video()
864 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_start_video()
867 int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp) in analogix_dp_is_video_stream_on() argument
871 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
872 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
874 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
876 dev_dbg(dp->dev, "Input video stream is not detected.\n"); in analogix_dp_is_video_stream_on()
883 void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp) in analogix_dp_config_video_slave_mode() argument
887 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_config_video_slave_mode()
888 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) { in analogix_dp_config_video_slave_mode()
894 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_config_video_slave_mode()
896 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
898 reg |= (dp->video_info.interlaced << 2); in analogix_dp_config_video_slave_mode()
899 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
901 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
903 reg |= (dp->video_info.v_sync_polarity << 1); in analogix_dp_config_video_slave_mode()
904 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
906 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
908 reg |= (dp->video_info.h_sync_polarity << 0); in analogix_dp_config_video_slave_mode()
909 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
912 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_config_video_slave_mode()
915 void analogix_dp_enable_scrambling(struct analogix_dp_device *dp) in analogix_dp_enable_scrambling() argument
919 reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_enable_scrambling()
921 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_enable_scrambling()
924 void analogix_dp_disable_scrambling(struct analogix_dp_device *dp) in analogix_dp_disable_scrambling() argument
928 reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_disable_scrambling()
930 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_disable_scrambling()
933 void analogix_dp_enable_psr_crc(struct analogix_dp_device *dp) in analogix_dp_enable_psr_crc() argument
935 writel(PSR_VID_CRC_ENABLE, dp->reg_base + ANALOGIX_DP_CRC_CON); in analogix_dp_enable_psr_crc()
938 static ssize_t analogix_dp_get_psr_status(struct analogix_dp_device *dp) in analogix_dp_get_psr_status() argument
943 val = drm_dp_dpcd_readb(&dp->aux, DP_PSR_STATUS, &status); in analogix_dp_get_psr_status()
945 dev_err(dp->dev, "PSR_STATUS read failed ret=%zd", val); in analogix_dp_get_psr_status()
951 int analogix_dp_send_psr_spd(struct analogix_dp_device *dp, in analogix_dp_send_psr_spd() argument
959 val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_send_psr_spd()
961 writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_send_psr_spd()
965 dp->reg_base + ANALOGIX_DP_PSR_FRAME_UPDATE_CTRL); in analogix_dp_send_psr_spd()
968 writel(vsc->sdp_header.HB0, dp->reg_base + ANALOGIX_DP_SPD_HB0); in analogix_dp_send_psr_spd()
969 writel(vsc->sdp_header.HB1, dp->reg_base + ANALOGIX_DP_SPD_HB1); in analogix_dp_send_psr_spd()
970 writel(vsc->sdp_header.HB2, dp->reg_base + ANALOGIX_DP_SPD_HB2); in analogix_dp_send_psr_spd()
971 writel(vsc->sdp_header.HB3, dp->reg_base + ANALOGIX_DP_SPD_HB3); in analogix_dp_send_psr_spd()
974 writel(0x00, dp->reg_base + ANALOGIX_DP_SPD_PB0); in analogix_dp_send_psr_spd()
975 writel(0x16, dp->reg_base + ANALOGIX_DP_SPD_PB1); in analogix_dp_send_psr_spd()
976 writel(0xCE, dp->reg_base + ANALOGIX_DP_SPD_PB2); in analogix_dp_send_psr_spd()
977 writel(0x5D, dp->reg_base + ANALOGIX_DP_SPD_PB3); in analogix_dp_send_psr_spd()
980 writel(vsc->db[0], dp->reg_base + ANALOGIX_DP_VSC_SHADOW_DB0); in analogix_dp_send_psr_spd()
981 writel(vsc->db[1], dp->reg_base + ANALOGIX_DP_VSC_SHADOW_DB1); in analogix_dp_send_psr_spd()
984 val = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_send_psr_spd()
986 writel(val, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_send_psr_spd()
989 val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_send_psr_spd()
991 writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_send_psr_spd()
994 val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_send_psr_spd()
996 writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_send_psr_spd()
1010 ret = readx_poll_timeout(analogix_dp_get_psr_status, dp, psr_status, in analogix_dp_send_psr_spd()
1017 dev_warn(dp->dev, "Failed to apply PSR %d\n", ret); in analogix_dp_send_psr_spd()
1023 ssize_t analogix_dp_transfer(struct analogix_dp_device *dp, in analogix_dp_transfer() argument
1039 writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); in analogix_dp_transfer()
1067 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); in analogix_dp_transfer()
1071 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0); in analogix_dp_transfer()
1073 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8); in analogix_dp_transfer()
1075 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16); in analogix_dp_transfer()
1080 writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + in analogix_dp_transfer()
1093 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); in analogix_dp_transfer()
1095 ret = readx_poll_timeout(readl, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2, in analogix_dp_transfer()
1098 dev_err(dp->dev, "AUX CH enable timeout!\n"); in analogix_dp_transfer()
1104 ret = readx_poll_timeout(readl, dp->reg_base + ANALOGIX_DP_INT_STA, in analogix_dp_transfer()
1107 dev_err(dp->dev, "AUX CH cmd reply timeout!\n"); in analogix_dp_transfer()
1112 writel(RPLY_RECEIV, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_transfer()
1115 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_transfer()
1116 status_reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA); in analogix_dp_transfer()
1118 writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_transfer()
1120 dev_warn(dp->dev, "AUX CH error happened: %#x (%d)\n", in analogix_dp_transfer()
1127 reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + in analogix_dp_transfer()
1135 reg = readl(dp->reg_base + ANALOGIX_DP_AUX_RX_COMM); in analogix_dp_transfer()
1151 analogix_dp_init_aux(dp); in analogix_dp_transfer()