Lines Matching refs:sf
88 static void dump_block_header(struct seq_file *sf, void __iomem *reg) in dump_block_header() argument
94 seq_printf(sf, "BLOCK_INFO:\t\t0x%X\n", hdr.block_info); in dump_block_header()
95 seq_printf(sf, "PIPELINE_INFO:\t\t0x%X\n", hdr.pipeline_info); in dump_block_header()
101 seq_printf(sf, "VALID_INPUT_ID%u:\t0x%X\n", in dump_block_header()
105 seq_printf(sf, "OUTPUT_ID%u:\t\t0x%X\n", in dump_block_header()
286 static void d71_layer_dump(struct komeda_component *c, struct seq_file *sf) in d71_layer_dump() argument
303 dump_block_header(sf, c->reg); in d71_layer_dump()
305 seq_printf(sf, "%sLAYER_INFO:\t\t0x%X\n", prefix, v[14]); in d71_layer_dump()
308 seq_printf(sf, "%sCONTROL:\t\t0x%X\n", prefix, v[0]); in d71_layer_dump()
311 seq_printf(sf, "LR_RICH_CONTROL:\t0x%X\n", v[0]); in d71_layer_dump()
314 seq_printf(sf, "%sFORMAT:\t\t0x%X\n", prefix, v[0]); in d71_layer_dump()
315 seq_printf(sf, "%sIT_COEFFTAB:\t\t0x%X\n", prefix, v[1]); in d71_layer_dump()
316 seq_printf(sf, "%sIN_SIZE:\t\t0x%X\n", prefix, v[2]); in d71_layer_dump()
317 seq_printf(sf, "%sPALPHA:\t\t0x%X\n", prefix, v[3]); in d71_layer_dump()
320 seq_printf(sf, "%sP0_PTR_LOW:\t\t0x%X\n", prefix, v[0]); in d71_layer_dump()
321 seq_printf(sf, "%sP0_PTR_HIGH:\t\t0x%X\n", prefix, v[1]); in d71_layer_dump()
322 seq_printf(sf, "%sP0_STRIDE:\t\t0x%X\n", prefix, v[2]); in d71_layer_dump()
325 seq_printf(sf, "%sP1_PTR_LOW:\t\t0x%X\n", prefix, v[0]); in d71_layer_dump()
326 seq_printf(sf, "%sP1_PTR_HIGH:\t\t0x%X\n", prefix, v[1]); in d71_layer_dump()
329 seq_printf(sf, "LR_P1_STRIDE:\t\t0x%X\n", v[0]); in d71_layer_dump()
332 seq_printf(sf, "LR_P2_PTR_LOW:\t\t0x%X\n", v[0]); in d71_layer_dump()
333 seq_printf(sf, "LR_P2_PTR_HIGH:\t\t0x%X\n", v[1]); in d71_layer_dump()
337 seq_printf(sf, "LR_YUV_RGB_COEFF%u:\t0x%X\n", i, v[i]); in d71_layer_dump()
343 seq_printf(sf, "LS_RGB_RGB_COEFF%u:\t0x%X\n", i, v[i]); in d71_layer_dump()
347 seq_printf(sf, "%sAD_CONTROL:\t\t0x%X\n", prefix, v[0]); in d71_layer_dump()
348 seq_printf(sf, "%sAD_H_CROP:\t\t0x%X\n", prefix, v[1]); in d71_layer_dump()
349 seq_printf(sf, "%sAD_V_CROP:\t\t0x%X\n", prefix, v[2]); in d71_layer_dump()
484 static void d71_wb_layer_dump(struct komeda_component *c, struct seq_file *sf) in d71_wb_layer_dump() argument
488 dump_block_header(sf, c->reg); in d71_wb_layer_dump()
491 seq_printf(sf, "LW_INPUT_ID0:\t\t0x%X\n", v[0]); in d71_wb_layer_dump()
494 seq_printf(sf, "LW_CONTROL:\t\t0x%X\n", v[0]); in d71_wb_layer_dump()
495 seq_printf(sf, "LW_PROG_LINE:\t\t0x%X\n", v[1]); in d71_wb_layer_dump()
496 seq_printf(sf, "LW_FORMAT:\t\t0x%X\n", v[2]); in d71_wb_layer_dump()
499 seq_printf(sf, "LW_IN_SIZE:\t\t0x%X\n", v[0]); in d71_wb_layer_dump()
503 seq_printf(sf, "LW_P%u_PTR_LOW:\t\t0x%X\n", i, v[0]); in d71_wb_layer_dump()
504 seq_printf(sf, "LW_P%u_PTR_HIGH:\t\t0x%X\n", i, v[1]); in d71_wb_layer_dump()
505 seq_printf(sf, "LW_P%u_STRIDE:\t\t0x%X\n", i, v[2]); in d71_wb_layer_dump()
510 seq_printf(sf, "LW_RGB_YUV_COEFF%u:\t0x%X\n", i, v[i]); in d71_wb_layer_dump()
624 static void d71_compiz_dump(struct komeda_component *c, struct seq_file *sf) in d71_compiz_dump() argument
628 dump_block_header(sf, c->reg); in d71_compiz_dump()
632 seq_printf(sf, "CU_INPUT_ID%u:\t\t0x%X\n", i, v[i]); in d71_compiz_dump()
635 seq_printf(sf, "CU_IRQ_RAW_STATUS:\t0x%X\n", v[0]); in d71_compiz_dump()
636 seq_printf(sf, "CU_IRQ_CLEAR:\t\t0x%X\n", v[1]); in d71_compiz_dump()
637 seq_printf(sf, "CU_IRQ_MASK:\t\t0x%X\n", v[2]); in d71_compiz_dump()
638 seq_printf(sf, "CU_IRQ_STATUS:\t\t0x%X\n", v[3]); in d71_compiz_dump()
639 seq_printf(sf, "CU_STATUS:\t\t0x%X\n", v[4]); in d71_compiz_dump()
642 seq_printf(sf, "CU_CONTROL:\t\t0x%X\n", v[0]); in d71_compiz_dump()
643 seq_printf(sf, "CU_SIZE:\t\t0x%X\n", v[1]); in d71_compiz_dump()
646 seq_printf(sf, "CU_BG_COLOR:\t\t0x%X\n", v[0]); in d71_compiz_dump()
650 seq_printf(sf, "CU_INPUT%u_SIZE:\t\t0x%X\n", i, v[0]); in d71_compiz_dump()
651 seq_printf(sf, "CU_INPUT%u_OFFSET:\t0x%X\n", i, v[1]); in d71_compiz_dump()
652 seq_printf(sf, "CU_INPUT%u_CONTROL:\t0x%X\n", i, v[2]); in d71_compiz_dump()
656 seq_printf(sf, "CU_USER_LOW:\t\t0x%X\n", v[0]); in d71_compiz_dump()
657 seq_printf(sf, "CU_USER_HIGH:\t\t0x%X\n", v[1]); in d71_compiz_dump()
793 static void d71_scaler_dump(struct komeda_component *c, struct seq_file *sf) in d71_scaler_dump() argument
797 dump_block_header(sf, c->reg); in d71_scaler_dump()
800 seq_printf(sf, "SC_INPUT_ID0:\t\t0x%X\n", v[0]); in d71_scaler_dump()
803 seq_printf(sf, "SC_CONTROL:\t\t0x%X\n", v[0]); in d71_scaler_dump()
806 seq_printf(sf, "SC_COEFFTAB:\t\t0x%X\n", v[0]); in d71_scaler_dump()
807 seq_printf(sf, "SC_IN_SIZE:\t\t0x%X\n", v[1]); in d71_scaler_dump()
808 seq_printf(sf, "SC_OUT_SIZE:\t\t0x%X\n", v[2]); in d71_scaler_dump()
809 seq_printf(sf, "SC_H_CROP:\t\t0x%X\n", v[3]); in d71_scaler_dump()
810 seq_printf(sf, "SC_V_CROP:\t\t0x%X\n", v[4]); in d71_scaler_dump()
811 seq_printf(sf, "SC_H_INIT_PH:\t\t0x%X\n", v[5]); in d71_scaler_dump()
812 seq_printf(sf, "SC_H_DELTA_PH:\t\t0x%X\n", v[6]); in d71_scaler_dump()
813 seq_printf(sf, "SC_V_INIT_PH:\t\t0x%X\n", v[7]); in d71_scaler_dump()
814 seq_printf(sf, "SC_V_DELTA_PH:\t\t0x%X\n", v[8]); in d71_scaler_dump()
817 seq_printf(sf, "SC_ENH_LIMITS:\t\t0x%X\n", v[0]); in d71_scaler_dump()
818 seq_printf(sf, "SC_ENH_COEFF0:\t\t0x%X\n", v[1]); in d71_scaler_dump()
819 seq_printf(sf, "SC_ENH_COEFF1:\t\t0x%X\n", v[2]); in d71_scaler_dump()
820 seq_printf(sf, "SC_ENH_COEFF2:\t\t0x%X\n", v[3]); in d71_scaler_dump()
821 seq_printf(sf, "SC_ENH_COEFF3:\t\t0x%X\n", v[4]); in d71_scaler_dump()
822 seq_printf(sf, "SC_ENH_COEFF4:\t\t0x%X\n", v[5]); in d71_scaler_dump()
823 seq_printf(sf, "SC_ENH_COEFF5:\t\t0x%X\n", v[6]); in d71_scaler_dump()
824 seq_printf(sf, "SC_ENH_COEFF6:\t\t0x%X\n", v[7]); in d71_scaler_dump()
825 seq_printf(sf, "SC_ENH_COEFF7:\t\t0x%X\n", v[8]); in d71_scaler_dump()
826 seq_printf(sf, "SC_ENH_COEFF8:\t\t0x%X\n", v[9]); in d71_scaler_dump()
922 static void d71_splitter_dump(struct komeda_component *c, struct seq_file *sf) in d71_splitter_dump() argument
926 dump_block_header(sf, c->reg); in d71_splitter_dump()
929 seq_printf(sf, "SP_INPUT_ID0:\t\t0x%X\n", v[0]); in d71_splitter_dump()
932 seq_printf(sf, "SP_CONTROL:\t\t0x%X\n", v[0]); in d71_splitter_dump()
933 seq_printf(sf, "SP_SIZE:\t\t0x%X\n", v[1]); in d71_splitter_dump()
934 seq_printf(sf, "SP_OVERLAP_SIZE:\t0x%X\n", v[2]); in d71_splitter_dump()
988 static void d71_merger_dump(struct komeda_component *c, struct seq_file *sf) in d71_merger_dump() argument
992 dump_block_header(sf, c->reg); in d71_merger_dump()
995 seq_printf(sf, "MG_INPUT_ID0:\t\t0x%X\n", v); in d71_merger_dump()
998 seq_printf(sf, "MG_INPUT_ID1:\t\t0x%X\n", v); in d71_merger_dump()
1001 seq_printf(sf, "MG_CONTROL:\t\t0x%X\n", v); in d71_merger_dump()
1004 seq_printf(sf, "MG_SIZE:\t\t0x%X\n", v); in d71_merger_dump()
1091 static void d71_improc_dump(struct komeda_component *c, struct seq_file *sf) in d71_improc_dump() argument
1095 dump_block_header(sf, c->reg); in d71_improc_dump()
1098 seq_printf(sf, "IPS_INPUT_ID0:\t\t0x%X\n", v[0]); in d71_improc_dump()
1099 seq_printf(sf, "IPS_INPUT_ID1:\t\t0x%X\n", v[1]); in d71_improc_dump()
1102 seq_printf(sf, "IPS_INFO:\t\t0x%X\n", v[0]); in d71_improc_dump()
1105 seq_printf(sf, "IPS_CONTROL:\t\t0x%X\n", v[0]); in d71_improc_dump()
1106 seq_printf(sf, "IPS_SIZE:\t\t0x%X\n", v[1]); in d71_improc_dump()
1107 seq_printf(sf, "IPS_DEPTH:\t\t0x%X\n", v[2]); in d71_improc_dump()
1111 seq_printf(sf, "IPS_RGB_RGB_COEFF%u:\t0x%X\n", i, v[i]); in d71_improc_dump()
1115 seq_printf(sf, "IPS_RGB_YUV_COEFF%u:\t0x%X\n", i, v[i]); in d71_improc_dump()
1209 struct seq_file *sf) in d71_timing_ctrlr_dump() argument
1213 dump_block_header(sf, c->reg); in d71_timing_ctrlr_dump()
1216 seq_printf(sf, "BS_INFO:\t\t0x%X\n", v[0]); in d71_timing_ctrlr_dump()
1219 seq_printf(sf, "BS_CONTROL:\t\t0x%X\n", v[0]); in d71_timing_ctrlr_dump()
1220 seq_printf(sf, "BS_PROG_LINE:\t\t0x%X\n", v[1]); in d71_timing_ctrlr_dump()
1221 seq_printf(sf, "BS_PREFETCH_LINE:\t0x%X\n", v[2]); in d71_timing_ctrlr_dump()
1222 seq_printf(sf, "BS_BG_COLOR:\t\t0x%X\n", v[3]); in d71_timing_ctrlr_dump()
1223 seq_printf(sf, "BS_ACTIVESIZE:\t\t0x%X\n", v[4]); in d71_timing_ctrlr_dump()
1224 seq_printf(sf, "BS_HINTERVALS:\t\t0x%X\n", v[5]); in d71_timing_ctrlr_dump()
1225 seq_printf(sf, "BS_VINTERVALS:\t\t0x%X\n", v[6]); in d71_timing_ctrlr_dump()
1226 seq_printf(sf, "BS_SYNC:\t\t0x%X\n", v[7]); in d71_timing_ctrlr_dump()
1229 seq_printf(sf, "BS_DRIFT_TO:\t\t0x%X\n", v[0]); in d71_timing_ctrlr_dump()
1230 seq_printf(sf, "BS_FRAME_TO:\t\t0x%X\n", v[1]); in d71_timing_ctrlr_dump()
1231 seq_printf(sf, "BS_TE_TO:\t\t0x%X\n", v[2]); in d71_timing_ctrlr_dump()
1235 seq_printf(sf, "BS_T%u_INTERVAL:\t\t0x%X\n", i, v[i]); in d71_timing_ctrlr_dump()
1239 seq_printf(sf, "BS_CRC%u_LOW:\t\t0x%X\n", i, v[i << 1]); in d71_timing_ctrlr_dump()
1240 seq_printf(sf, "BS_CRC%u_HIGH:\t\t0x%X\n", i, v[(i << 1) + 1]); in d71_timing_ctrlr_dump()
1242 seq_printf(sf, "BS_USER:\t\t0x%X\n", v[4]); in d71_timing_ctrlr_dump()
1356 static void d71_gcu_dump(struct d71_dev *d71, struct seq_file *sf) in d71_gcu_dump() argument
1360 seq_puts(sf, "\n------ GCU ------\n"); in d71_gcu_dump()
1363 seq_printf(sf, "GLB_ARCH_ID:\t\t0x%X\n", v[0]); in d71_gcu_dump()
1364 seq_printf(sf, "GLB_CORE_ID:\t\t0x%X\n", v[1]); in d71_gcu_dump()
1365 seq_printf(sf, "GLB_CORE_INFO:\t\t0x%X\n", v[2]); in d71_gcu_dump()
1368 seq_printf(sf, "GLB_IRQ_STATUS:\t\t0x%X\n", v[0]); in d71_gcu_dump()
1371 seq_printf(sf, "GCU_IRQ_RAW_STATUS:\t0x%X\n", v[0]); in d71_gcu_dump()
1372 seq_printf(sf, "GCU_IRQ_CLEAR:\t\t0x%X\n", v[1]); in d71_gcu_dump()
1373 seq_printf(sf, "GCU_IRQ_MASK:\t\t0x%X\n", v[2]); in d71_gcu_dump()
1374 seq_printf(sf, "GCU_IRQ_STATUS:\t\t0x%X\n", v[3]); in d71_gcu_dump()
1375 seq_printf(sf, "GCU_STATUS:\t\t0x%X\n", v[4]); in d71_gcu_dump()
1378 seq_printf(sf, "GCU_CONTROL:\t\t0x%X\n", v[0]); in d71_gcu_dump()
1379 seq_printf(sf, "GCU_CONFIG_VALID0:\t0x%X\n", v[1]); in d71_gcu_dump()
1380 seq_printf(sf, "GCU_CONFIG_VALID1:\t0x%X\n", v[2]); in d71_gcu_dump()
1383 static void d71_lpu_dump(struct d71_pipeline *pipe, struct seq_file *sf) in d71_lpu_dump() argument
1387 seq_printf(sf, "\n------ LPU%d ------\n", pipe->base.id); in d71_lpu_dump()
1389 dump_block_header(sf, pipe->lpu_addr); in d71_lpu_dump()
1392 seq_printf(sf, "LPU_IRQ_RAW_STATUS:\t0x%X\n", v[0]); in d71_lpu_dump()
1393 seq_printf(sf, "LPU_IRQ_CLEAR:\t\t0x%X\n", v[1]); in d71_lpu_dump()
1394 seq_printf(sf, "LPU_IRQ_MASK:\t\t0x%X\n", v[2]); in d71_lpu_dump()
1395 seq_printf(sf, "LPU_IRQ_STATUS:\t\t0x%X\n", v[3]); in d71_lpu_dump()
1396 seq_printf(sf, "LPU_STATUS:\t\t0x%X\n", v[4]); in d71_lpu_dump()
1397 seq_printf(sf, "LPU_TBU_STATUS:\t\t0x%X\n", v[5]); in d71_lpu_dump()
1400 seq_printf(sf, "LPU_INFO:\t\t0x%X\n", v[0]); in d71_lpu_dump()
1403 seq_printf(sf, "LPU_RAXI_CONTROL:\t0x%X\n", v[0]); in d71_lpu_dump()
1404 seq_printf(sf, "LPU_WAXI_CONTROL:\t0x%X\n", v[1]); in d71_lpu_dump()
1405 seq_printf(sf, "LPU_TBU_CONTROL:\t0x%X\n", v[2]); in d71_lpu_dump()
1408 static void d71_dou_dump(struct d71_pipeline *pipe, struct seq_file *sf) in d71_dou_dump() argument
1412 seq_printf(sf, "\n------ DOU%d ------\n", pipe->base.id); in d71_dou_dump()
1414 dump_block_header(sf, pipe->dou_addr); in d71_dou_dump()
1417 seq_printf(sf, "DOU_IRQ_RAW_STATUS:\t0x%X\n", v[0]); in d71_dou_dump()
1418 seq_printf(sf, "DOU_IRQ_CLEAR:\t\t0x%X\n", v[1]); in d71_dou_dump()
1419 seq_printf(sf, "DOU_IRQ_MASK:\t\t0x%X\n", v[2]); in d71_dou_dump()
1420 seq_printf(sf, "DOU_IRQ_STATUS:\t\t0x%X\n", v[3]); in d71_dou_dump()
1421 seq_printf(sf, "DOU_STATUS:\t\t0x%X\n", v[4]); in d71_dou_dump()
1424 static void d71_pipeline_dump(struct komeda_pipeline *pipe, struct seq_file *sf) in d71_pipeline_dump() argument
1428 d71_lpu_dump(d71_pipe, sf); in d71_pipeline_dump()
1429 d71_dou_dump(d71_pipe, sf); in d71_pipeline_dump()
1437 void d71_dump(struct komeda_dev *mdev, struct seq_file *sf) in d71_dump() argument
1441 d71_gcu_dump(d71, sf); in d71_dump()