Lines Matching refs:pm
127 if (rps == adev->pm.dpm.current_ps) in amdgpu_dpm_print_ps_status()
129 if (rps == adev->pm.dpm.requested_ps) in amdgpu_dpm_print_ps_status()
131 if (rps == adev->pm.dpm.boot_ps) in amdgpu_dpm_print_ps_status()
143 for (i = 0; i < adev->pm.dpm.num_ps; i++) in amdgpu_pm_print_power_states()
144 amdgpu_dpm_print_power_state(adev, &adev->pm.dpm.ps[i]); in amdgpu_pm_print_power_states()
172 adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); in amdgpu_get_platform_caps()
173 adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); in amdgpu_get_platform_caps()
174 adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); in amdgpu_get_platform_caps()
242 adev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst; in amdgpu_parse_extended_power_table()
243 adev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin); in amdgpu_parse_extended_power_table()
244 adev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed); in amdgpu_parse_extended_power_table()
245 adev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh); in amdgpu_parse_extended_power_table()
246 adev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin); in amdgpu_parse_extended_power_table()
247 adev->pm.dpm.fan.pwm_med = le16_to_cpu(fan_info->fan.usPWMMed); in amdgpu_parse_extended_power_table()
248 adev->pm.dpm.fan.pwm_high = le16_to_cpu(fan_info->fan.usPWMHigh); in amdgpu_parse_extended_power_table()
250 adev->pm.dpm.fan.t_max = le16_to_cpu(fan_info->fan2.usTMax); in amdgpu_parse_extended_power_table()
252 adev->pm.dpm.fan.t_max = 10900; in amdgpu_parse_extended_power_table()
253 adev->pm.dpm.fan.cycle_delay = 100000; in amdgpu_parse_extended_power_table()
255 adev->pm.dpm.fan.control_mode = fan_info->fan3.ucFanControlMode; in amdgpu_parse_extended_power_table()
256 adev->pm.dpm.fan.default_max_fan_pwm = in amdgpu_parse_extended_power_table()
258 adev->pm.dpm.fan.default_fan_output_sensitivity = 4836; in amdgpu_parse_extended_power_table()
259 adev->pm.dpm.fan.fan_output_sensitivity = in amdgpu_parse_extended_power_table()
262 adev->pm.dpm.fan.ucode_fan_control = true; in amdgpu_parse_extended_power_table()
273 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in amdgpu_parse_extended_power_table()
282 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in amdgpu_parse_extended_power_table()
291 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in amdgpu_parse_extended_power_table()
300 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.mvdd_dependency_on_mclk, in amdgpu_parse_extended_power_table()
311 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk = in amdgpu_parse_extended_power_table()
314 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk = in amdgpu_parse_extended_power_table()
317 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc = in amdgpu_parse_extended_power_table()
319 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci = in amdgpu_parse_extended_power_table()
330 adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries = in amdgpu_parse_extended_power_table()
334 if (!adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) in amdgpu_parse_extended_power_table()
339 adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].sclk = in amdgpu_parse_extended_power_table()
341 adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk = in amdgpu_parse_extended_power_table()
343 adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage = in amdgpu_parse_extended_power_table()
348 adev->pm.dpm.dyn_state.phase_shedding_limits_table.count = in amdgpu_parse_extended_power_table()
356 adev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit); in amdgpu_parse_extended_power_table()
357 adev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit); in amdgpu_parse_extended_power_table()
358 adev->pm.dpm.near_tdp_limit_adjusted = adev->pm.dpm.near_tdp_limit; in amdgpu_parse_extended_power_table()
359 adev->pm.dpm.tdp_od_limit = le16_to_cpu(power_info->pplib5.usTDPODLimit); in amdgpu_parse_extended_power_table()
360 if (adev->pm.dpm.tdp_od_limit) in amdgpu_parse_extended_power_table()
361 adev->pm.dpm.power_control = true; in amdgpu_parse_extended_power_table()
363 adev->pm.dpm.power_control = false; in amdgpu_parse_extended_power_table()
364 adev->pm.dpm.tdp_adjustment = 0; in amdgpu_parse_extended_power_table()
365 adev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold); in amdgpu_parse_extended_power_table()
366 adev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage); in amdgpu_parse_extended_power_table()
367 adev->pm.dpm.load_line_slope = le16_to_cpu(power_info->pplib5.usLoadLineSlope); in amdgpu_parse_extended_power_table()
375 adev->pm.dpm.dyn_state.cac_leakage_table.entries = kzalloc(size, GFP_KERNEL); in amdgpu_parse_extended_power_table()
376 if (!adev->pm.dpm.dyn_state.cac_leakage_table.entries) in amdgpu_parse_extended_power_table()
380 if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) { in amdgpu_parse_extended_power_table()
381 adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1 = in amdgpu_parse_extended_power_table()
383 adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2 = in amdgpu_parse_extended_power_table()
385 adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3 = in amdgpu_parse_extended_power_table()
388 adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc = in amdgpu_parse_extended_power_table()
390 adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage = in amdgpu_parse_extended_power_table()
396 adev->pm.dpm.dyn_state.cac_leakage_table.count = cac_table->ucNumEntries; in amdgpu_parse_extended_power_table()
427 adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries = in amdgpu_parse_extended_power_table()
429 if (!adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries) in amdgpu_parse_extended_power_table()
431 adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count = in amdgpu_parse_extended_power_table()
439 adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk = in amdgpu_parse_extended_power_table()
441 adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk = in amdgpu_parse_extended_power_table()
443 adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v = in amdgpu_parse_extended_power_table()
448 adev->pm.dpm.num_of_vce_states = in amdgpu_parse_extended_power_table()
451 for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) { in amdgpu_parse_extended_power_table()
455 adev->pm.dpm.vce_states[i].evclk = in amdgpu_parse_extended_power_table()
457 adev->pm.dpm.vce_states[i].ecclk = in amdgpu_parse_extended_power_table()
459 adev->pm.dpm.vce_states[i].clk_idx = in amdgpu_parse_extended_power_table()
461 adev->pm.dpm.vce_states[i].pstate = in amdgpu_parse_extended_power_table()
480 adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries = in amdgpu_parse_extended_power_table()
482 if (!adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries) in amdgpu_parse_extended_power_table()
484 adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count = in amdgpu_parse_extended_power_table()
491 adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].vclk = in amdgpu_parse_extended_power_table()
493 adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].dclk = in amdgpu_parse_extended_power_table()
495 adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v = in amdgpu_parse_extended_power_table()
510 adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries = in amdgpu_parse_extended_power_table()
512 if (!adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries) in amdgpu_parse_extended_power_table()
514 adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count = in amdgpu_parse_extended_power_table()
518 adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].clk = in amdgpu_parse_extended_power_table()
520 adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v = in amdgpu_parse_extended_power_table()
531 adev->pm.dpm.dyn_state.ppm_table = in amdgpu_parse_extended_power_table()
533 if (!adev->pm.dpm.dyn_state.ppm_table) in amdgpu_parse_extended_power_table()
535 adev->pm.dpm.dyn_state.ppm_table->ppm_design = ppm->ucPpmDesign; in amdgpu_parse_extended_power_table()
536 adev->pm.dpm.dyn_state.ppm_table->cpu_core_number = in amdgpu_parse_extended_power_table()
538 adev->pm.dpm.dyn_state.ppm_table->platform_tdp = in amdgpu_parse_extended_power_table()
540 adev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdp = in amdgpu_parse_extended_power_table()
542 adev->pm.dpm.dyn_state.ppm_table->platform_tdc = in amdgpu_parse_extended_power_table()
544 adev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdc = in amdgpu_parse_extended_power_table()
546 adev->pm.dpm.dyn_state.ppm_table->apu_tdp = in amdgpu_parse_extended_power_table()
548 adev->pm.dpm.dyn_state.ppm_table->dgpu_tdp = in amdgpu_parse_extended_power_table()
550 adev->pm.dpm.dyn_state.ppm_table->dgpu_ulv_power = in amdgpu_parse_extended_power_table()
552 adev->pm.dpm.dyn_state.ppm_table->tj_max = in amdgpu_parse_extended_power_table()
564 adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries = in amdgpu_parse_extended_power_table()
566 if (!adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries) in amdgpu_parse_extended_power_table()
568 adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count = in amdgpu_parse_extended_power_table()
572 adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].clk = in amdgpu_parse_extended_power_table()
574 adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v = in amdgpu_parse_extended_power_table()
585 adev->pm.dpm.dyn_state.cac_tdp_table = in amdgpu_parse_extended_power_table()
587 if (!adev->pm.dpm.dyn_state.cac_tdp_table) in amdgpu_parse_extended_power_table()
593 adev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = in amdgpu_parse_extended_power_table()
600 adev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = 255; in amdgpu_parse_extended_power_table()
603 adev->pm.dpm.dyn_state.cac_tdp_table->tdp = le16_to_cpu(pt->usTDP); in amdgpu_parse_extended_power_table()
604 adev->pm.dpm.dyn_state.cac_tdp_table->configurable_tdp = in amdgpu_parse_extended_power_table()
606 adev->pm.dpm.dyn_state.cac_tdp_table->tdc = le16_to_cpu(pt->usTDC); in amdgpu_parse_extended_power_table()
607 adev->pm.dpm.dyn_state.cac_tdp_table->battery_power_limit = in amdgpu_parse_extended_power_table()
609 adev->pm.dpm.dyn_state.cac_tdp_table->small_power_limit = in amdgpu_parse_extended_power_table()
611 adev->pm.dpm.dyn_state.cac_tdp_table->low_cac_leakage = in amdgpu_parse_extended_power_table()
613 adev->pm.dpm.dyn_state.cac_tdp_table->high_cac_leakage = in amdgpu_parse_extended_power_table()
622 &adev->pm.dpm.dyn_state.vddgfx_dependency_on_sclk, in amdgpu_parse_extended_power_table()
634 struct amdgpu_dpm_dynamic_state *dyn_state = &adev->pm.dpm.dyn_state; in amdgpu_free_extended_power_table()
694 adev->pm.no_fan = true; in amdgpu_add_thermal_controller()
695 adev->pm.fan_pulses_per_revolution = in amdgpu_add_thermal_controller()
697 if (adev->pm.fan_pulses_per_revolution) { in amdgpu_add_thermal_controller()
698 adev->pm.fan_min_rpm = controller->ucFanMinRPM; in amdgpu_add_thermal_controller()
699 adev->pm.fan_max_rpm = controller->ucFanMaxRPM; in amdgpu_add_thermal_controller()
705 adev->pm.int_thermal_type = THERMAL_TYPE_RV6XX; in amdgpu_add_thermal_controller()
710 adev->pm.int_thermal_type = THERMAL_TYPE_RV770; in amdgpu_add_thermal_controller()
715 adev->pm.int_thermal_type = THERMAL_TYPE_EVERGREEN; in amdgpu_add_thermal_controller()
720 adev->pm.int_thermal_type = THERMAL_TYPE_SUMO; in amdgpu_add_thermal_controller()
725 adev->pm.int_thermal_type = THERMAL_TYPE_NI; in amdgpu_add_thermal_controller()
730 adev->pm.int_thermal_type = THERMAL_TYPE_SI; in amdgpu_add_thermal_controller()
735 adev->pm.int_thermal_type = THERMAL_TYPE_CI; in amdgpu_add_thermal_controller()
740 adev->pm.int_thermal_type = THERMAL_TYPE_KV; in amdgpu_add_thermal_controller()
745 adev->pm.int_thermal_type = THERMAL_TYPE_EXTERNAL_GPIO; in amdgpu_add_thermal_controller()
751 adev->pm.int_thermal_type = THERMAL_TYPE_ADT7473_WITH_INTERNAL; in amdgpu_add_thermal_controller()
757 adev->pm.int_thermal_type = THERMAL_TYPE_EMC2103_WITH_INTERNAL; in amdgpu_add_thermal_controller()
764 adev->pm.int_thermal_type = THERMAL_TYPE_EXTERNAL; in amdgpu_add_thermal_controller()
766 adev->pm.i2c_bus = amdgpu_i2c_lookup(adev, &i2c_bus); in amdgpu_add_thermal_controller()
767 if (adev->pm.i2c_bus) { in amdgpu_add_thermal_controller()
772 i2c_new_client_device(&adev->pm.i2c_bus->adapter, &info); in amdgpu_add_thermal_controller()
788 if (idx < adev->pm.dpm.num_of_vce_states) in amdgpu_get_vce_clock_state()
789 return &adev->pm.dpm.vce_states[idx]; in amdgpu_get_vce_clock_state()
800 bool single_display = (adev->pm.dpm.new_active_crtc_count < 2) ? in amdgpu_dpm_pick_power_state()
820 for (i = 0; i < adev->pm.dpm.num_ps; i++) { in amdgpu_dpm_pick_power_state()
821 ps = &adev->pm.dpm.ps[i]; in amdgpu_dpm_pick_power_state()
854 if (adev->pm.dpm.uvd_ps) in amdgpu_dpm_pick_power_state()
855 return adev->pm.dpm.uvd_ps; in amdgpu_dpm_pick_power_state()
875 return adev->pm.dpm.boot_ps; in amdgpu_dpm_pick_power_state()
904 if (adev->pm.dpm.uvd_ps) { in amdgpu_dpm_pick_power_state()
905 return adev->pm.dpm.uvd_ps; in amdgpu_dpm_pick_power_state()
937 if (!adev->pm.dpm_enabled) in amdgpu_dpm_change_power_state_locked()
940 if (adev->pm.dpm.user_state != adev->pm.dpm.state) { in amdgpu_dpm_change_power_state_locked()
942 if ((!adev->pm.dpm.thermal_active) && in amdgpu_dpm_change_power_state_locked()
943 (!adev->pm.dpm.uvd_active)) in amdgpu_dpm_change_power_state_locked()
944 adev->pm.dpm.state = adev->pm.dpm.user_state; in amdgpu_dpm_change_power_state_locked()
946 dpm_state = adev->pm.dpm.state; in amdgpu_dpm_change_power_state_locked()
950 adev->pm.dpm.requested_ps = ps; in amdgpu_dpm_change_power_state_locked()
956 amdgpu_dpm_print_power_state(adev, adev->pm.dpm.current_ps); in amdgpu_dpm_change_power_state_locked()
958 amdgpu_dpm_print_power_state(adev, adev->pm.dpm.requested_ps); in amdgpu_dpm_change_power_state_locked()
962 ps->vce_active = adev->pm.dpm.vce_active; in amdgpu_dpm_change_power_state_locked()
971 …if (0 != amdgpu_dpm_check_state_equal(adev, adev->pm.dpm.current_ps, adev->pm.dpm.requested_ps, &e… in amdgpu_dpm_change_power_state_locked()
983 adev->pm.dpm.current_active_crtcs = adev->pm.dpm.new_active_crtcs; in amdgpu_dpm_change_power_state_locked()
984 adev->pm.dpm.current_active_crtc_count = adev->pm.dpm.new_active_crtc_count; in amdgpu_dpm_change_power_state_locked()
987 if (adev->pm.dpm.thermal_active) { in amdgpu_dpm_change_power_state_locked()
988 enum amd_dpm_forced_level level = adev->pm.dpm.forced_level; in amdgpu_dpm_change_power_state_locked()
992 adev->pm.dpm.forced_level = level; in amdgpu_dpm_change_power_state_locked()
995 pp_funcs->force_performance_level(adev, adev->pm.dpm.forced_level); in amdgpu_dpm_change_power_state_locked()
1015 pm.dpm.thermal.work); in amdgpu_dpm_thermal_work_handler()
1021 if (!adev->pm.dpm_enabled) in amdgpu_dpm_thermal_work_handler()
1028 if (temp < adev->pm.dpm.thermal.min_temp) in amdgpu_dpm_thermal_work_handler()
1030 dpm_state = adev->pm.dpm.user_state; in amdgpu_dpm_thermal_work_handler()
1032 if (adev->pm.dpm.thermal.high_to_low) in amdgpu_dpm_thermal_work_handler()
1034 dpm_state = adev->pm.dpm.user_state; in amdgpu_dpm_thermal_work_handler()
1038 adev->pm.dpm.thermal_active = true; in amdgpu_dpm_thermal_work_handler()
1040 adev->pm.dpm.thermal_active = false; in amdgpu_dpm_thermal_work_handler()
1042 adev->pm.dpm.state = dpm_state; in amdgpu_dpm_thermal_work_handler()