Lines Matching refs:pp
50 const void *pp; member
103 void (*set_display_count)(struct pp_smu *pp, int count);
112 void (*set_wm_ranges)(struct pp_smu *pp,
118 void (*set_hard_min_dcfclk_by_freq)(struct pp_smu *pp, int mhz);
124 void (*set_min_deep_sleep_dcfclk)(struct pp_smu *pp, int mhz);
129 void (*set_hard_min_fclk_by_freq)(struct pp_smu *pp, int mhz);
134 void (*set_hard_min_socclk_by_freq)(struct pp_smu *pp, int mhz);
137 void (*set_pme_wa_enable)(struct pp_smu *pp);
173 enum pp_smu_status (*set_display_count)(struct pp_smu *pp, int count);
178 enum pp_smu_status (*set_hard_min_dcfclk_by_freq)(struct pp_smu *pp, int Mhz);
184 enum pp_smu_status (*set_min_deep_sleep_dcfclk)(struct pp_smu *pp, int Mhz);
189 enum pp_smu_status (*set_hard_min_uclk_by_freq)(struct pp_smu *pp, int Mhz);
194 enum pp_smu_status (*set_hard_min_socclk_by_freq)(struct pp_smu *pp, int Mhz);
197 enum pp_smu_status (*set_pme_wa_enable)(struct pp_smu *pp);
202 enum pp_smu_status (*set_voltage_by_freq)(struct pp_smu *pp,
217 enum pp_smu_status (*set_wm_ranges)(struct pp_smu *pp,
223 enum pp_smu_status (*get_maximum_sustainable_clocks)(struct pp_smu *pp,
228 enum pp_smu_status (*get_uclk_dpm_states)(struct pp_smu *pp,
240 enum pp_smu_status (*set_pstate_handshake_support)(struct pp_smu *pp,
279 enum pp_smu_status (*set_wm_ranges)(struct pp_smu *pp,
282 enum pp_smu_status (*get_dpm_clock_table) (struct pp_smu *pp,
298 enum pp_smu_status (*set_wm_ranges)(struct pp_smu *pp,
302 enum pp_smu_status (*get_dpm_clock_table) (struct pp_smu *pp,
305 enum pp_smu_status (*notify_smu_timeout) (struct pp_smu *pp);