Lines Matching defs:var
30 var SQ_WAVE_STATUS_INST_ATC_SHIFT = 23 label
31 var SQ_WAVE_STATUS_INST_ATC_MASK = 0x00800000 label
32 var SQ_WAVE_STATUS_SPI_PRIO_SHIFT = 1 label
33 var SQ_WAVE_STATUS_SPI_PRIO_MASK = 0x00000006 label
34 var SQ_WAVE_STATUS_PRE_SPI_PRIO_SHIFT = 0 label
35 var SQ_WAVE_STATUS_PRE_SPI_PRIO_SIZE = 1 label
36 var SQ_WAVE_STATUS_POST_SPI_PRIO_SHIFT = 3 label
37 var SQ_WAVE_STATUS_POST_SPI_PRIO_SIZE = 29 label
39 var SQ_WAVE_LDS_ALLOC_LDS_SIZE_SHIFT = 12 label
40 var SQ_WAVE_LDS_ALLOC_LDS_SIZE_SIZE = 9 label
41 var SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SHIFT = 8 label
42 var SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SIZE = 6 label
43 var SQ_WAVE_GPR_ALLOC_SGPR_SIZE_SHIFT = 24 label
44 var SQ_WAVE_GPR_ALLOC_SGPR_SIZE_SIZE = 3 //FIXME sq.blk still has 4 bits at… label
46 var SQ_WAVE_TRAPSTS_SAVECTX_MASK = 0x400 label
47 var SQ_WAVE_TRAPSTS_EXCE_MASK = 0x1FF // Exception mask label
48 var SQ_WAVE_TRAPSTS_SAVECTX_SHIFT = 10 label
49 var SQ_WAVE_TRAPSTS_MEM_VIOL_MASK = 0x100 label
50 var SQ_WAVE_TRAPSTS_MEM_VIOL_SHIFT = 8 label
51 var SQ_WAVE_TRAPSTS_PRE_SAVECTX_MASK = 0x3FF label
52 var SQ_WAVE_TRAPSTS_PRE_SAVECTX_SHIFT = 0x0 label
53 var SQ_WAVE_TRAPSTS_PRE_SAVECTX_SIZE = 10 label
54 var SQ_WAVE_TRAPSTS_POST_SAVECTX_MASK = 0xFFFFF800 label
55 var SQ_WAVE_TRAPSTS_POST_SAVECTX_SHIFT = 11 label
56 var SQ_WAVE_TRAPSTS_POST_SAVECTX_SIZE = 21 label
58 var SQ_WAVE_IB_STS_RCNT_SHIFT = 16 //FIXME label
59 var SQ_WAVE_IB_STS_RCNT_SIZE = 4 //FIXME label
60 var SQ_WAVE_IB_STS_FIRST_REPLAY_SHIFT = 15 //FIXME label
61 var SQ_WAVE_IB_STS_FIRST_REPLAY_SIZE = 1 //FIXME label
62 var SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK_NEG = 0x00007FFF //FIXME label
64 var SQ_BUF_RSRC_WORD1_ATC_SHIFT = 24 label
65 var SQ_BUF_RSRC_WORD3_MTYPE_SHIFT = 27 label
69 var S_SAVE_BUF_RSRC_WORD1_STRIDE = 0x00040000 //stride is 4 bytes label
70 var S_SAVE_BUF_RSRC_WORD3_MISC = 0x00807FAC //SQ_SEL_X/Y/Z/W, BUF_NUM_FORMAT_FL… label
72 var S_SAVE_SPI_INIT_ATC_MASK = 0x08000000 //bit[27]: ATC bit label
73 var S_SAVE_SPI_INIT_ATC_SHIFT = 27 label
74 var S_SAVE_SPI_INIT_MTYPE_MASK = 0x70000000 //bit[30:28]: Mtype label
75 var S_SAVE_SPI_INIT_MTYPE_SHIFT = 28 label
76 var S_SAVE_SPI_INIT_FIRST_WAVE_MASK = 0x04000000 //bit[26]: FirstWaveInTG label
77 var S_SAVE_SPI_INIT_FIRST_WAVE_SHIFT = 26 label
79 var S_SAVE_PC_HI_RCNT_SHIFT = 28 //FIXME check with Brian to ensure… label
80 var S_SAVE_PC_HI_RCNT_MASK = 0xF0000000 //FIXME label
81 var S_SAVE_PC_HI_FIRST_REPLAY_SHIFT = 27 //FIXME label
82 var S_SAVE_PC_HI_FIRST_REPLAY_MASK = 0x08000000 //FIXME label
84 var s_save_spi_init_lo = exec_lo label
85 var s_save_spi_init_hi = exec_hi label
88 var s_save_pc_lo = ttmp0 //{TTMP1, TTMP0} = {3'h0,pc_rewind[3:0], HT[0],trap… label
89 var s_save_pc_hi = ttmp1 label
90 var s_save_exec_lo = ttmp2 label
91 var s_save_exec_hi = ttmp3 label
92 var s_save_status = ttmp4 label
93 var s_save_trapsts = ttmp5 //not really used until the end of the SAVE routine label
94 var s_save_xnack_mask_lo = ttmp6 label
95 var s_save_xnack_mask_hi = ttmp7 label
96 var s_save_buf_rsrc0 = ttmp8 label
97 var s_save_buf_rsrc1 = ttmp9 label
98 var s_save_buf_rsrc2 = ttmp10 label
99 var s_save_buf_rsrc3 = ttmp11 label
101 var s_save_mem_offset = tma_lo label
102 var s_save_alloc_size = s_save_trapsts //conflict label
103 var s_save_tmp = s_save_buf_rsrc2 //shared with s_save_buf_rsrc2 (conflict: … label
104 var s_save_m0 = tma_hi label
107 var S_RESTORE_BUF_RSRC_WORD1_STRIDE = S_SAVE_BUF_RSRC_WORD1_STRIDE label
108 var S_RESTORE_BUF_RSRC_WORD3_MISC = S_SAVE_BUF_RSRC_WORD3_MISC label
110 var S_RESTORE_SPI_INIT_ATC_MASK = 0x08000000 //bit[27]: ATC bit label
111 var S_RESTORE_SPI_INIT_ATC_SHIFT = 27 label
112 var S_RESTORE_SPI_INIT_MTYPE_MASK = 0x70000000 //bit[30:28]: Mtype label
113 var S_RESTORE_SPI_INIT_MTYPE_SHIFT = 28 label
114 var S_RESTORE_SPI_INIT_FIRST_WAVE_MASK = 0x04000000 //bit[26]: FirstWaveInTG label
115 var S_RESTORE_SPI_INIT_FIRST_WAVE_SHIFT = 26 label
117 var S_RESTORE_PC_HI_RCNT_SHIFT = S_SAVE_PC_HI_RCNT_SHIFT label
118 var S_RESTORE_PC_HI_RCNT_MASK = S_SAVE_PC_HI_RCNT_MASK label
119 var S_RESTORE_PC_HI_FIRST_REPLAY_SHIFT = S_SAVE_PC_HI_FIRST_REPLAY_SHIFT label
120 var S_RESTORE_PC_HI_FIRST_REPLAY_MASK = S_SAVE_PC_HI_FIRST_REPLAY_MASK label
122 var s_restore_spi_init_lo = exec_lo label
123 var s_restore_spi_init_hi = exec_hi label
125 var s_restore_mem_offset = ttmp2 label
126 var s_restore_alloc_size = ttmp3 label
127 var s_restore_tmp = ttmp6 //tba_lo/hi need to be restored label
128 var s_restore_mem_offset_save = s_restore_tmp //no conflict label
130 var s_restore_m0 = s_restore_alloc_size //no conflict label
132 var s_restore_mode = ttmp7 label
134 var s_restore_pc_lo = ttmp0 label
135 var s_restore_pc_hi = ttmp1 label
136 var s_restore_exec_lo = tma_lo //no conflict label
137 var s_restore_exec_hi = tma_hi //no conflict label
138 var s_restore_status = ttmp4 label
139 var s_restore_trapsts = ttmp5 label
140 var s_restore_xnack_mask_lo = xnack_mask_lo label
141 var s_restore_xnack_mask_hi = xnack_mask_hi label
142 var s_restore_buf_rsrc0 = ttmp8 label
143 var s_restore_buf_rsrc1 = ttmp9 label
144 var s_restore_buf_rsrc2 = ttmp10 label
145 var s_restore_buf_rsrc3 = ttmp11 label