53 	if (adev->irq.ih.ring_size) {  in navi10_ih_init_register_offset()
54 		ih_regs = &adev->irq.ih.ih_regs;  in navi10_ih_init_register_offset()
153 					    struct amdgpu_ih_ring *ih,  in navi10_ih_toggle_ring_interrupts()  argument
159 	ih_regs = &ih->ih_regs;  in navi10_ih_toggle_ring_interrupts()
165 	if (ih == &adev->irq.ih)  in navi10_ih_toggle_ring_interrupts()
176 		ih->enabled = true;  in navi10_ih_toggle_ring_interrupts()
181 		ih->enabled = false;  in navi10_ih_toggle_ring_interrupts()
182 		ih->rptr = 0;  in navi10_ih_toggle_ring_interrupts()
198 	struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2};  in navi10_ih_toggle_interrupts()  local
202 	for (i = 0; i < ARRAY_SIZE(ih); i++) {  in navi10_ih_toggle_interrupts()
203 		if (ih[i]->ring_size) {  in navi10_ih_toggle_interrupts()
204 			r = navi10_ih_toggle_ring_interrupts(adev, ih[i], enable);  in navi10_ih_toggle_interrupts()
213 static uint32_t navi10_ih_rb_cntl(struct amdgpu_ih_ring *ih, uint32_t ih_rb_cntl)  in navi10_ih_rb_cntl()  argument
215 	int rb_bufsz = order_base_2(ih->ring_size / 4);  in navi10_ih_rb_cntl()
218 				   MC_SPACE, ih->use_bus_addr ? 1 : 4);  in navi10_ih_rb_cntl()
236 static uint32_t navi10_ih_doorbell_rptr(struct amdgpu_ih_ring *ih)  in navi10_ih_doorbell_rptr()  argument
240 	if (ih->use_doorbell) {  in navi10_ih_doorbell_rptr()
243 						 ih->doorbell_index);  in navi10_ih_doorbell_rptr()
264 				 struct amdgpu_ih_ring *ih)  in navi10_ih_enable_ring()  argument
269 	ih_regs = &ih->ih_regs;  in navi10_ih_enable_ring()
272 	WREG32(ih_regs->ih_rb_base, ih->gpu_addr >> 8);  in navi10_ih_enable_ring()
273 	WREG32(ih_regs->ih_rb_base_hi, (ih->gpu_addr >> 40) & 0xff);  in navi10_ih_enable_ring()
276 	tmp = navi10_ih_rb_cntl(ih, tmp);  in navi10_ih_enable_ring()
277 	if (ih == &adev->irq.ih)  in navi10_ih_enable_ring()
279 	if (ih == &adev->irq.ih1)  in navi10_ih_enable_ring()
291 	if (ih == &adev->irq.ih) {  in navi10_ih_enable_ring()
293 		WREG32(ih_regs->ih_rb_wptr_addr_lo, lower_32_bits(ih->wptr_addr));  in navi10_ih_enable_ring()
294 		WREG32(ih_regs->ih_rb_wptr_addr_hi, upper_32_bits(ih->wptr_addr) & 0xFFFF);  in navi10_ih_enable_ring()
301 	WREG32(ih_regs->ih_doorbell_rptr, navi10_ih_doorbell_rptr(ih));  in navi10_ih_enable_ring()
319 	struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2};  in navi10_ih_irq_init()  local
332 		if (ih[0]->use_bus_addr) {  in navi10_ih_irq_init()
352 	for (i = 0; i < ARRAY_SIZE(ih); i++) {  in navi10_ih_irq_init()
353 		if (ih[i]->ring_size) {  in navi10_ih_irq_init()
354 			ret = navi10_ih_enable_ring(adev, ih[i]);  in navi10_ih_irq_init()
361 	adev->nbio.funcs->ih_doorbell_range(adev, ih[0]->use_doorbell,  in navi10_ih_irq_init()
362 					    ih[0]->doorbell_index);  in navi10_ih_irq_init()
407 			      struct amdgpu_ih_ring *ih)  in navi10_ih_get_wptr()  argument
412 	if (ih == &adev->irq.ih || ih == &adev->irq.ih_soft) {  in navi10_ih_get_wptr()
418 		wptr = le32_to_cpu(*ih->wptr_cpu);  in navi10_ih_get_wptr()
424 	ih_regs = &ih->ih_regs;  in navi10_ih_get_wptr()
436 	tmp = (wptr + 32) & ih->ptr_mask;  in navi10_ih_get_wptr()
439 		 wptr, ih->rptr, tmp);  in navi10_ih_get_wptr()
440 	ih->rptr = tmp;  in navi10_ih_get_wptr()
452 	return (wptr & ih->ptr_mask);  in navi10_ih_get_wptr()
463 			       struct amdgpu_ih_ring *ih)  in navi10_ih_irq_rearm()  argument
469 	ih_regs = &ih->ih_regs;  in navi10_ih_irq_rearm()
474 		if ((v < ih->ring_size) && (v != ih->rptr))  in navi10_ih_irq_rearm()
475 			WDOORBELL32(ih->doorbell_index, ih->rptr);  in navi10_ih_irq_rearm()
490 			       struct amdgpu_ih_ring *ih)  in navi10_ih_set_rptr()  argument
494 	if (ih == &adev->irq.ih_soft)  in navi10_ih_set_rptr()
497 	if (ih->use_doorbell) {  in navi10_ih_set_rptr()
499 		*ih->rptr_cpu = ih->rptr;  in navi10_ih_set_rptr()
500 		WDOORBELL32(ih->doorbell_index, ih->rptr);  in navi10_ih_set_rptr()
503 			navi10_ih_irq_rearm(adev, ih);  in navi10_ih_set_rptr()
505 		ih_regs = &ih->ih_regs;  in navi10_ih_set_rptr()
506 		WREG32(ih_regs->ih_rb_rptr, ih->rptr);  in navi10_ih_set_rptr()
574 	r = amdgpu_ih_ring_init(adev, &adev->irq.ih, IH_RING_SIZE, use_bus_addr);  in navi10_ih_sw_init()
578 	adev->irq.ih.use_doorbell = true;  in navi10_ih_sw_init()
579 	adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1;  in navi10_ih_sw_init()