5193 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad…  in wave_read_ind()  argument
5197 		(simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |  in wave_read_ind()
5203 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd,  in wave_read_regs()  argument
5209 		(simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |  in wave_read_regs()
5218 static void gfx_v8_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uin…  in gfx_v8_0_read_wave_data()  argument
5222 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);  in gfx_v8_0_read_wave_data()
5223 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);  in gfx_v8_0_read_wave_data()
5224 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);  in gfx_v8_0_read_wave_data()
5225 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);  in gfx_v8_0_read_wave_data()
5226 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI);  in gfx_v8_0_read_wave_data()
5227 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID);  in gfx_v8_0_read_wave_data()
5228 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0);  in gfx_v8_0_read_wave_data()
5229 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1);  in gfx_v8_0_read_wave_data()
5230 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC);  in gfx_v8_0_read_wave_data()
5231 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC);  in gfx_v8_0_read_wave_data()
5232 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS);  in gfx_v8_0_read_wave_data()
5233 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS);  in gfx_v8_0_read_wave_data()
5234 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO);  in gfx_v8_0_read_wave_data()
5235 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI);  in gfx_v8_0_read_wave_data()
5236 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO);  in gfx_v8_0_read_wave_data()
5237 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI);  in gfx_v8_0_read_wave_data()
5238 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);  in gfx_v8_0_read_wave_data()
5239 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);  in gfx_v8_0_read_wave_data()
5240 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE);  in gfx_v8_0_read_wave_data()
5243 static void gfx_v8_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd,  in gfx_v8_0_read_wave_sgprs()  argument
5248 		adev, simd, wave, 0,  in gfx_v8_0_read_wave_sgprs()