130 	spin_lock_irqsave(&adev->irq.lock, irqflags);  in amdgpu_irq_disable_all()
132 		if (!adev->irq.client[i].sources)  in amdgpu_irq_disable_all()
136 			struct amdgpu_irq_src *src = adev->irq.client[i].sources[j];  in amdgpu_irq_disable_all()
150 	spin_unlock_irqrestore(&adev->irq.lock, irqflags);  in amdgpu_irq_disable_all()
164 static irqreturn_t amdgpu_irq_handler(int irq, void *arg)  in amdgpu_irq_handler()  argument
170 	ret = amdgpu_ih_process(adev, &adev->irq.ih);  in amdgpu_irq_handler()
189 						  irq.ih1_work);  in amdgpu_irq_handle_ih1()
191 	amdgpu_ih_process(adev, &adev->irq.ih1);  in amdgpu_irq_handle_ih1()
204 						  irq.ih2_work);  in amdgpu_irq_handle_ih2()
206 	amdgpu_ih_process(adev, &adev->irq.ih2);  in amdgpu_irq_handle_ih2()
219 						  irq.ih_soft_work);  in amdgpu_irq_handle_ih_soft()
221 	amdgpu_ih_process(adev, &adev->irq.ih_soft);  in amdgpu_irq_handle_ih_soft()
274 	unsigned int irq;  in amdgpu_irq_init()  local
276 	spin_lock_init(&adev->irq.lock);  in amdgpu_irq_init()
279 	adev->irq.msi_enabled = false;  in amdgpu_irq_init()
293 			adev->irq.msi_enabled = true;  in amdgpu_irq_init()
298 	INIT_WORK(&adev->irq.ih1_work, amdgpu_irq_handle_ih1);  in amdgpu_irq_init()
299 	INIT_WORK(&adev->irq.ih2_work, amdgpu_irq_handle_ih2);  in amdgpu_irq_init()
300 	INIT_WORK(&adev->irq.ih_soft_work, amdgpu_irq_handle_ih_soft);  in amdgpu_irq_init()
306 	irq = r;  in amdgpu_irq_init()
309 	r = request_irq(irq, amdgpu_irq_handler, IRQF_SHARED, adev_to_drm(adev)->driver->name,  in amdgpu_irq_init()
313 	adev->irq.installed = true;  in amdgpu_irq_init()
314 	adev->irq.irq = irq;  in amdgpu_irq_init()
324 	if (adev->irq.installed) {  in amdgpu_irq_fini_hw()
325 		free_irq(adev->irq.irq, adev_to_drm(adev));  in amdgpu_irq_fini_hw()
326 		adev->irq.installed = false;  in amdgpu_irq_fini_hw()
327 		if (adev->irq.msi_enabled)  in amdgpu_irq_fini_hw()
331 	amdgpu_ih_ring_fini(adev, &adev->irq.ih_soft);  in amdgpu_irq_fini_hw()
332 	amdgpu_ih_ring_fini(adev, &adev->irq.ih);  in amdgpu_irq_fini_hw()
333 	amdgpu_ih_ring_fini(adev, &adev->irq.ih1);  in amdgpu_irq_fini_hw()
334 	amdgpu_ih_ring_fini(adev, &adev->irq.ih2);  in amdgpu_irq_fini_hw()
351 		if (!adev->irq.client[i].sources)  in amdgpu_irq_fini_sw()
355 			struct amdgpu_irq_src *src = adev->irq.client[i].sources[j];  in amdgpu_irq_fini_sw()
363 		kfree(adev->irq.client[i].sources);  in amdgpu_irq_fini_sw()
364 		adev->irq.client[i].sources = NULL;  in amdgpu_irq_fini_sw()
394 	if (!adev->irq.client[client_id].sources) {  in amdgpu_irq_add_id()
395 		adev->irq.client[client_id].sources =  in amdgpu_irq_add_id()
399 		if (!adev->irq.client[client_id].sources)  in amdgpu_irq_add_id()
403 	if (adev->irq.client[client_id].sources[src_id] != NULL)  in amdgpu_irq_add_id()
417 	adev->irq.client[client_id].sources[src_id] = source;  in amdgpu_irq_add_id()
443 	trace_amdgpu_iv(ih - &adev->irq.ih, &entry);  in amdgpu_irq_dispatch()
455 		   adev->irq.virq[src_id]) {  in amdgpu_irq_dispatch()
456 		generic_handle_domain_irq(adev->irq.domain, src_id);  in amdgpu_irq_dispatch()
458 	} else if (!adev->irq.client[client_id].sources) {  in amdgpu_irq_dispatch()
462 	} else if ((src = adev->irq.client[client_id].sources[src_id])) {  in amdgpu_irq_dispatch()
496 	amdgpu_ih_ring_write(adev, &adev->irq.ih_soft, entry->iv_entry, num_dw);  in amdgpu_irq_delegate()
497 	schedule_work(&adev->irq.ih_soft_work);  in amdgpu_irq_delegate()
516 	spin_lock_irqsave(&adev->irq.lock, irqflags);  in amdgpu_irq_update()
527 	spin_unlock_irqrestore(&adev->irq.lock, irqflags);  in amdgpu_irq_update()
547 		if (!adev->irq.client[i].sources)  in amdgpu_irq_gpu_reset_resume_helper()
551 			struct amdgpu_irq_src *src = adev->irq.client[i].sources[j];  in amdgpu_irq_gpu_reset_resume_helper()
576 	if (!adev->irq.installed)  in amdgpu_irq_get()
606 	if (!adev->irq.installed)  in amdgpu_irq_put()
640 	if (!adev->irq.installed)  in amdgpu_irq_enabled()
684 				unsigned int irq, irq_hw_number_t hwirq)  in amdgpu_irqdomain_map()  argument
689 	irq_set_chip_and_handler(irq,  in amdgpu_irqdomain_map()
712 	adev->irq.domain = irq_domain_add_linear(NULL, AMDGPU_MAX_IRQ_SRC_ID,  in amdgpu_irq_add_domain()
714 	if (!adev->irq.domain) {  in amdgpu_irq_add_domain()
732 	if (adev->irq.domain) {  in amdgpu_irq_remove_domain()
733 		irq_domain_remove(adev->irq.domain);  in amdgpu_irq_remove_domain()
734 		adev->irq.domain = NULL;  in amdgpu_irq_remove_domain()
753 	adev->irq.virq[src_id] = irq_create_mapping(adev->irq.domain, src_id);  in amdgpu_irq_create_mapping()
755 	return adev->irq.virq[src_id];  in amdgpu_irq_create_mapping()