131 	const struct zynq_platform_data *p_data;  member
165 	return !!(gpio->p_data->quirks & ZYNQ_GPIO_QUIRK_IS_ZYNQ);  in zynq_gpio_is_zynq()
176 	return !!(gpio->p_data->quirks & GPIO_QUIRK_DATA_RO_BUG);  in gpio_data_ro_bug()
198 	for (bank = 0; bank < gpio->p_data->max_bank; bank++) {  in zynq_gpio_get_bank_pin()
199 		if ((pin_num >= gpio->p_data->bank_min[bank]) &&  in zynq_gpio_get_bank_pin()
200 		    (pin_num <= gpio->p_data->bank_max[bank])) {  in zynq_gpio_get_bank_pin()
203 					gpio->p_data->bank_min[bank];  in zynq_gpio_get_bank_pin()
206 		if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL)  in zynq_gpio_get_bank_pin()
630 	unsigned int bank_offset = gpio->p_data->bank_min[bank_num];  in zynq_gpio_handle_bank_irq()
661 	for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) {  in zynq_gpio_irqhandler()
667 		if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL)  in zynq_gpio_irqhandler()
678 	for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) {  in zynq_gpio_save_context()
698 		if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL)  in zynq_gpio_save_context()
707 	for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) {  in zynq_gpio_restore_context()
731 		if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL)  in zynq_gpio_restore_context()
916 	gpio->p_data = match->data;  in zynq_gpio_probe()
929 	chip->label = gpio->p_data->label;  in zynq_gpio_probe()
940 	chip->ngpio = gpio->p_data->ngpio;  in zynq_gpio_probe()
962 	for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) {  in zynq_gpio_probe()
965 		if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL)  in zynq_gpio_probe()