156 static void realtek_gpio_clear_isr(struct realtek_gpio_ctrl *ctrl, u32 mask)  in realtek_gpio_clear_isr()  argument
158 	ctrl->bank_write(ctrl->base + REALTEK_GPIO_REG_ISR, mask);  in realtek_gpio_clear_isr()
161 static u32 realtek_gpio_read_isr(struct realtek_gpio_ctrl *ctrl)  in realtek_gpio_read_isr()  argument
163 	return ctrl->bank_read(ctrl->base + REALTEK_GPIO_REG_ISR);  in realtek_gpio_read_isr()
167 static void realtek_gpio_update_line_imr(struct realtek_gpio_ctrl *ctrl, unsigned int line)  in realtek_gpio_update_line_imr()  argument
169 	void __iomem *reg = ctrl->base + REALTEK_GPIO_REG_IMR;  in realtek_gpio_update_line_imr()
170 	unsigned int line_shift = ctrl->line_imr_pos(line);  in realtek_gpio_update_line_imr()
172 	u32 irq_type = ctrl->intr_type[line];  in realtek_gpio_update_line_imr()
173 	u32 irq_mask = ctrl->intr_mask[line];  in realtek_gpio_update_line_imr()
185 	struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data);  in realtek_gpio_irq_ack()  local
188 	realtek_gpio_clear_isr(ctrl, BIT(line));  in realtek_gpio_irq_ack()
193 	struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data);  in realtek_gpio_irq_unmask()  local
197 	gpiochip_enable_irq(&ctrl->gc, line);  in realtek_gpio_irq_unmask()
199 	raw_spin_lock_irqsave(&ctrl->lock, flags);  in realtek_gpio_irq_unmask()
200 	ctrl->intr_mask[line] = REALTEK_GPIO_IMR_LINE_MASK;  in realtek_gpio_irq_unmask()
201 	realtek_gpio_update_line_imr(ctrl, line);  in realtek_gpio_irq_unmask()
202 	raw_spin_unlock_irqrestore(&ctrl->lock, flags);  in realtek_gpio_irq_unmask()
207 	struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data);  in realtek_gpio_irq_mask()  local
211 	raw_spin_lock_irqsave(&ctrl->lock, flags);  in realtek_gpio_irq_mask()
212 	ctrl->intr_mask[line] = 0;  in realtek_gpio_irq_mask()
213 	realtek_gpio_update_line_imr(ctrl, line);  in realtek_gpio_irq_mask()
214 	raw_spin_unlock_irqrestore(&ctrl->lock, flags);  in realtek_gpio_irq_mask()
216 	gpiochip_disable_irq(&ctrl->gc, line);  in realtek_gpio_irq_mask()
221 	struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data);  in realtek_gpio_irq_set_type()  local
242 	raw_spin_lock_irqsave(&ctrl->lock, flags);  in realtek_gpio_irq_set_type()
243 	ctrl->intr_type[line] = type;  in realtek_gpio_irq_set_type()
244 	realtek_gpio_update_line_imr(ctrl, line);  in realtek_gpio_irq_set_type()
245 	raw_spin_unlock_irqrestore(&ctrl->lock, flags);  in realtek_gpio_irq_set_type()
253 	struct realtek_gpio_ctrl *ctrl = gpiochip_get_data(gc);  in realtek_gpio_irq_handler()  local
260 	status = realtek_gpio_read_isr(ctrl);  in realtek_gpio_irq_handler()
267 static inline void __iomem *realtek_gpio_irq_cpu_mask(struct realtek_gpio_ctrl *ctrl, int cpu)  in realtek_gpio_irq_cpu_mask()  argument
269 	return ctrl->cpumask_base + REALTEK_GPIO_PORTS_PER_BANK * cpu;  in realtek_gpio_irq_cpu_mask()
275 	struct realtek_gpio_ctrl *ctrl = irq_data_to_ctrl(data);  in realtek_gpio_irq_set_affinity()  local
282 	if (!ctrl->cpumask_base)  in realtek_gpio_irq_set_affinity()
285 	raw_spin_lock_irqsave(&ctrl->lock, flags);  in realtek_gpio_irq_set_affinity()
287 	for_each_cpu(cpu, &ctrl->cpu_irq_maskable) {  in realtek_gpio_irq_set_affinity()
288 		irq_cpu_mask = realtek_gpio_irq_cpu_mask(ctrl, cpu);  in realtek_gpio_irq_set_affinity()
289 		v = ctrl->bank_read(irq_cpu_mask);  in realtek_gpio_irq_set_affinity()
296 		ctrl->bank_write(irq_cpu_mask, v);  in realtek_gpio_irq_set_affinity()
299 	raw_spin_unlock_irqrestore(&ctrl->lock, flags);  in realtek_gpio_irq_set_affinity()
308 	struct realtek_gpio_ctrl *ctrl = gpiochip_get_data(gc);  in realtek_gpio_irq_init()  local
314 		realtek_gpio_update_line_imr(ctrl, line);  in realtek_gpio_irq_init()
316 	realtek_gpio_clear_isr(ctrl, mask_all);  in realtek_gpio_irq_init()
318 	for_each_cpu(cpu, &ctrl->cpu_irq_maskable)  in realtek_gpio_irq_init()
319 		ctrl->bank_write(realtek_gpio_irq_cpu_mask(ctrl, cpu), mask_all);  in realtek_gpio_irq_init()
363 	struct realtek_gpio_ctrl *ctrl;  in realtek_gpio_probe()  local
369 	ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);  in realtek_gpio_probe()
370 	if (!ctrl)  in realtek_gpio_probe()
384 	ctrl->base = devm_platform_ioremap_resource(pdev, 0);  in realtek_gpio_probe()
385 	if (IS_ERR(ctrl->base))  in realtek_gpio_probe()
386 		return PTR_ERR(ctrl->base);  in realtek_gpio_probe()
388 	raw_spin_lock_init(&ctrl->lock);  in realtek_gpio_probe()
392 		ctrl->bank_read = realtek_gpio_bank_read;  in realtek_gpio_probe()
393 		ctrl->bank_write = realtek_gpio_bank_write;  in realtek_gpio_probe()
394 		ctrl->line_imr_pos = realtek_gpio_line_imr_pos;  in realtek_gpio_probe()
397 		ctrl->bank_read = realtek_gpio_bank_read_swapped;  in realtek_gpio_probe()
398 		ctrl->bank_write = realtek_gpio_bank_write_swapped;  in realtek_gpio_probe()
399 		ctrl->line_imr_pos = realtek_gpio_line_imr_pos_swapped;  in realtek_gpio_probe()
402 	err = bgpio_init(&ctrl->gc, dev, 4,  in realtek_gpio_probe()
403 		ctrl->base + REALTEK_GPIO_REG_DATA, NULL, NULL,  in realtek_gpio_probe()
404 		ctrl->base + REALTEK_GPIO_REG_DIR, NULL,  in realtek_gpio_probe()
411 	ctrl->gc.ngpio = ngpios;  in realtek_gpio_probe()
412 	ctrl->gc.owner = THIS_MODULE;  in realtek_gpio_probe()
416 		girq = &ctrl->gc.irq;  in realtek_gpio_probe()
430 	cpumask_clear(&ctrl->cpu_irq_maskable);  in realtek_gpio_probe()
433 		ctrl->cpumask_base = devm_platform_get_and_ioremap_resource(pdev, 1, &res);  in realtek_gpio_probe()
434 		if (IS_ERR(ctrl->cpumask_base))  in realtek_gpio_probe()
435 			return dev_err_probe(dev, PTR_ERR(ctrl->cpumask_base),  in realtek_gpio_probe()
442 			cpumask_set_cpu(cpu, &ctrl->cpu_irq_maskable);  in realtek_gpio_probe()
445 	return devm_gpiochip_add_data(dev, &ctrl->gc, ctrl);  in realtek_gpio_probe()