123 #define GPIO_DR			(port->hwdata->dr_reg)
124 #define GPIO_GDIR		(port->hwdata->gdir_reg)
125 #define GPIO_PSR		(port->hwdata->psr_reg)
126 #define GPIO_ICR1		(port->hwdata->icr1_reg)
127 #define GPIO_ICR2		(port->hwdata->icr2_reg)
128 #define GPIO_IMR		(port->hwdata->imr_reg)
129 #define GPIO_ISR		(port->hwdata->isr_reg)
130 #define GPIO_EDGE_SEL		(port->hwdata->edge_sel_reg)
132 #define GPIO_INT_LOW_LEV	(port->hwdata->low_level)
133 #define GPIO_INT_HIGH_LEV	(port->hwdata->high_level)
134 #define GPIO_INT_RISE_EDGE	(port->hwdata->rise_edge)
135 #define GPIO_INT_FALL_EDGE	(port->hwdata->fall_edge)
163 	struct mxc_gpio_port *port = gc->private;  in gpio_set_irq_type()  local
168 	void __iomem *reg = port->base;  in gpio_set_irq_type()
170 	port->both_edges &= ~(1 << gpio_idx);  in gpio_set_irq_type()
182 			val = port->gc.get(&port->gc, gpio_idx);  in gpio_set_irq_type()
190 			port->both_edges |= 1 << gpio_idx;  in gpio_set_irq_type()
203 	raw_spin_lock_irqsave(&port->gc.bgpio_lock, flags);  in gpio_set_irq_type()
206 		val = readl(port->base + GPIO_EDGE_SEL);  in gpio_set_irq_type()
209 				port->base + GPIO_EDGE_SEL);  in gpio_set_irq_type()
212 				port->base + GPIO_EDGE_SEL);  in gpio_set_irq_type()
222 	writel(1 << gpio_idx, port->base + GPIO_ISR);  in gpio_set_irq_type()
223 	port->pad_type[gpio_idx] = type;  in gpio_set_irq_type()
225 	raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags);  in gpio_set_irq_type()
227 	return port->gc.direction_input(&port->gc, gpio_idx);  in gpio_set_irq_type()
230 static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)  in mxc_flip_edge()  argument
232 	void __iomem *reg = port->base;  in mxc_flip_edge()
237 	raw_spin_lock_irqsave(&port->gc.bgpio_lock, flags);  in mxc_flip_edge()
258 	raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags);  in mxc_flip_edge()
262 static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat)  in mxc_gpio_irq_handler()  argument
267 		if (port->both_edges & (1 << irqoffset))  in mxc_gpio_irq_handler()
268 			mxc_flip_edge(port, irqoffset);  in mxc_gpio_irq_handler()
270 		generic_handle_domain_irq(port->domain, irqoffset);  in mxc_gpio_irq_handler()
280 	struct mxc_gpio_port *port = irq_desc_get_handler_data(desc);  in mx3_gpio_irq_handler()  local
283 	if (port->is_pad_wakeup)  in mx3_gpio_irq_handler()
288 	irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR);  in mx3_gpio_irq_handler()
290 	mxc_gpio_irq_handler(port, irq_stat);  in mx3_gpio_irq_handler()
299 	struct mxc_gpio_port *port;  in mx2_gpio_irq_handler()  local
305 	list_for_each_entry(port, &mxc_gpio_ports, node) {  in mx2_gpio_irq_handler()
306 		irq_msk = readl(port->base + GPIO_IMR);  in mx2_gpio_irq_handler()
310 		irq_stat = readl(port->base + GPIO_ISR) & irq_msk;  in mx2_gpio_irq_handler()
312 			mxc_gpio_irq_handler(port, irq_stat);  in mx2_gpio_irq_handler()
329 	struct mxc_gpio_port *port = gc->private;  in gpio_set_wake_irq()  local
334 		if (port->irq_high && (gpio_idx >= 16))  in gpio_set_wake_irq()
335 			ret = enable_irq_wake(port->irq_high);  in gpio_set_wake_irq()
337 			ret = enable_irq_wake(port->irq);  in gpio_set_wake_irq()
338 		port->wakeup_pads |= (1 << gpio_idx);  in gpio_set_wake_irq()
340 		if (port->irq_high && (gpio_idx >= 16))  in gpio_set_wake_irq()
341 			ret = disable_irq_wake(port->irq_high);  in gpio_set_wake_irq()
343 			ret = disable_irq_wake(port->irq);  in gpio_set_wake_irq()
344 		port->wakeup_pads &= ~(1 << gpio_idx);  in gpio_set_wake_irq()
350 static int mxc_gpio_init_gc(struct mxc_gpio_port *port, int irq_base)  in mxc_gpio_init_gc()  argument
356 	gc = devm_irq_alloc_generic_chip(port->dev, "gpio-mxc", 1, irq_base,  in mxc_gpio_init_gc()
357 					 port->base, handle_level_irq);  in mxc_gpio_init_gc()
360 	gc->private = port;  in mxc_gpio_init_gc()
372 	rv = devm_irq_setup_generic_chip(port->dev, gc, IRQ_MSK(32),  in mxc_gpio_init_gc()
381 	struct mxc_gpio_port *port = gpiochip_get_data(gc);  in mxc_gpio_to_irq()  local
383 	return irq_find_mapping(port->domain, offset);  in mxc_gpio_to_irq()
403 static void mxc_update_irq_chained_handler(struct mxc_gpio_port *port, bool enable)  in mxc_update_irq_chained_handler()  argument
406 		irq_set_chained_handler_and_data(port->irq, port->mx_irq_handler, port);  in mxc_update_irq_chained_handler()
408 		irq_set_chained_handler_and_data(port->irq, NULL, NULL);  in mxc_update_irq_chained_handler()
411 	if (port->irq_high > 0) {  in mxc_update_irq_chained_handler()
413 			irq_set_chained_handler_and_data(port->irq_high,  in mxc_update_irq_chained_handler()
414 							 port->mx_irq_handler,  in mxc_update_irq_chained_handler()
415 							 port);  in mxc_update_irq_chained_handler()
417 			irq_set_chained_handler_and_data(port->irq_high, NULL, NULL);  in mxc_update_irq_chained_handler()
424 	struct mxc_gpio_port *port;  in mxc_gpio_probe()  local
429 	port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);  in mxc_gpio_probe()
430 	if (!port)  in mxc_gpio_probe()
433 	port->dev = &pdev->dev;  in mxc_gpio_probe()
434 	port->hwdata = device_get_match_data(&pdev->dev);  in mxc_gpio_probe()
436 	port->base = devm_platform_ioremap_resource(pdev, 0);  in mxc_gpio_probe()
437 	if (IS_ERR(port->base))  in mxc_gpio_probe()
438 		return PTR_ERR(port->base);  in mxc_gpio_probe()
445 		port->irq_high = platform_get_irq(pdev, 1);  in mxc_gpio_probe()
446 		if (port->irq_high < 0)  in mxc_gpio_probe()
447 			port->irq_high = 0;  in mxc_gpio_probe()
450 	port->irq = platform_get_irq(pdev, 0);  in mxc_gpio_probe()
451 	if (port->irq < 0)  in mxc_gpio_probe()
452 		return port->irq;  in mxc_gpio_probe()
455 	port->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);  in mxc_gpio_probe()
456 	if (IS_ERR(port->clk))  in mxc_gpio_probe()
457 		return PTR_ERR(port->clk);  in mxc_gpio_probe()
460 		port->power_off = true;  in mxc_gpio_probe()
467 	writel(0, port->base + GPIO_IMR);  in mxc_gpio_probe()
468 	writel(~0, port->base + GPIO_ISR);  in mxc_gpio_probe()
476 		port->irq_high = -1;  in mxc_gpio_probe()
477 		port->mx_irq_handler = mx2_gpio_irq_handler;  in mxc_gpio_probe()
479 		port->mx_irq_handler = mx3_gpio_irq_handler;  in mxc_gpio_probe()
481 	mxc_update_irq_chained_handler(port, true);  in mxc_gpio_probe()
482 	err = bgpio_init(&port->gc, &pdev->dev, 4,  in mxc_gpio_probe()
483 			 port->base + GPIO_PSR,  in mxc_gpio_probe()
484 			 port->base + GPIO_DR, NULL,  in mxc_gpio_probe()
485 			 port->base + GPIO_GDIR, NULL,  in mxc_gpio_probe()
490 	port->gc.request = mxc_gpio_request;  in mxc_gpio_probe()
491 	port->gc.free = mxc_gpio_free;  in mxc_gpio_probe()
492 	port->gc.to_irq = mxc_gpio_to_irq;  in mxc_gpio_probe()
493 	port->gc.base = (pdev->id < 0) ? of_alias_get_id(np, "gpio") * 32 :  in mxc_gpio_probe()
496 	err = devm_gpiochip_add_data(&pdev->dev, &port->gc, port);  in mxc_gpio_probe()
506 	port->domain = irq_domain_add_legacy(np, 32, irq_base, 0,  in mxc_gpio_probe()
508 	if (!port->domain) {  in mxc_gpio_probe()
513 	irq_domain_set_pm_device(port->domain, &pdev->dev);  in mxc_gpio_probe()
516 	err = mxc_gpio_init_gc(port, irq_base);  in mxc_gpio_probe()
520 	list_add_tail(&port->node, &mxc_gpio_ports);  in mxc_gpio_probe()
522 	platform_set_drvdata(pdev, port);  in mxc_gpio_probe()
528 	irq_domain_remove(port->domain);  in mxc_gpio_probe()
536 static void mxc_gpio_save_regs(struct mxc_gpio_port *port)  in mxc_gpio_save_regs()  argument
538 	if (!port->power_off)  in mxc_gpio_save_regs()
541 	port->gpio_saved_reg.icr1 = readl(port->base + GPIO_ICR1);  in mxc_gpio_save_regs()
542 	port->gpio_saved_reg.icr2 = readl(port->base + GPIO_ICR2);  in mxc_gpio_save_regs()
543 	port->gpio_saved_reg.imr = readl(port->base + GPIO_IMR);  in mxc_gpio_save_regs()
544 	port->gpio_saved_reg.gdir = readl(port->base + GPIO_GDIR);  in mxc_gpio_save_regs()
545 	port->gpio_saved_reg.edge_sel = readl(port->base + GPIO_EDGE_SEL);  in mxc_gpio_save_regs()
546 	port->gpio_saved_reg.dr = readl(port->base + GPIO_DR);  in mxc_gpio_save_regs()
549 static void mxc_gpio_restore_regs(struct mxc_gpio_port *port)  in mxc_gpio_restore_regs()  argument
551 	if (!port->power_off)  in mxc_gpio_restore_regs()
554 	writel(port->gpio_saved_reg.icr1, port->base + GPIO_ICR1);  in mxc_gpio_restore_regs()
555 	writel(port->gpio_saved_reg.icr2, port->base + GPIO_ICR2);  in mxc_gpio_restore_regs()
556 	writel(port->gpio_saved_reg.imr, port->base + GPIO_IMR);  in mxc_gpio_restore_regs()
557 	writel(port->gpio_saved_reg.gdir, port->base + GPIO_GDIR);  in mxc_gpio_restore_regs()
558 	writel(port->gpio_saved_reg.edge_sel, port->base + GPIO_EDGE_SEL);  in mxc_gpio_restore_regs()
559 	writel(port->gpio_saved_reg.dr, port->base + GPIO_DR);  in mxc_gpio_restore_regs()
562 static bool mxc_gpio_generic_config(struct mxc_gpio_port *port,  in mxc_gpio_generic_config()  argument
565 	struct device_node *np = port->dev->of_node;  in mxc_gpio_generic_config()
570 		return (gpiochip_generic_config(&port->gc, offset, conf) == 0);  in mxc_gpio_generic_config()
575 static bool mxc_gpio_set_pad_wakeup(struct mxc_gpio_port *port, bool enable)  in mxc_gpio_set_pad_wakeup()  argument
594 		if ((port->wakeup_pads & (1 << i))) {  in mxc_gpio_set_pad_wakeup()
595 			type = port->pad_type[i];  in mxc_gpio_set_pad_wakeup()
600 			ret |= mxc_gpio_generic_config(port, i, config);  in mxc_gpio_set_pad_wakeup()
609 	struct mxc_gpio_port *port = dev_get_drvdata(dev);  in mxc_gpio_runtime_suspend()  local
611 	mxc_gpio_save_regs(port);  in mxc_gpio_runtime_suspend()
612 	clk_disable_unprepare(port->clk);  in mxc_gpio_runtime_suspend()
613 	mxc_update_irq_chained_handler(port, false);  in mxc_gpio_runtime_suspend()
620 	struct mxc_gpio_port *port = dev_get_drvdata(dev);  in mxc_gpio_runtime_resume()  local
623 	mxc_update_irq_chained_handler(port, true);  in mxc_gpio_runtime_resume()
624 	ret = clk_prepare_enable(port->clk);  in mxc_gpio_runtime_resume()
626 		mxc_update_irq_chained_handler(port, false);  in mxc_gpio_runtime_resume()
630 	mxc_gpio_restore_regs(port);  in mxc_gpio_runtime_resume()
638 	struct mxc_gpio_port *port = platform_get_drvdata(pdev);  in mxc_gpio_noirq_suspend()  local
640 	if (port->wakeup_pads > 0)  in mxc_gpio_noirq_suspend()
641 		port->is_pad_wakeup = mxc_gpio_set_pad_wakeup(port, true);  in mxc_gpio_noirq_suspend()
649 	struct mxc_gpio_port *port = platform_get_drvdata(pdev);  in mxc_gpio_noirq_resume()  local
651 	if (port->wakeup_pads > 0)  in mxc_gpio_noirq_resume()
652 		mxc_gpio_set_pad_wakeup(port, false);  in mxc_gpio_noirq_resume()
653 	port->is_pad_wakeup = false;  in mxc_gpio_noirq_resume()
665 	struct mxc_gpio_port *port;  in mxc_gpio_syscore_suspend()  local
669 	list_for_each_entry(port, &mxc_gpio_ports, node) {  in mxc_gpio_syscore_suspend()
670 		ret = clk_prepare_enable(port->clk);  in mxc_gpio_syscore_suspend()
673 		mxc_gpio_save_regs(port);  in mxc_gpio_syscore_suspend()
674 		clk_disable_unprepare(port->clk);  in mxc_gpio_syscore_suspend()
682 	struct mxc_gpio_port *port;  in mxc_gpio_syscore_resume()  local
686 	list_for_each_entry(port, &mxc_gpio_ports, node) {  in mxc_gpio_syscore_resume()
687 		ret = clk_prepare_enable(port->clk);  in mxc_gpio_syscore_resume()
692 		mxc_gpio_restore_regs(port);  in mxc_gpio_syscore_resume()
693 		clk_disable_unprepare(port->clk);  in mxc_gpio_syscore_resume()