279 #define MTR_DIMMS_PRESENT(mtr)		((mtr) & (0x1 << 8))  argument
280 #define MTR_DRAM_WIDTH(mtr)		((((mtr) >> 6) & 0x1) ? 8 : 4)  argument
281 #define MTR_DRAM_BANKS(mtr)		((((mtr) >> 5) & 0x1) ? 8 : 4)  argument
282 #define MTR_DRAM_BANKS_ADDR_BITS(mtr)	((MTR_DRAM_BANKS(mtr) == 8) ? 3 : 2)  argument
283 #define MTR_DIMM_RANK(mtr)		(((mtr) >> 4) & 0x1)  argument
284 #define MTR_DIMM_RANK_ADDR_BITS(mtr)	(MTR_DIMM_RANK(mtr) ? 2 : 1)  argument
285 #define MTR_DIMM_ROWS(mtr)		(((mtr) >> 2) & 0x3)  argument
286 #define MTR_DIMM_ROWS_ADDR_BITS(mtr)	(MTR_DIMM_ROWS(mtr) + 13)  argument
287 #define MTR_DIMM_COLS(mtr)		((mtr) & 0x3)  argument
288 #define MTR_DIMM_COLS_ADDR_BITS(mtr)	(MTR_DIMM_COLS(mtr) + 10)  argument
953 	int mtr;  in determine_mtr()  local
965 static void decode_mtr(int slot_row, u16 mtr)  in decode_mtr()
995 	int mtr;  in handle_channel()  local
1253 	int mtr;  in i5000_init_csrows()  local