39 #define CPTX_PF_CONSTANTS(a) (0x0ll + ((u64)(a) << 36))  argument
40 #define CPTX_PF_RESET(a) (0x100ll + ((u64)(a) << 36))  argument
41 #define CPTX_PF_DIAG(a) (0x120ll + ((u64)(a) << 36))  argument
42 #define CPTX_PF_BIST_STATUS(a) (0x160ll + ((u64)(a) << 36))  argument
43 #define CPTX_PF_ECC0_CTL(a) (0x200ll + ((u64)(a) << 36))  argument
44 #define CPTX_PF_ECC0_FLIP(a) (0x210ll + ((u64)(a) << 36))  argument
45 #define CPTX_PF_ECC0_INT(a) (0x220ll + ((u64)(a) << 36))  argument
46 #define CPTX_PF_ECC0_INT_W1S(a) (0x230ll + ((u64)(a) << 36))  argument
47 #define CPTX_PF_ECC0_ENA_W1S(a)	(0x240ll + ((u64)(a) << 36))  argument
48 #define CPTX_PF_ECC0_ENA_W1C(a)	(0x250ll + ((u64)(a) << 36))  argument
49 #define CPTX_PF_MBOX_INTX(a, b)	\  argument
51 #define CPTX_PF_MBOX_INT_W1SX(a, b) \  argument
53 #define CPTX_PF_MBOX_ENA_W1CX(a, b) \  argument
55 #define CPTX_PF_MBOX_ENA_W1SX(a, b) \  argument
57 #define CPTX_PF_EXEC_INT(a) (0x500ll + 0x1000000000ll * ((a) & 0x1))  argument
58 #define CPTX_PF_EXEC_INT_W1S(a)	(0x520ll + ((u64)(a) << 36))  argument
59 #define CPTX_PF_EXEC_ENA_W1C(a)	(0x540ll + ((u64)(a) << 36))  argument
60 #define CPTX_PF_EXEC_ENA_W1S(a)	(0x560ll + ((u64)(a) << 36))  argument
61 #define CPTX_PF_GX_EN(a, b) \  argument
63 #define CPTX_PF_EXEC_INFO(a) (0x700ll + ((u64)(a) << 36))  argument
64 #define CPTX_PF_EXEC_BUSY(a) (0x800ll + ((u64)(a) << 36))  argument
65 #define CPTX_PF_EXEC_INFO0(a) (0x900ll + ((u64)(a) << 36))  argument
66 #define CPTX_PF_EXEC_INFO1(a) (0x910ll + ((u64)(a) << 36))  argument
67 #define CPTX_PF_INST_REQ_PC(a) (0x10000ll + ((u64)(a) << 36))  argument
68 #define CPTX_PF_INST_LATENCY_PC(a) \  argument
70 #define CPTX_PF_RD_REQ_PC(a) (0x10040ll + ((u64)(a) << 36))  argument
71 #define CPTX_PF_RD_LATENCY_PC(a) (0x10060ll + ((u64)(a) << 36))  argument
72 #define CPTX_PF_RD_UC_PC(a) (0x10080ll + ((u64)(a) << 36))  argument
73 #define CPTX_PF_ACTIVE_CYCLES_PC(a) (0x10100ll + ((u64)(a) << 36))  argument
74 #define CPTX_PF_EXE_CTL(a) (0x4000000ll + ((u64)(a) << 36))  argument
75 #define CPTX_PF_EXE_STATUS(a) (0x4000008ll + ((u64)(a) << 36))  argument
76 #define CPTX_PF_EXE_CLK(a) (0x4000010ll + ((u64)(a) << 36))  argument
77 #define CPTX_PF_EXE_DBG_CTL(a) (0x4000018ll + ((u64)(a) << 36))  argument
78 #define CPTX_PF_EXE_DBG_DATA(a)	(0x4000020ll + ((u64)(a) << 36))  argument
79 #define CPTX_PF_EXE_BIST_STATUS(a) (0x4000028ll + ((u64)(a) << 36))  argument
80 #define CPTX_PF_EXE_REQ_TIMER(a) (0x4000030ll + ((u64)(a) << 36))  argument
81 #define CPTX_PF_EXE_MEM_CTL(a) (0x4000038ll + ((u64)(a) << 36))  argument
82 #define CPTX_PF_EXE_PERF_CTL(a)	(0x4001000ll + ((u64)(a) << 36))  argument
83 #define CPTX_PF_EXE_DBG_CNTX(a, b) \  argument
85 #define CPTX_PF_EXE_PERF_EVENT_CNT(a) (0x4001180ll + ((u64)(a) << 36))  argument
86 #define CPTX_PF_EXE_EPCI_INBX_CNT(a, b) \  argument
88 #define CPTX_PF_EXE_EPCI_OUTBX_CNT(a, b) \  argument
90 #define CPTX_PF_ENGX_UCODE_BASE(a, b) \  argument
92 #define CPTX_PF_QX_CTL(a, b) \  argument
94 #define CPTX_PF_QX_GMCTL(a, b) \  argument
96 #define CPTX_PF_QX_CTL2(a, b) \  argument
98 #define CPTX_PF_VFX_MBOXX(a, b, c) \  argument
102 #define CPTX_VQX_CTL(a, b) (0x100ll + ((u64)(a) << 36) + ((b) << 20))  argument
103 #define CPTX_VQX_SADDR(a, b) (0x200ll + ((u64)(a) << 36) + ((b) << 20))  argument
104 #define CPTX_VQX_DONE_WAIT(a, b) (0x400ll + ((u64)(a) << 36) + ((b) << 20))  argument
105 #define CPTX_VQX_INPROG(a, b) (0x410ll + ((u64)(a) << 36) + ((b) << 20))  argument
106 #define CPTX_VQX_DONE(a, b) (0x420ll + ((u64)(a) << 36) + ((b) << 20))  argument
107 #define CPTX_VQX_DONE_ACK(a, b) (0x440ll + ((u64)(a) << 36) + ((b) << 20))  argument
108 #define CPTX_VQX_DONE_INT_W1S(a, b) (0x460ll + ((u64)(a) << 36) + ((b) << 20))  argument
109 #define CPTX_VQX_DONE_INT_W1C(a, b) (0x468ll + ((u64)(a) << 36) + ((b) << 20))  argument
110 #define CPTX_VQX_DONE_ENA_W1S(a, b) (0x470ll + ((u64)(a) << 36) + ((b) << 20))  argument
111 #define CPTX_VQX_DONE_ENA_W1C(a, b) (0x478ll + ((u64)(a) << 36) + ((b) << 20))  argument
112 #define CPTX_VQX_MISC_INT(a, b)	(0x500ll + ((u64)(a) << 36) + ((b) << 20))  argument
113 #define CPTX_VQX_MISC_INT_W1S(a, b) (0x508ll + ((u64)(a) << 36) + ((b) << 20))  argument
114 #define CPTX_VQX_MISC_ENA_W1S(a, b) (0x510ll + ((u64)(a) << 36) + ((b) << 20))  argument
115 #define CPTX_VQX_MISC_ENA_W1C(a, b) (0x518ll + ((u64)(a) << 36) + ((b) << 20))  argument
116 #define CPTX_VQX_DOORBELL(a, b) (0x600ll + ((u64)(a) << 36) + ((b) << 20))  argument
117 #define CPTX_VFX_PF_MBOXX(a, b, c) \  argument