36 	struct dpll_data *ad;  in dra7_apll_enable()  local
41 	ad = clk->dpll_data;  in dra7_apll_enable()
42 	if (!ad)  in dra7_apll_enable()
47 	state <<= __ffs(ad->idlest_mask);  in dra7_apll_enable()
50 	v = ti_clk_ll_ops->clk_readl(&ad->idlest_reg);  in dra7_apll_enable()
52 	if ((v & ad->idlest_mask) == state)  in dra7_apll_enable()
55 	v = ti_clk_ll_ops->clk_readl(&ad->control_reg);  in dra7_apll_enable()
56 	v &= ~ad->enable_mask;  in dra7_apll_enable()
57 	v |= APLL_FORCE_LOCK << __ffs(ad->enable_mask);  in dra7_apll_enable()
58 	ti_clk_ll_ops->clk_writel(v, &ad->control_reg);  in dra7_apll_enable()
60 	state <<= __ffs(ad->idlest_mask);  in dra7_apll_enable()
63 		v = ti_clk_ll_ops->clk_readl(&ad->idlest_reg);  in dra7_apll_enable()
64 		if ((v & ad->idlest_mask) == state)  in dra7_apll_enable()
86 	struct dpll_data *ad;  in dra7_apll_disable()  local
90 	ad = clk->dpll_data;  in dra7_apll_disable()
92 	state <<= __ffs(ad->idlest_mask);  in dra7_apll_disable()
94 	v = ti_clk_ll_ops->clk_readl(&ad->control_reg);  in dra7_apll_disable()
95 	v &= ~ad->enable_mask;  in dra7_apll_disable()
96 	v |= APLL_AUTO_IDLE << __ffs(ad->enable_mask);  in dra7_apll_disable()
97 	ti_clk_ll_ops->clk_writel(v, &ad->control_reg);  in dra7_apll_disable()
103 	struct dpll_data *ad;  in dra7_apll_is_enabled()  local
106 	ad = clk->dpll_data;  in dra7_apll_is_enabled()
108 	v = ti_clk_ll_ops->clk_readl(&ad->control_reg);  in dra7_apll_is_enabled()
109 	v &= ad->enable_mask;  in dra7_apll_is_enabled()
111 	v >>= __ffs(ad->enable_mask);  in dra7_apll_is_enabled()
133 	struct dpll_data *ad = clk_hw->dpll_data;  in omap_clk_register_apll()  local
148 	ad->clk_ref = __clk_get_hw(clk);  in omap_clk_register_apll()
160 	ad->clk_bypass = __clk_get_hw(clk);  in omap_clk_register_apll()
180 	struct dpll_data *ad = NULL;  in of_dra7_apll_setup()  local
186 	ad = kzalloc(sizeof(*ad), GFP_KERNEL);  in of_dra7_apll_setup()
189 	if (!ad || !clk_hw || !init)  in of_dra7_apll_setup()
192 	clk_hw->dpll_data = ad;  in of_dra7_apll_setup()
212 	ret = ti_clk_get_reg_addr(node, 0, &ad->control_reg);  in of_dra7_apll_setup()
213 	ret |= ti_clk_get_reg_addr(node, 1, &ad->idlest_reg);  in of_dra7_apll_setup()
218 	ad->idlest_mask = 0x1;  in of_dra7_apll_setup()
219 	ad->enable_mask = 0x3;  in of_dra7_apll_setup()
226 	kfree(ad);  in of_dra7_apll_setup()
238 	struct dpll_data *ad = clk->dpll_data;  in omap2_apll_is_enabled()  local
241 	v = ti_clk_ll_ops->clk_readl(&ad->control_reg);  in omap2_apll_is_enabled()
242 	v &= ad->enable_mask;  in omap2_apll_is_enabled()
244 	v >>= __ffs(ad->enable_mask);  in omap2_apll_is_enabled()
263 	struct dpll_data *ad = clk->dpll_data;  in omap2_apll_enable()  local
267 	v = ti_clk_ll_ops->clk_readl(&ad->control_reg);  in omap2_apll_enable()
268 	v &= ~ad->enable_mask;  in omap2_apll_enable()
269 	v |= OMAP2_EN_APLL_LOCKED << __ffs(ad->enable_mask);  in omap2_apll_enable()
270 	ti_clk_ll_ops->clk_writel(v, &ad->control_reg);  in omap2_apll_enable()
273 		v = ti_clk_ll_ops->clk_readl(&ad->idlest_reg);  in omap2_apll_enable()
274 		if (v & ad->idlest_mask)  in omap2_apll_enable()
294 	struct dpll_data *ad = clk->dpll_data;  in omap2_apll_disable()  local
297 	v = ti_clk_ll_ops->clk_readl(&ad->control_reg);  in omap2_apll_disable()
298 	v &= ~ad->enable_mask;  in omap2_apll_disable()
299 	v |= OMAP2_EN_APLL_STOPPED << __ffs(ad->enable_mask);  in omap2_apll_disable()
300 	ti_clk_ll_ops->clk_writel(v, &ad->control_reg);  in omap2_apll_disable()
312 	struct dpll_data *ad = clk->dpll_data;  in omap2_apll_set_autoidle()  local
315 	v = ti_clk_ll_ops->clk_readl(&ad->autoidle_reg);  in omap2_apll_set_autoidle()
316 	v &= ~ad->autoidle_mask;  in omap2_apll_set_autoidle()
317 	v |= val << __ffs(ad->autoidle_mask);  in omap2_apll_set_autoidle()
318 	ti_clk_ll_ops->clk_writel(v, &ad->control_reg);  in omap2_apll_set_autoidle()
341 	struct dpll_data *ad = NULL;  in of_omap2_apll_setup()  local
350 	ad = kzalloc(sizeof(*ad), GFP_KERNEL);  in of_omap2_apll_setup()
354 	if (!ad || !clk_hw || !init)  in of_omap2_apll_setup()
357 	clk_hw->dpll_data = ad;  in of_omap2_apll_setup()
385 	ad->enable_mask = 0x3 << val;  in of_omap2_apll_setup()
386 	ad->autoidle_mask = 0x3 << val;  in of_omap2_apll_setup()
393 	ad->idlest_mask = 1 << val;  in of_omap2_apll_setup()
395 	ret = ti_clk_get_reg_addr(node, 0, &ad->control_reg);  in of_omap2_apll_setup()
396 	ret |= ti_clk_get_reg_addr(node, 1, &ad->autoidle_reg);  in of_omap2_apll_setup()
397 	ret |= ti_clk_get_reg_addr(node, 2, &ad->idlest_reg);  in of_omap2_apll_setup()
410 	kfree(ad);  in of_omap2_apll_setup()