Lines Matching refs:d
173 static const char *ti_adpll_clk_get_name(struct ti_adpll_data *d, in ti_adpll_clk_get_name() argument
181 err = of_property_read_string_index(d->np, in ti_adpll_clk_get_name()
188 name = devm_kasprintf(d->dev, GFP_KERNEL, "%08lx.adpll.%s", in ti_adpll_clk_get_name()
189 d->pa, postfix); in ti_adpll_clk_get_name()
197 static int ti_adpll_setup_clock(struct ti_adpll_data *d, struct clk *clock, in ti_adpll_setup_clock() argument
205 d->clocks[index].clk = clock; in ti_adpll_setup_clock()
206 d->clocks[index].unregister = unregister; in ti_adpll_setup_clock()
212 dev_warn(d->dev, "clock %s con_id lookup may fail\n", in ti_adpll_setup_clock()
214 snprintf(con_id, 16, "pll%03lx%s", d->pa & 0xfff, postfix + 1); in ti_adpll_setup_clock()
218 d->clocks[index].cl = cl; in ti_adpll_setup_clock()
220 dev_warn(d->dev, "no con_id for clock %s\n", name); in ti_adpll_setup_clock()
226 d->outputs.clks[output_index] = clock; in ti_adpll_setup_clock()
227 d->outputs.clk_num++; in ti_adpll_setup_clock()
232 static int ti_adpll_init_divider(struct ti_adpll_data *d, in ti_adpll_init_divider() argument
244 child_name = ti_adpll_clk_get_name(d, output_index, name); in ti_adpll_init_divider()
249 clock = clk_register_divider(d->dev, child_name, parent_name, 0, in ti_adpll_init_divider()
251 &d->lock); in ti_adpll_init_divider()
253 dev_err(d->dev, "failed to register divider %s: %li\n", in ti_adpll_init_divider()
258 return ti_adpll_setup_clock(d, clock, index, output_index, child_name, in ti_adpll_init_divider()
262 static int ti_adpll_init_mux(struct ti_adpll_data *d, in ti_adpll_init_mux() argument
273 child_name = ti_adpll_clk_get_name(d, -ENODEV, name); in ti_adpll_init_mux()
278 clock = clk_register_mux(d->dev, child_name, parents, 2, 0, in ti_adpll_init_mux()
279 reg, shift, 1, 0, &d->lock); in ti_adpll_init_mux()
281 dev_err(d->dev, "failed to register mux %s: %li\n", in ti_adpll_init_mux()
286 return ti_adpll_setup_clock(d, clock, index, -ENODEV, child_name, in ti_adpll_init_mux()
290 static int ti_adpll_init_gate(struct ti_adpll_data *d, in ti_adpll_init_gate() argument
302 child_name = ti_adpll_clk_get_name(d, output_index, name); in ti_adpll_init_gate()
307 clock = clk_register_gate(d->dev, child_name, parent_name, 0, in ti_adpll_init_gate()
309 &d->lock); in ti_adpll_init_gate()
311 dev_err(d->dev, "failed to register gate %s: %li\n", in ti_adpll_init_gate()
316 return ti_adpll_setup_clock(d, clock, index, output_index, child_name, in ti_adpll_init_gate()
320 static int ti_adpll_init_fixed_factor(struct ti_adpll_data *d, in ti_adpll_init_fixed_factor() argument
331 child_name = ti_adpll_clk_get_name(d, -ENODEV, name); in ti_adpll_init_fixed_factor()
336 clock = clk_register_fixed_factor(d->dev, child_name, parent_name, in ti_adpll_init_fixed_factor()
341 return ti_adpll_setup_clock(d, clock, index, -ENODEV, child_name, in ti_adpll_init_fixed_factor()
345 static void ti_adpll_set_idle_bypass(struct ti_adpll_data *d) in ti_adpll_set_idle_bypass() argument
350 spin_lock_irqsave(&d->lock, flags); in ti_adpll_set_idle_bypass()
351 v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET); in ti_adpll_set_idle_bypass()
353 writel_relaxed(v, d->regs + ADPLL_CLKCTRL_OFFSET); in ti_adpll_set_idle_bypass()
354 spin_unlock_irqrestore(&d->lock, flags); in ti_adpll_set_idle_bypass()
357 static void ti_adpll_clear_idle_bypass(struct ti_adpll_data *d) in ti_adpll_clear_idle_bypass() argument
362 spin_lock_irqsave(&d->lock, flags); in ti_adpll_clear_idle_bypass()
363 v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET); in ti_adpll_clear_idle_bypass()
365 writel_relaxed(v, d->regs + ADPLL_CLKCTRL_OFFSET); in ti_adpll_clear_idle_bypass()
366 spin_unlock_irqrestore(&d->lock, flags); in ti_adpll_clear_idle_bypass()
369 static bool ti_adpll_clock_is_bypass(struct ti_adpll_data *d) in ti_adpll_clock_is_bypass() argument
373 v = readl_relaxed(d->regs + ADPLL_STATUS_OFFSET); in ti_adpll_clock_is_bypass()
383 static bool ti_adpll_is_locked(struct ti_adpll_data *d) in ti_adpll_is_locked() argument
385 u32 v = readl_relaxed(d->regs + ADPLL_STATUS_OFFSET); in ti_adpll_is_locked()
390 static int ti_adpll_wait_lock(struct ti_adpll_data *d) in ti_adpll_wait_lock() argument
395 if (ti_adpll_is_locked(d)) in ti_adpll_wait_lock()
400 dev_err(d->dev, "pll failed to lock\n"); in ti_adpll_wait_lock()
407 struct ti_adpll_data *d = to_adpll(dco); in ti_adpll_prepare() local
409 ti_adpll_clear_idle_bypass(d); in ti_adpll_prepare()
410 ti_adpll_wait_lock(d); in ti_adpll_prepare()
418 struct ti_adpll_data *d = to_adpll(dco); in ti_adpll_unprepare() local
420 ti_adpll_set_idle_bypass(d); in ti_adpll_unprepare()
426 struct ti_adpll_data *d = to_adpll(dco); in ti_adpll_is_prepared() local
428 return ti_adpll_is_locked(d); in ti_adpll_is_prepared()
439 struct ti_adpll_data *d = to_adpll(dco); in ti_adpll_recalc_rate() local
444 if (ti_adpll_clock_is_bypass(d)) in ti_adpll_recalc_rate()
447 spin_lock_irqsave(&d->lock, flags); in ti_adpll_recalc_rate()
448 frac_m = readl_relaxed(d->regs + ADPLL_FRACDIV_OFFSET); in ti_adpll_recalc_rate()
450 rate = (u64)readw_relaxed(d->regs + ADPLL_MN2DIV_OFFSET) << 18; in ti_adpll_recalc_rate()
453 divider = (readw_relaxed(d->regs + ADPLL_M2NDIV_OFFSET) + 1) << 18; in ti_adpll_recalc_rate()
454 spin_unlock_irqrestore(&d->lock, flags); in ti_adpll_recalc_rate()
458 if (d->c->is_type_s) { in ti_adpll_recalc_rate()
459 v = readl_relaxed(d->regs + ADPLL_CLKCTRL_OFFSET); in ti_adpll_recalc_rate()
482 static int ti_adpll_init_dco(struct ti_adpll_data *d) in ti_adpll_init_dco() argument
489 d->outputs.clks = devm_kcalloc(d->dev, in ti_adpll_init_dco()
493 if (!d->outputs.clks) in ti_adpll_init_dco()
496 if (d->c->output_index < 0) in ti_adpll_init_dco()
501 init.name = ti_adpll_clk_get_name(d, d->c->output_index, postfix); in ti_adpll_init_dco()
505 init.parent_names = d->parent_names; in ti_adpll_init_dco()
506 init.num_parents = d->c->nr_max_inputs; in ti_adpll_init_dco()
509 d->dco.hw.init = &init; in ti_adpll_init_dco()
511 if (d->c->is_type_s) in ti_adpll_init_dco()
517 err = ti_adpll_init_divider(d, TI_ADPLL_N2, -ENODEV, "n2", in ti_adpll_init_dco()
518 d->parent_clocks[TI_ADPLL_CLKINP], in ti_adpll_init_dco()
519 d->regs + ADPLL_MN2DIV_OFFSET, in ti_adpll_init_dco()
524 clock = devm_clk_register(d->dev, &d->dco.hw); in ti_adpll_init_dco()
528 return ti_adpll_setup_clock(d, clock, TI_ADPLL_DCO, d->c->output_index, in ti_adpll_init_dco()
565 struct ti_adpll_data *d = co->adpll; in ti_adpll_clkout_get_parent() local
567 return ti_adpll_clock_is_bypass(d); in ti_adpll_clkout_get_parent()
570 static int ti_adpll_init_clkout(struct ti_adpll_data *d, in ti_adpll_init_clkout() argument
584 co = devm_kzalloc(d->dev, sizeof(*co), GFP_KERNEL); in ti_adpll_init_clkout()
587 co->adpll = d; in ti_adpll_init_clkout()
589 err = of_property_read_string_index(d->np, in ti_adpll_init_clkout()
596 ops = devm_kzalloc(d->dev, sizeof(*ops), GFP_KERNEL); in ti_adpll_init_clkout()
612 co->gate.lock = &d->lock; in ti_adpll_init_clkout()
613 co->gate.reg = d->regs + ADPLL_CLKCTRL_OFFSET; in ti_adpll_init_clkout()
620 clock = devm_clk_register(d->dev, &co->hw); in ti_adpll_init_clkout()
622 dev_err(d->dev, "failed to register output %s: %li\n", in ti_adpll_init_clkout()
627 return ti_adpll_setup_clock(d, clock, index, output_index, child_name, in ti_adpll_init_clkout()
631 static int ti_adpll_init_children_adpll_s(struct ti_adpll_data *d) in ti_adpll_init_children_adpll_s() argument
635 if (!d->c->is_type_s) in ti_adpll_init_children_adpll_s()
639 err = ti_adpll_init_mux(d, TI_ADPLL_BYPASS, "bypass", in ti_adpll_init_children_adpll_s()
640 d->clocks[TI_ADPLL_N2].clk, in ti_adpll_init_children_adpll_s()
641 d->parent_clocks[TI_ADPLL_CLKINPULOW], in ti_adpll_init_children_adpll_s()
642 d->regs + ADPLL_CLKCTRL_OFFSET, in ti_adpll_init_children_adpll_s()
648 err = ti_adpll_init_divider(d, TI_ADPLL_M2, -ENODEV, "m2", in ti_adpll_init_children_adpll_s()
649 d->clocks[TI_ADPLL_DCO].clk, in ti_adpll_init_children_adpll_s()
650 d->regs + ADPLL_M2NDIV_OFFSET, in ti_adpll_init_children_adpll_s()
658 err = ti_adpll_init_fixed_factor(d, TI_ADPLL_DIV2, "div2", in ti_adpll_init_children_adpll_s()
659 d->clocks[TI_ADPLL_M2].clk, in ti_adpll_init_children_adpll_s()
665 err = ti_adpll_init_clkout(d, TI_ADPLL_CLKOUT, TI_ADPLL_S_CLKOUT, in ti_adpll_init_children_adpll_s()
667 d->clocks[TI_ADPLL_DIV2].clk, in ti_adpll_init_children_adpll_s()
668 d->clocks[TI_ADPLL_BYPASS].clk); in ti_adpll_init_children_adpll_s()
673 err = ti_adpll_init_clkout(d, TI_ADPLL_CLKOUT2, TI_ADPLL_S_CLKOUTX2, 0, in ti_adpll_init_children_adpll_s()
674 "clkout2", d->clocks[TI_ADPLL_M2].clk, in ti_adpll_init_children_adpll_s()
675 d->clocks[TI_ADPLL_BYPASS].clk); in ti_adpll_init_children_adpll_s()
680 if (d->parent_clocks[TI_ADPLL_CLKINPHIF]) { in ti_adpll_init_children_adpll_s()
681 err = ti_adpll_init_mux(d, TI_ADPLL_HIF, "hif", in ti_adpll_init_children_adpll_s()
682 d->clocks[TI_ADPLL_DCO].clk, in ti_adpll_init_children_adpll_s()
683 d->parent_clocks[TI_ADPLL_CLKINPHIF], in ti_adpll_init_children_adpll_s()
684 d->regs + ADPLL_CLKCTRL_OFFSET, in ti_adpll_init_children_adpll_s()
691 err = ti_adpll_init_divider(d, TI_ADPLL_M3, TI_ADPLL_S_CLKOUTHIF, "m3", in ti_adpll_init_children_adpll_s()
692 d->clocks[TI_ADPLL_HIF].clk, in ti_adpll_init_children_adpll_s()
693 d->regs + ADPLL_M3DIV_OFFSET, in ti_adpll_init_children_adpll_s()
705 static int ti_adpll_init_children_adpll_lj(struct ti_adpll_data *d) in ti_adpll_init_children_adpll_lj() argument
709 if (d->c->is_type_s) in ti_adpll_init_children_adpll_lj()
713 err = ti_adpll_init_gate(d, TI_ADPLL_DCO_GATE, TI_ADPLL_LJ_CLKDCOLDO, in ti_adpll_init_children_adpll_lj()
714 "clkdcoldo", d->clocks[TI_ADPLL_DCO].clk, in ti_adpll_init_children_adpll_lj()
715 d->regs + ADPLL_CLKCTRL_OFFSET, in ti_adpll_init_children_adpll_lj()
721 err = ti_adpll_init_divider(d, TI_ADPLL_M2, -ENODEV, in ti_adpll_init_children_adpll_lj()
722 "m2", d->clocks[TI_ADPLL_DCO].clk, in ti_adpll_init_children_adpll_lj()
723 d->regs + ADPLL_M2NDIV_OFFSET, in ti_adpll_init_children_adpll_lj()
731 err = ti_adpll_init_gate(d, TI_ADPLL_M2_GATE, TI_ADPLL_LJ_CLKOUTLDO, in ti_adpll_init_children_adpll_lj()
732 "clkoutldo", d->clocks[TI_ADPLL_M2].clk, in ti_adpll_init_children_adpll_lj()
733 d->regs + ADPLL_CLKCTRL_OFFSET, in ti_adpll_init_children_adpll_lj()
740 err = ti_adpll_init_mux(d, TI_ADPLL_BYPASS, "bypass", in ti_adpll_init_children_adpll_lj()
741 d->clocks[TI_ADPLL_N2].clk, in ti_adpll_init_children_adpll_lj()
742 d->parent_clocks[TI_ADPLL_CLKINPULOW], in ti_adpll_init_children_adpll_lj()
743 d->regs + ADPLL_CLKCTRL_OFFSET, in ti_adpll_init_children_adpll_lj()
749 err = ti_adpll_init_clkout(d, TI_ADPLL_CLKOUT, TI_ADPLL_S_CLKOUT, in ti_adpll_init_children_adpll_lj()
751 d->clocks[TI_ADPLL_M2].clk, in ti_adpll_init_children_adpll_lj()
752 d->clocks[TI_ADPLL_BYPASS].clk); in ti_adpll_init_children_adpll_lj()
759 static void ti_adpll_free_resources(struct ti_adpll_data *d) in ti_adpll_free_resources() argument
764 struct ti_adpll_clock *ac = &d->clocks[i]; in ti_adpll_free_resources()
785 static int ti_adpll_init_registers(struct ti_adpll_data *d) in ti_adpll_init_registers() argument
789 if (d->c->is_type_s) { in ti_adpll_init_registers()
791 ti_adpll_unlock_all(d->iobase + ADPLL_PLLSS_MMR_LOCK_OFFSET); in ti_adpll_init_registers()
794 d->regs = d->iobase + register_offset + ADPLL_PWRCTRL_OFFSET; in ti_adpll_init_registers()
799 static int ti_adpll_init_inputs(struct ti_adpll_data *d) in ti_adpll_init_inputs() argument
805 nr_inputs = of_clk_get_parent_count(d->np); in ti_adpll_init_inputs()
806 if (nr_inputs < d->c->nr_max_inputs) { in ti_adpll_init_inputs()
807 dev_err(d->dev, error, nr_inputs); in ti_adpll_init_inputs()
810 of_clk_parent_fill(d->np, d->parent_names, nr_inputs); in ti_adpll_init_inputs()
812 clock = devm_clk_get(d->dev, d->parent_names[0]); in ti_adpll_init_inputs()
814 dev_err(d->dev, "could not get clkinp\n"); in ti_adpll_init_inputs()
817 d->parent_clocks[TI_ADPLL_CLKINP] = clock; in ti_adpll_init_inputs()
819 clock = devm_clk_get(d->dev, d->parent_names[1]); in ti_adpll_init_inputs()
821 dev_err(d->dev, "could not get clkinpulow clock\n"); in ti_adpll_init_inputs()
824 d->parent_clocks[TI_ADPLL_CLKINPULOW] = clock; in ti_adpll_init_inputs()
826 if (d->c->is_type_s) { in ti_adpll_init_inputs()
827 clock = devm_clk_get(d->dev, d->parent_names[2]); in ti_adpll_init_inputs()
829 dev_err(d->dev, "could not get clkinphif clock\n"); in ti_adpll_init_inputs()
832 d->parent_clocks[TI_ADPLL_CLKINPHIF] = clock; in ti_adpll_init_inputs()
865 struct ti_adpll_data *d; in ti_adpll_probe() local
875 d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL); in ti_adpll_probe()
876 if (!d) in ti_adpll_probe()
878 d->dev = dev; in ti_adpll_probe()
879 d->np = node; in ti_adpll_probe()
880 d->c = pdata; in ti_adpll_probe()
881 dev_set_drvdata(d->dev, d); in ti_adpll_probe()
882 spin_lock_init(&d->lock); in ti_adpll_probe()
884 d->iobase = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in ti_adpll_probe()
885 if (IS_ERR(d->iobase)) in ti_adpll_probe()
886 return PTR_ERR(d->iobase); in ti_adpll_probe()
887 d->pa = res->start; in ti_adpll_probe()
889 err = ti_adpll_init_registers(d); in ti_adpll_probe()
893 err = ti_adpll_init_inputs(d); in ti_adpll_probe()
897 d->clocks = devm_kcalloc(d->dev, in ti_adpll_probe()
901 if (!d->clocks) in ti_adpll_probe()
904 err = ti_adpll_init_dco(d); in ti_adpll_probe()
910 err = ti_adpll_init_children_adpll_s(d); in ti_adpll_probe()
913 err = ti_adpll_init_children_adpll_lj(d); in ti_adpll_probe()
917 err = of_clk_add_provider(d->np, of_clk_src_onecell_get, &d->outputs); in ti_adpll_probe()
925 ti_adpll_free_resources(d); in ti_adpll_probe()
932 struct ti_adpll_data *d = dev_get_drvdata(&pdev->dev); in ti_adpll_remove() local
934 ti_adpll_free_resources(d); in ti_adpll_remove()