68 			    struct rockchip_cpuclk *cpuclk, unsigned long rate)  in rockchip_get_cpuclk_settings()  argument
71 							cpuclk->rate_table;  in rockchip_get_cpuclk_settings()
74 	for (i = 0; i < cpuclk->rate_count; i++) {  in rockchip_get_cpuclk_settings()
85 	struct rockchip_cpuclk *cpuclk = to_rockchip_cpuclk_hw(hw);  in rockchip_cpuclk_recalc_rate()  local
86 	const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data;  in rockchip_cpuclk_recalc_rate()
87 	u32 clksel0 = readl_relaxed(cpuclk->reg_base + reg_data->core_reg[0]);  in rockchip_cpuclk_recalc_rate()
98 static void rockchip_cpuclk_set_dividers(struct rockchip_cpuclk *cpuclk,  in rockchip_cpuclk_set_dividers()  argument
112 		writel(clksel->val, cpuclk->reg_base + clksel->reg);  in rockchip_cpuclk_set_dividers()
116 static void rockchip_cpuclk_set_pre_muxs(struct rockchip_cpuclk *cpuclk,  in rockchip_cpuclk_set_pre_muxs()  argument
130 		writel(clksel->val, cpuclk->reg_base + clksel->reg);  in rockchip_cpuclk_set_pre_muxs()
134 static void rockchip_cpuclk_set_post_muxs(struct rockchip_cpuclk *cpuclk,  in rockchip_cpuclk_set_post_muxs()  argument
148 		writel(clksel->val, cpuclk->reg_base + clksel->reg);  in rockchip_cpuclk_set_post_muxs()
152 static int rockchip_cpuclk_pre_rate_change(struct rockchip_cpuclk *cpuclk,  in rockchip_cpuclk_pre_rate_change()  argument
155 	const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data;  in rockchip_cpuclk_pre_rate_change()
162 	rate = rockchip_get_cpuclk_settings(cpuclk, ndata->new_rate);  in rockchip_cpuclk_pre_rate_change()
169 	alt_prate = clk_get_rate(cpuclk->alt_parent);  in rockchip_cpuclk_pre_rate_change()
171 	spin_lock_irqsave(cpuclk->lock, flags);  in rockchip_cpuclk_pre_rate_change()
201 			       cpuclk->reg_base + reg_data->core_reg[i]);  in rockchip_cpuclk_pre_rate_change()
205 	rockchip_cpuclk_set_pre_muxs(cpuclk, rate);  in rockchip_cpuclk_pre_rate_change()
212 		       cpuclk->reg_base + reg_data->mux_core_reg);  in rockchip_cpuclk_pre_rate_change()
217 		       cpuclk->reg_base + reg_data->core_reg[0]);  in rockchip_cpuclk_pre_rate_change()
219 	spin_unlock_irqrestore(cpuclk->lock, flags);  in rockchip_cpuclk_pre_rate_change()
223 static int rockchip_cpuclk_post_rate_change(struct rockchip_cpuclk *cpuclk,  in rockchip_cpuclk_post_rate_change()  argument
226 	const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data;  in rockchip_cpuclk_post_rate_change()
231 	rate = rockchip_get_cpuclk_settings(cpuclk, ndata->new_rate);  in rockchip_cpuclk_post_rate_change()
238 	spin_lock_irqsave(cpuclk->lock, flags);  in rockchip_cpuclk_post_rate_change()
241 		rockchip_cpuclk_set_dividers(cpuclk, rate);  in rockchip_cpuclk_post_rate_change()
254 		       cpuclk->reg_base + reg_data->mux_core_reg);  in rockchip_cpuclk_post_rate_change()
259 		       cpuclk->reg_base + reg_data->core_reg[0]);  in rockchip_cpuclk_post_rate_change()
261 	rockchip_cpuclk_set_post_muxs(cpuclk, rate);  in rockchip_cpuclk_post_rate_change()
267 		       cpuclk->reg_base + reg_data->core_reg[i]);  in rockchip_cpuclk_post_rate_change()
271 		rockchip_cpuclk_set_dividers(cpuclk, rate);  in rockchip_cpuclk_post_rate_change()
273 	spin_unlock_irqrestore(cpuclk->lock, flags);  in rockchip_cpuclk_post_rate_change()
287 	struct rockchip_cpuclk *cpuclk = to_rockchip_cpuclk_nb(nb);  in rockchip_cpuclk_notifier_cb()  local
293 		ret = rockchip_cpuclk_pre_rate_change(cpuclk, ndata);  in rockchip_cpuclk_notifier_cb()
295 		ret = rockchip_cpuclk_post_rate_change(cpuclk, ndata);  in rockchip_cpuclk_notifier_cb()
306 	struct rockchip_cpuclk *cpuclk;  in rockchip_clk_register_cpuclk()  local
316 	cpuclk = kzalloc(sizeof(*cpuclk), GFP_KERNEL);  in rockchip_clk_register_cpuclk()
317 	if (!cpuclk)  in rockchip_clk_register_cpuclk()
333 	cpuclk->reg_base = reg_base;  in rockchip_clk_register_cpuclk()
334 	cpuclk->lock = lock;  in rockchip_clk_register_cpuclk()
335 	cpuclk->reg_data = reg_data;  in rockchip_clk_register_cpuclk()
336 	cpuclk->clk_nb.notifier_call = rockchip_cpuclk_notifier_cb;  in rockchip_clk_register_cpuclk()
337 	cpuclk->hw.init = &init;  in rockchip_clk_register_cpuclk()
339 	cpuclk->alt_parent = __clk_lookup(parent_names[reg_data->mux_core_alt]);  in rockchip_clk_register_cpuclk()
340 	if (!cpuclk->alt_parent) {  in rockchip_clk_register_cpuclk()
347 	ret = clk_prepare_enable(cpuclk->alt_parent);  in rockchip_clk_register_cpuclk()
363 	ret = clk_notifier_register(clk, &cpuclk->clk_nb);  in rockchip_clk_register_cpuclk()
371 		cpuclk->rate_count = nrates;  in rockchip_clk_register_cpuclk()
372 		cpuclk->rate_table = kmemdup(rates,  in rockchip_clk_register_cpuclk()
375 		if (!cpuclk->rate_table) {  in rockchip_clk_register_cpuclk()
381 	cclk = clk_register(NULL, &cpuclk->hw);  in rockchip_clk_register_cpuclk()
391 	kfree(cpuclk->rate_table);  in rockchip_clk_register_cpuclk()
393 	clk_notifier_unregister(clk, &cpuclk->clk_nb);  in rockchip_clk_register_cpuclk()
395 	clk_disable_unprepare(cpuclk->alt_parent);  in rockchip_clk_register_cpuclk()
397 	kfree(cpuclk);  in rockchip_clk_register_cpuclk()