88 	u8 clk;  member
93 	u8 clk;  member
129 			u8 clk;  member
147 	u8 clk;  member
164 	u8 clk;  member
230 	struct clk_scu *clk = to_clk_scu(hw);  in clk_scu_recalc_rate()  local
240 	msg.data.req.resource = cpu_to_le16(clk->rsrc_id);  in clk_scu_recalc_rate()
241 	msg.data.req.clk = clk->clk_type;  in clk_scu_recalc_rate()
291 	struct clk_scu *clk = to_clk_scu(hw);  in clk_scu_atf_set_cpu_rate()  local
295 	if (clk->rsrc_id == IMX_SC_R_A35 || clk->rsrc_id == IMX_SC_R_A53)  in clk_scu_atf_set_cpu_rate()
297 	else if (clk->rsrc_id == IMX_SC_R_A72)  in clk_scu_atf_set_cpu_rate()
321 	struct clk_scu *clk = to_clk_scu(hw);  in clk_scu_set_rate()  local
331 	msg.resource = cpu_to_le16(clk->rsrc_id);  in clk_scu_set_rate()
332 	msg.clk = clk->clk_type;  in clk_scu_set_rate()
339 	struct clk_scu *clk = to_clk_scu(hw);  in clk_scu_get_parent()  local
349 	msg.data.req.resource = cpu_to_le16(clk->rsrc_id);  in clk_scu_get_parent()
350 	msg.data.req.clk = clk->clk_type;  in clk_scu_get_parent()
359 	clk->parent_index = msg.data.resp.parent;  in clk_scu_get_parent()
366 	struct clk_scu *clk = to_clk_scu(hw);  in clk_scu_set_parent()  local
376 	msg.resource = cpu_to_le16(clk->rsrc_id);  in clk_scu_set_parent()
377 	msg.clk = clk->clk_type;  in clk_scu_set_parent()
387 	clk->parent_index = index;  in clk_scu_set_parent()
393 			      u8 clk, bool enable, bool autog)  in sc_pm_clock_enable()  argument
404 	msg.clk = clk;  in sc_pm_clock_enable()
419 	struct clk_scu *clk = to_clk_scu(hw);  in clk_scu_prepare()  local
421 	return sc_pm_clock_enable(ccm_ipc_handle, clk->rsrc_id,  in clk_scu_prepare()
422 				  clk->clk_type, true, false);  in clk_scu_prepare()
433 	struct clk_scu *clk = to_clk_scu(hw);  in clk_scu_unprepare()  local
436 	ret = sc_pm_clock_enable(ccm_ipc_handle, clk->rsrc_id,  in clk_scu_unprepare()
437 				 clk->clk_type, false, false);  in clk_scu_unprepare()
472 	struct clk_scu *clk;  in __imx_clk_scu()  local
476 	clk = kzalloc(sizeof(*clk), GFP_KERNEL);  in __imx_clk_scu()
477 	if (!clk)  in __imx_clk_scu()
480 	clk->rsrc_id = rsrc_id;  in __imx_clk_scu()
481 	clk->clk_type = clk_type;  in __imx_clk_scu()
502 	clk->hw.init = &init;  in __imx_clk_scu()
504 	hw = &clk->hw;  in __imx_clk_scu()
507 		kfree(clk);  in __imx_clk_scu()
513 		dev_set_drvdata(dev, clk);  in __imx_clk_scu()
524 	struct imx_scu_clk_node *clk;  in imx_scu_of_clk_src_get()  local
526 	list_for_each_entry(clk, &scu_clks[rsrc], node) {  in imx_scu_of_clk_src_get()
527 		if (clk->clk_type == idx)  in imx_scu_of_clk_src_get()
528 			return clk->hw;  in imx_scu_of_clk_src_get()
537 	struct imx_scu_clk_node *clk = dev_get_platdata(dev);  in imx_clk_scu_probe()  local
541 	if (!((clk->rsrc == IMX_SC_R_A35) || (clk->rsrc == IMX_SC_R_A53) ||  in imx_clk_scu_probe()
542 	    (clk->rsrc == IMX_SC_R_A72))) {  in imx_clk_scu_probe()
556 	hw = __imx_clk_scu(dev, clk->name, clk->parents, clk->num_parents,  in imx_clk_scu_probe()
557 			   clk->rsrc, clk->clk_type);  in imx_clk_scu_probe()
563 	clk->hw = hw;  in imx_clk_scu_probe()
564 	list_add_tail(&clk->node, &imx_scu_clks[clk->rsrc]);  in imx_clk_scu_probe()
566 	if (!((clk->rsrc == IMX_SC_R_A35) || (clk->rsrc == IMX_SC_R_A53) ||  in imx_clk_scu_probe()
567 	    (clk->rsrc == IMX_SC_R_A72))) {  in imx_clk_scu_probe()
572 	dev_dbg(dev, "register SCU clock rsrc:%d type:%d\n", clk->rsrc,  in imx_clk_scu_probe()
573 		clk->clk_type);  in imx_clk_scu_probe()
580 	struct clk_scu *clk = dev_get_drvdata(dev);  in imx_clk_scu_suspend()  local
581 	u32 rsrc_id = clk->rsrc_id;  in imx_clk_scu_suspend()
587 	clk->parent = clk_hw_get_parent(&clk->hw);  in imx_clk_scu_suspend()
590 	if (clk->rsrc_id == IMX_SC_R_DC_0_VIDEO0 ||  in imx_clk_scu_suspend()
591 		clk->rsrc_id == IMX_SC_R_DC_0_VIDEO1 ||  in imx_clk_scu_suspend()
592 		clk->rsrc_id == IMX_SC_R_DC_1_VIDEO0 ||  in imx_clk_scu_suspend()
593 		clk->rsrc_id == IMX_SC_R_DC_1_VIDEO1)  in imx_clk_scu_suspend()
594 		clk->rate = clk_scu_recalc_rate(&clk->hw, 0);  in imx_clk_scu_suspend()
596 		clk->rate = clk_hw_get_rate(&clk->hw);  in imx_clk_scu_suspend()
597 	clk->is_enabled = clk_hw_is_enabled(&clk->hw);  in imx_clk_scu_suspend()
599 	if (clk->parent)  in imx_clk_scu_suspend()
600 		dev_dbg(dev, "save parent %s idx %u\n", clk_hw_get_name(clk->parent),  in imx_clk_scu_suspend()
601 			clk->parent_index);  in imx_clk_scu_suspend()
603 	if (clk->rate)  in imx_clk_scu_suspend()
604 		dev_dbg(dev, "save rate %d\n", clk->rate);  in imx_clk_scu_suspend()
606 	if (clk->is_enabled)  in imx_clk_scu_suspend()
614 	struct clk_scu *clk = dev_get_drvdata(dev);  in imx_clk_scu_resume()  local
615 	u32 rsrc_id = clk->rsrc_id;  in imx_clk_scu_resume()
622 	if (clk->parent) {  in imx_clk_scu_resume()
623 		ret = clk_scu_set_parent(&clk->hw, clk->parent_index);  in imx_clk_scu_resume()
625 			clk_hw_get_name(clk->parent),  in imx_clk_scu_resume()
626 			clk->parent_index, !ret ? "success" : "failed");  in imx_clk_scu_resume()
629 	if (clk->rate) {  in imx_clk_scu_resume()
630 		ret = clk_scu_set_rate(&clk->hw, clk->rate, 0);  in imx_clk_scu_resume()
631 		dev_dbg(dev, "restore rate %d %s\n", clk->rate,  in imx_clk_scu_resume()
635 	if (clk->is_enabled && rsrc_id != IMX_SC_R_PI_0_PLL) {  in imx_clk_scu_resume()
636 		ret = clk_scu_prepare(&clk->hw);  in imx_clk_scu_resume()
677 	struct imx_scu_clk_node clk = {  in imx_clk_scu_alloc_dev()  local
697 	ret = platform_device_add_data(pdev, &clk, sizeof(clk));  in imx_clk_scu_alloc_dev()
727 	struct imx_scu_clk_node *clk, *n;  in imx_clk_scu_unregister()  local
731 		list_for_each_entry_safe(clk, n, &imx_scu_clks[i], node) {  in imx_clk_scu_unregister()
732 			clk_hw_unregister(clk->hw);  in imx_clk_scu_unregister()
733 			kfree(clk);  in imx_clk_scu_unregister()
741 	struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);  in clk_gpr_div_scu_recalc_rate()  local
746 	err = imx_sc_misc_get_control(ccm_ipc_handle, clk->rsrc_id,  in clk_gpr_div_scu_recalc_rate()
747 				      clk->gpr_id, &val);  in clk_gpr_div_scu_recalc_rate()
768 	struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);  in clk_gpr_div_scu_set_rate()  local
773 	err = imx_sc_misc_set_control(ccm_ipc_handle, clk->rsrc_id,  in clk_gpr_div_scu_set_rate()
774 				      clk->gpr_id, val);  in clk_gpr_div_scu_set_rate()
787 	struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);  in clk_gpr_mux_scu_get_parent()  local
790 	imx_sc_misc_get_control(ccm_ipc_handle, clk->rsrc_id,  in clk_gpr_mux_scu_get_parent()
791 				clk->gpr_id, &val);  in clk_gpr_mux_scu_get_parent()
798 	struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);  in clk_gpr_mux_scu_set_parent()  local
800 	return imx_sc_misc_set_control(ccm_ipc_handle, clk->rsrc_id,  in clk_gpr_mux_scu_set_parent()
801 				       clk->gpr_id, index);  in clk_gpr_mux_scu_set_parent()
812 	struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);  in clk_gpr_gate_scu_prepare()  local
814 	return imx_sc_misc_set_control(ccm_ipc_handle, clk->rsrc_id,  in clk_gpr_gate_scu_prepare()
815 				       clk->gpr_id, !clk->gate_invert);  in clk_gpr_gate_scu_prepare()
820 	struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);  in clk_gpr_gate_scu_unprepare()  local
823 	ret = imx_sc_misc_set_control(ccm_ipc_handle, clk->rsrc_id,  in clk_gpr_gate_scu_unprepare()
824 				      clk->gpr_id, clk->gate_invert);  in clk_gpr_gate_scu_unprepare()
832 	struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);  in clk_gpr_gate_scu_is_prepared()  local
836 	ret = imx_sc_misc_get_control(ccm_ipc_handle, clk->rsrc_id,  in clk_gpr_gate_scu_is_prepared()
837 				      clk->gpr_id, &val);  in clk_gpr_gate_scu_is_prepared()
841 	return clk->gate_invert ? !val : val;  in clk_gpr_gate_scu_is_prepared()
855 	struct clk_gpr_scu *clk;  in __imx_clk_gpr_scu()  local
872 	clk = kzalloc(sizeof(*clk), GFP_KERNEL);  in __imx_clk_gpr_scu()
873 	if (!clk) {  in __imx_clk_gpr_scu()
878 	clk->rsrc_id = rsrc_id;  in __imx_clk_gpr_scu()
879 	clk->gpr_id = gpr_id;  in __imx_clk_gpr_scu()
880 	clk->flags = flags;  in __imx_clk_gpr_scu()
881 	clk->gate_invert = invert;  in __imx_clk_gpr_scu()
897 	clk->hw.init = &init;  in __imx_clk_gpr_scu()
899 	hw = &clk->hw;  in __imx_clk_gpr_scu()
902 		kfree(clk);  in __imx_clk_gpr_scu()