74 	struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);  in regmap_irq_lock()  local
76 	mutex_lock(&d->lock);  in regmap_irq_lock()
81 	struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);  in regmap_irq_sync_unlock()  local
82 	struct regmap *map = d->map;  in regmap_irq_sync_unlock()
87 	if (d->chip->runtime_pm) {  in regmap_irq_sync_unlock()
94 	if (d->clear_status) {  in regmap_irq_sync_unlock()
95 		for (i = 0; i < d->chip->num_regs; i++) {  in regmap_irq_sync_unlock()
96 			reg = d->get_irq_reg(d, d->chip->status_base, i);  in regmap_irq_sync_unlock()
100 				dev_err(d->map->dev,  in regmap_irq_sync_unlock()
104 		d->clear_status = false;  in regmap_irq_sync_unlock()
112 	for (i = 0; i < d->chip->num_regs; i++) {  in regmap_irq_sync_unlock()
113 		if (d->chip->handle_mask_sync)  in regmap_irq_sync_unlock()
114 			d->chip->handle_mask_sync(i, d->mask_buf_def[i],  in regmap_irq_sync_unlock()
115 						  d->mask_buf[i],  in regmap_irq_sync_unlock()
116 						  d->chip->irq_drv_data);  in regmap_irq_sync_unlock()
118 		if (d->chip->mask_base && !d->chip->handle_mask_sync) {  in regmap_irq_sync_unlock()
119 			reg = d->get_irq_reg(d, d->chip->mask_base, i);  in regmap_irq_sync_unlock()
120 			ret = regmap_update_bits(d->map, reg,  in regmap_irq_sync_unlock()
121 						 d->mask_buf_def[i],  in regmap_irq_sync_unlock()
122 						 d->mask_buf[i]);  in regmap_irq_sync_unlock()
124 				dev_err(d->map->dev, "Failed to sync masks in %x\n", reg);  in regmap_irq_sync_unlock()
127 		if (d->chip->unmask_base && !d->chip->handle_mask_sync) {  in regmap_irq_sync_unlock()
128 			reg = d->get_irq_reg(d, d->chip->unmask_base, i);  in regmap_irq_sync_unlock()
129 			ret = regmap_update_bits(d->map, reg,  in regmap_irq_sync_unlock()
130 					d->mask_buf_def[i], ~d->mask_buf[i]);  in regmap_irq_sync_unlock()
132 				dev_err(d->map->dev, "Failed to sync masks in %x\n",  in regmap_irq_sync_unlock()
136 		reg = d->get_irq_reg(d, d->chip->wake_base, i);  in regmap_irq_sync_unlock()
137 		if (d->wake_buf) {  in regmap_irq_sync_unlock()
138 			if (d->chip->wake_invert)  in regmap_irq_sync_unlock()
139 				ret = regmap_update_bits(d->map, reg,  in regmap_irq_sync_unlock()
140 							 d->mask_buf_def[i],  in regmap_irq_sync_unlock()
141 							 ~d->wake_buf[i]);  in regmap_irq_sync_unlock()
143 				ret = regmap_update_bits(d->map, reg,  in regmap_irq_sync_unlock()
144 							 d->mask_buf_def[i],  in regmap_irq_sync_unlock()
145 							 d->wake_buf[i]);  in regmap_irq_sync_unlock()
147 				dev_err(d->map->dev,  in regmap_irq_sync_unlock()
152 		if (!d->chip->init_ack_masked)  in regmap_irq_sync_unlock()
159 		if (d->mask_buf[i] && (d->chip->ack_base || d->chip->use_ack)) {  in regmap_irq_sync_unlock()
160 			reg = d->get_irq_reg(d, d->chip->ack_base, i);  in regmap_irq_sync_unlock()
163 			if (d->chip->ack_invert)  in regmap_irq_sync_unlock()
164 				ret = regmap_write(map, reg, ~d->mask_buf[i]);  in regmap_irq_sync_unlock()
166 				ret = regmap_write(map, reg, d->mask_buf[i]);  in regmap_irq_sync_unlock()
167 			if (d->chip->clear_ack) {  in regmap_irq_sync_unlock()
168 				if (d->chip->ack_invert && !ret)  in regmap_irq_sync_unlock()
174 				dev_err(d->map->dev, "Failed to ack 0x%x: %d\n",  in regmap_irq_sync_unlock()
179 	for (i = 0; i < d->chip->num_config_bases; i++) {  in regmap_irq_sync_unlock()
180 		for (j = 0; j < d->chip->num_config_regs; j++) {  in regmap_irq_sync_unlock()
181 			reg = d->get_irq_reg(d, d->chip->config_base[i], j);  in regmap_irq_sync_unlock()
182 			ret = regmap_write(map, reg, d->config_buf[i][j]);  in regmap_irq_sync_unlock()
184 				dev_err(d->map->dev,  in regmap_irq_sync_unlock()
190 	if (d->chip->runtime_pm)  in regmap_irq_sync_unlock()
194 	if (d->wake_count < 0)  in regmap_irq_sync_unlock()
195 		for (i = d->wake_count; i < 0; i++)  in regmap_irq_sync_unlock()
196 			irq_set_irq_wake(d->irq, 0);  in regmap_irq_sync_unlock()
197 	else if (d->wake_count > 0)  in regmap_irq_sync_unlock()
198 		for (i = 0; i < d->wake_count; i++)  in regmap_irq_sync_unlock()
199 			irq_set_irq_wake(d->irq, 1);  in regmap_irq_sync_unlock()
201 	d->wake_count = 0;  in regmap_irq_sync_unlock()
203 	mutex_unlock(&d->lock);  in regmap_irq_sync_unlock()
208 	struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);  in regmap_irq_enable()  local
209 	struct regmap *map = d->map;  in regmap_irq_enable()
210 	const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);  in regmap_irq_enable()
224 	if (d->chip->type_in_mask && irq_data->type.types_supported)  in regmap_irq_enable()
225 		mask = d->type_buf[reg] & irq_data->mask;  in regmap_irq_enable()
229 	if (d->chip->clear_on_unmask)  in regmap_irq_enable()
230 		d->clear_status = true;  in regmap_irq_enable()
232 	d->mask_buf[reg] &= ~mask;  in regmap_irq_enable()
237 	struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);  in regmap_irq_disable()  local
238 	struct regmap *map = d->map;  in regmap_irq_disable()
239 	const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);  in regmap_irq_disable()
241 	d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask;  in regmap_irq_disable()
246 	struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);  in regmap_irq_set_type()  local
247 	struct regmap *map = d->map;  in regmap_irq_set_type()
248 	const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);  in regmap_irq_set_type()
257 	if (d->chip->type_in_mask) {  in regmap_irq_set_type()
258 		ret = regmap_irq_set_type_config_simple(&d->type_buf, type,  in regmap_irq_set_type()
259 							irq_data, reg, d->chip->irq_drv_data);  in regmap_irq_set_type()
264 	if (d->chip->set_type_config) {  in regmap_irq_set_type()
265 		ret = d->chip->set_type_config(d->config_buf, type, irq_data,  in regmap_irq_set_type()
266 					       reg, d->chip->irq_drv_data);  in regmap_irq_set_type()
276 	struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);  in regmap_irq_set_wake()  local
277 	struct regmap *map = d->map;  in regmap_irq_set_wake()
278 	const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);  in regmap_irq_set_wake()
281 		if (d->wake_buf)  in regmap_irq_set_wake()
282 			d->wake_buf[irq_data->reg_offset / map->reg_stride]  in regmap_irq_set_wake()
284 		d->wake_count++;  in regmap_irq_set_wake()
286 		if (d->wake_buf)  in regmap_irq_set_wake()
287 			d->wake_buf[irq_data->reg_offset / map->reg_stride]  in regmap_irq_set_wake()
289 		d->wake_count--;  in regmap_irq_set_wake()
335 static irqreturn_t regmap_irq_thread(int irq, void *d)  in regmap_irq_thread()  argument
337 	struct regmap_irq_chip_data *data = d;  in regmap_irq_thread()
634 	struct regmap_irq_chip_data *d;  in regmap_add_irq_chip_fwnode()  local
665 	d = kzalloc(sizeof(*d), GFP_KERNEL);  in regmap_add_irq_chip_fwnode()
666 	if (!d)  in regmap_add_irq_chip_fwnode()
670 		d->main_status_buf = kcalloc(chip->num_main_regs,  in regmap_add_irq_chip_fwnode()
671 					     sizeof(*d->main_status_buf),  in regmap_add_irq_chip_fwnode()
674 		if (!d->main_status_buf)  in regmap_add_irq_chip_fwnode()
678 	d->status_buf = kcalloc(chip->num_regs, sizeof(*d->status_buf),  in regmap_add_irq_chip_fwnode()
680 	if (!d->status_buf)  in regmap_add_irq_chip_fwnode()
683 	d->mask_buf = kcalloc(chip->num_regs, sizeof(*d->mask_buf),  in regmap_add_irq_chip_fwnode()
685 	if (!d->mask_buf)  in regmap_add_irq_chip_fwnode()
688 	d->mask_buf_def = kcalloc(chip->num_regs, sizeof(*d->mask_buf_def),  in regmap_add_irq_chip_fwnode()
690 	if (!d->mask_buf_def)  in regmap_add_irq_chip_fwnode()
694 		d->wake_buf = kcalloc(chip->num_regs, sizeof(*d->wake_buf),  in regmap_add_irq_chip_fwnode()
696 		if (!d->wake_buf)  in regmap_add_irq_chip_fwnode()
701 		d->type_buf_def = kcalloc(chip->num_regs,  in regmap_add_irq_chip_fwnode()
702 					  sizeof(*d->type_buf_def), GFP_KERNEL);  in regmap_add_irq_chip_fwnode()
703 		if (!d->type_buf_def)  in regmap_add_irq_chip_fwnode()
706 		d->type_buf = kcalloc(chip->num_regs, sizeof(*d->type_buf), GFP_KERNEL);  in regmap_add_irq_chip_fwnode()
707 		if (!d->type_buf)  in regmap_add_irq_chip_fwnode()
715 		d->config_buf = kcalloc(chip->num_config_bases,  in regmap_add_irq_chip_fwnode()
716 					sizeof(*d->config_buf), GFP_KERNEL);  in regmap_add_irq_chip_fwnode()
717 		if (!d->config_buf)  in regmap_add_irq_chip_fwnode()
721 			d->config_buf[i] = kcalloc(chip->num_config_regs,  in regmap_add_irq_chip_fwnode()
722 						   sizeof(**d->config_buf),  in regmap_add_irq_chip_fwnode()
724 			if (!d->config_buf[i])  in regmap_add_irq_chip_fwnode()
729 	d->irq_chip = regmap_irq_chip;  in regmap_add_irq_chip_fwnode()
730 	d->irq_chip.name = chip->name;  in regmap_add_irq_chip_fwnode()
731 	d->irq = irq;  in regmap_add_irq_chip_fwnode()
732 	d->map = map;  in regmap_add_irq_chip_fwnode()
733 	d->chip = chip;  in regmap_add_irq_chip_fwnode()
734 	d->irq_base = irq_base;  in regmap_add_irq_chip_fwnode()
737 		d->irq_reg_stride = chip->irq_reg_stride;  in regmap_add_irq_chip_fwnode()
739 		d->irq_reg_stride = 1;  in regmap_add_irq_chip_fwnode()
742 		d->get_irq_reg = chip->get_irq_reg;  in regmap_add_irq_chip_fwnode()
744 		d->get_irq_reg = regmap_irq_get_irq_reg_linear;  in regmap_add_irq_chip_fwnode()
746 	if (regmap_irq_can_bulk_read_status(d)) {  in regmap_add_irq_chip_fwnode()
747 		d->status_reg_buf = kmalloc_array(chip->num_regs,  in regmap_add_irq_chip_fwnode()
750 		if (!d->status_reg_buf)  in regmap_add_irq_chip_fwnode()
754 	mutex_init(&d->lock);  in regmap_add_irq_chip_fwnode()
757 		d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride]  in regmap_add_irq_chip_fwnode()
762 		d->mask_buf[i] = d->mask_buf_def[i];  in regmap_add_irq_chip_fwnode()
765 			ret = chip->handle_mask_sync(i, d->mask_buf_def[i],  in regmap_add_irq_chip_fwnode()
766 						     d->mask_buf[i],  in regmap_add_irq_chip_fwnode()
773 			reg = d->get_irq_reg(d, chip->mask_base, i);  in regmap_add_irq_chip_fwnode()
774 			ret = regmap_update_bits(d->map, reg,  in regmap_add_irq_chip_fwnode()
775 						 d->mask_buf_def[i],  in regmap_add_irq_chip_fwnode()
776 						 d->mask_buf[i]);  in regmap_add_irq_chip_fwnode()
785 			reg = d->get_irq_reg(d, chip->unmask_base, i);  in regmap_add_irq_chip_fwnode()
786 			ret = regmap_update_bits(d->map, reg,  in regmap_add_irq_chip_fwnode()
787 					d->mask_buf_def[i], ~d->mask_buf[i]);  in regmap_add_irq_chip_fwnode()
799 		if (d->chip->no_status) {  in regmap_add_irq_chip_fwnode()
801 			d->status_buf[i] = GENMASK(31, 0);  in regmap_add_irq_chip_fwnode()
803 			reg = d->get_irq_reg(d, d->chip->status_base, i);  in regmap_add_irq_chip_fwnode()
804 			ret = regmap_read(map, reg, &d->status_buf[i]);  in regmap_add_irq_chip_fwnode()
813 			d->status_buf[i] = ~d->status_buf[i];  in regmap_add_irq_chip_fwnode()
815 		if (d->status_buf[i] && (chip->ack_base || chip->use_ack)) {  in regmap_add_irq_chip_fwnode()
816 			reg = d->get_irq_reg(d, d->chip->ack_base, i);  in regmap_add_irq_chip_fwnode()
819 					~(d->status_buf[i] & d->mask_buf[i]));  in regmap_add_irq_chip_fwnode()
822 					d->status_buf[i] & d->mask_buf[i]);  in regmap_add_irq_chip_fwnode()
838 	if (d->wake_buf) {  in regmap_add_irq_chip_fwnode()
840 			d->wake_buf[i] = d->mask_buf_def[i];  in regmap_add_irq_chip_fwnode()
841 			reg = d->get_irq_reg(d, d->chip->wake_base, i);  in regmap_add_irq_chip_fwnode()
844 				ret = regmap_update_bits(d->map, reg,  in regmap_add_irq_chip_fwnode()
845 							 d->mask_buf_def[i],  in regmap_add_irq_chip_fwnode()
848 				ret = regmap_update_bits(d->map, reg,  in regmap_add_irq_chip_fwnode()
849 							 d->mask_buf_def[i],  in regmap_add_irq_chip_fwnode()
850 							 d->wake_buf[i]);  in regmap_add_irq_chip_fwnode()
860 		d->domain = irq_domain_create_legacy(fwnode, chip->num_irqs,  in regmap_add_irq_chip_fwnode()
862 						     &regmap_domain_ops, d);  in regmap_add_irq_chip_fwnode()
864 		d->domain = irq_domain_create_linear(fwnode, chip->num_irqs,  in regmap_add_irq_chip_fwnode()
865 						     &regmap_domain_ops, d);  in regmap_add_irq_chip_fwnode()
866 	if (!d->domain) {  in regmap_add_irq_chip_fwnode()
874 				   chip->name, d);  in regmap_add_irq_chip_fwnode()
881 	*data = d;  in regmap_add_irq_chip_fwnode()
888 	kfree(d->type_buf);  in regmap_add_irq_chip_fwnode()
889 	kfree(d->type_buf_def);  in regmap_add_irq_chip_fwnode()
890 	kfree(d->wake_buf);  in regmap_add_irq_chip_fwnode()
891 	kfree(d->mask_buf_def);  in regmap_add_irq_chip_fwnode()
892 	kfree(d->mask_buf);  in regmap_add_irq_chip_fwnode()
893 	kfree(d->status_buf);  in regmap_add_irq_chip_fwnode()
894 	kfree(d->status_reg_buf);  in regmap_add_irq_chip_fwnode()
895 	if (d->config_buf) {  in regmap_add_irq_chip_fwnode()
897 			kfree(d->config_buf[i]);  in regmap_add_irq_chip_fwnode()
898 		kfree(d->config_buf);  in regmap_add_irq_chip_fwnode()
900 	kfree(d);  in regmap_add_irq_chip_fwnode()
937 void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)  in regmap_del_irq_chip()  argument
942 	if (!d)  in regmap_del_irq_chip()
945 	free_irq(irq, d);  in regmap_del_irq_chip()
948 	for (hwirq = 0; hwirq < d->chip->num_irqs; hwirq++) {  in regmap_del_irq_chip()
950 		if (!d->chip->irqs[hwirq].mask)  in regmap_del_irq_chip()
957 		virq = irq_find_mapping(d->domain, hwirq);  in regmap_del_irq_chip()
962 	irq_domain_remove(d->domain);  in regmap_del_irq_chip()
963 	kfree(d->type_buf);  in regmap_del_irq_chip()
964 	kfree(d->type_buf_def);  in regmap_del_irq_chip()
965 	kfree(d->wake_buf);  in regmap_del_irq_chip()
966 	kfree(d->mask_buf_def);  in regmap_del_irq_chip()
967 	kfree(d->mask_buf);  in regmap_del_irq_chip()
968 	kfree(d->status_reg_buf);  in regmap_del_irq_chip()
969 	kfree(d->status_buf);  in regmap_del_irq_chip()
970 	if (d->config_buf) {  in regmap_del_irq_chip()
971 		for (i = 0; i < d->chip->num_config_bases; i++)  in regmap_del_irq_chip()
972 			kfree(d->config_buf[i]);  in regmap_del_irq_chip()
973 		kfree(d->config_buf);  in regmap_del_irq_chip()
975 	kfree(d);  in regmap_del_irq_chip()
981 	struct regmap_irq_chip_data *d = *(struct regmap_irq_chip_data **)res;  in devm_regmap_irq_chip_release()  local
983 	regmap_del_irq_chip(d->irq, d);  in devm_regmap_irq_chip_release()
1022 	struct regmap_irq_chip_data **ptr, *d;  in devm_regmap_add_irq_chip_fwnode()  local
1031 					 chip, &d);  in devm_regmap_add_irq_chip_fwnode()
1037 	*ptr = d;  in devm_regmap_add_irq_chip_fwnode()
1039 	*data = d;  in devm_regmap_add_irq_chip_fwnode()