Lines Matching refs:mask
489 u32 pb_addr, mask; in gaudi_init_mme_protection_bits() local
515 mask = 1U << ((mmMME0_CTRL_RESET & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
516 mask |= 1U << ((mmMME0_CTRL_QM_STALL & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
517 mask |= 1U << ((mmMME0_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
518 mask |= 1U << ((mmMME0_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
519 mask |= 1U << ((mmMME0_CTRL_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
520 mask |= 1U << ((mmMME0_CTRL_INTR_MASK & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
521 mask |= 1U << ((mmMME0_CTRL_LOG_SHADOW & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
522 mask |= 1U << ((mmMME0_CTRL_PCU_RL_DESC0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
523 mask |= 1U << ((mmMME0_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
524 mask |= 1U << ((mmMME0_CTRL_PCU_RL_TH & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
525 mask |= 1U << ((mmMME0_CTRL_PCU_RL_MIN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
526 mask |= 1U << ((mmMME0_CTRL_PCU_RL_CTRL_EN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
527 mask |= 1U << ((mmMME0_CTRL_PCU_RL_HISTORY_LOG_SIZE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
528 mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_A_BF16 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
529 mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_B_BF16 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
530 mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_A_FP32_ODD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
531 mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_A_FP32_EVEN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
532 mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_B_FP32_ODD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
533 mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_B_FP32_EVEN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
534 mask |= 1U << ((mmMME0_CTRL_PROT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
535 mask |= 1U << ((mmMME0_CTRL_EU_POWER_SAVE_DISABLE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
536 mask |= 1U << ((mmMME0_CTRL_CS_DBG_BLOCK_ID & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
537 mask |= 1U << ((mmMME0_CTRL_CS_DBG_STATUS_DROP_CNT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
538 mask |= 1U << ((mmMME0_CTRL_TE_CLOSE_CGATE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
539 mask |= 1U << ((mmMME0_CTRL_AGU_SM_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
540 mask |= 1U << ((mmMME0_CTRL_AGU_SM_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
541 mask |= 1U << ((mmMME0_CTRL_EZSYNC_OUT_CREDIT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
542 mask |= 1U << ((mmMME0_CTRL_PCU_RL_SAT_SEC & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
543 mask |= 1U << ((mmMME0_CTRL_AGU_SYNC_MSG_AXI_USER & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
544 mask |= 1U << ((mmMME0_CTRL_QM_SLV_LBW_CLK_EN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
546 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
551 mask = 1U << ((mmMME0_CTRL_SHADOW_0_STATUS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
553 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
557 mask = 1U << ((mmMME0_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
558 mask |= 1U << ((mmMME0_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
559 mask |= 1U << ((mmMME0_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
560 mask |= 1U << ((mmMME0_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
561 mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
562 mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
563 mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
564 mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
565 mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
566 mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
567 mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
568 mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
569 mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
570 mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
571 mask |= 1U << ((mmMME0_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
572 mask |= 1U << ((mmMME0_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
573 mask |= 1U << ((mmMME0_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
574 mask |= 1U << ((mmMME0_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
575 mask |= 1U << ((mmMME0_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
576 mask |= 1U << ((mmMME0_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
577 mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
578 mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
579 mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
580 mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
581 mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
582 mask |= 1U << ((mmMME0_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
583 mask |= 1U << ((mmMME0_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
584 mask |= 1U << ((mmMME0_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
585 mask |= 1U << ((mmMME0_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
587 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
591 mask = 1U << ((mmMME0_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
592 mask |= 1U << ((mmMME0_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
593 mask |= 1U << ((mmMME0_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
594 mask |= 1U << ((mmMME0_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
595 mask |= 1U << ((mmMME0_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
596 mask |= 1U << ((mmMME0_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
597 mask |= 1U << ((mmMME0_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
598 mask |= 1U << ((mmMME0_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
599 mask |= 1U << ((mmMME0_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
600 mask |= 1U << ((mmMME0_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
601 mask |= 1U << ((mmMME0_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
602 mask |= 1U << ((mmMME0_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
603 mask |= 1U << ((mmMME0_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
604 mask |= 1U << ((mmMME0_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
605 mask |= 1U << ((mmMME0_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
606 mask |= 1U << ((mmMME0_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
607 mask |= 1U << ((mmMME0_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
608 mask |= 1U << ((mmMME0_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
609 mask |= 1U << ((mmMME0_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
610 mask |= 1U << ((mmMME0_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
611 mask |= 1U << ((mmMME0_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
612 mask |= 1U << ((mmMME0_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
613 mask |= 1U << ((mmMME0_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
614 mask |= 1U << ((mmMME0_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
615 mask |= 1U << ((mmMME0_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
616 mask |= 1U << ((mmMME0_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
617 mask |= 1U << ((mmMME0_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
618 mask |= 1U << ((mmMME0_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
619 mask |= 1U << ((mmMME0_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
620 mask |= 1U << ((mmMME0_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
621 mask |= 1U << ((mmMME0_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
622 mask |= 1U << ((mmMME0_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
624 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
628 mask = 1U << ((mmMME0_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
629 mask |= 1U << ((mmMME0_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
630 mask |= 1U << ((mmMME0_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
631 mask |= 1U << ((mmMME0_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
632 mask |= 1U << ((mmMME0_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
633 mask |= 1U << ((mmMME0_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
634 mask |= 1U << ((mmMME0_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
635 mask |= 1U << ((mmMME0_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
636 mask |= 1U << ((mmMME0_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
637 mask |= 1U << ((mmMME0_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
638 mask |= 1U << ((mmMME0_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
639 mask |= 1U << ((mmMME0_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
640 mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
641 mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
642 mask |= 1U << ((mmMME0_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
644 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
648 mask = 1U << ((mmMME0_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
649 mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
650 mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
651 mask |= 1U << ((mmMME0_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
652 mask |= 1U << ((mmMME0_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
653 mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
654 mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
655 mask |= 1U << ((mmMME0_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
656 mask |= 1U << ((mmMME0_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
657 mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
658 mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
659 mask |= 1U << ((mmMME0_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
660 mask |= 1U << ((mmMME0_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
661 mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
662 mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
663 mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
664 mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
665 mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
666 mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
667 mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
668 mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
669 mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
670 mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
671 mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
672 mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
673 mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
674 mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
675 mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
677 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
681 mask = 1U << ((mmMME0_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
682 mask |= 1U << ((mmMME0_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
683 mask |= 1U << ((mmMME0_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
684 mask |= 1U << ((mmMME0_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
685 mask |= 1U << ((mmMME0_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
686 mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
687 mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
688 mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
689 mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
690 mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
691 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
692 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
693 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
694 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
695 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
696 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
697 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
698 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
699 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
700 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
701 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
702 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
703 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
704 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
705 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
706 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
707 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
708 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
709 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
710 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
711 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
712 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
714 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
719 mask = 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
720 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
721 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
722 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
723 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
724 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
725 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
726 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
727 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
728 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
729 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
730 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
731 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
732 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
733 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
734 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
735 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
736 mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
737 mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
738 mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
739 mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
740 mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
741 mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
742 mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
743 mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
744 mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
745 mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
746 mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
747 mask |= 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
748 mask |= 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
749 mask |= 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
751 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
757 mask = 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
758 mask |= 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
760 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
764 mask = 1U << ((mmMME0_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
765 mask |= 1U << ((mmMME0_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
766 mask |= 1U << ((mmMME0_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
767 mask |= 1U << ((mmMME0_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
768 mask |= 1U << ((mmMME0_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
769 mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
770 mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
771 mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
772 mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
773 mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
774 mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
775 mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
776 mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
777 mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
778 mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
779 mask |= 1U << ((mmMME0_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
780 mask |= 1U << ((mmMME0_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
781 mask |= 1U << ((mmMME0_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
783 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
787 mask = 1U << ((mmMME0_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
788 mask |= 1U << ((mmMME0_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
789 mask |= 1U << ((mmMME0_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
790 mask |= 1U << ((mmMME0_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
792 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
796 mask = 1U << ((mmMME0_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
797 mask |= 1U << ((mmMME0_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
798 mask |= 1U << ((mmMME0_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
799 mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
800 mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
801 mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
802 mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
803 mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
804 mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
805 mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
806 mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
807 mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
808 mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
810 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
814 mask = 1U << ((mmMME0_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
815 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
816 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
817 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
818 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
819 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
820 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
821 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
822 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
823 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
824 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
825 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
826 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
827 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
828 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
829 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
830 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
831 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
832 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
833 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
834 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
835 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
836 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
837 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
838 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
840 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
845 mask = 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
846 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
847 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
848 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
849 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
850 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
851 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
852 mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
853 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
859 mask = 1U << ((mmMME0_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
860 mask |= 1U << ((mmMME0_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
861 mask |= 1U << ((mmMME0_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
862 mask |= 1U << ((mmMME0_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
863 mask |= 1U << ((mmMME0_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
865 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
869 mask = 1U << ((mmMME0_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
870 mask |= 1U << ((mmMME0_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
871 mask |= 1U << ((mmMME0_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
872 mask |= 1U << ((mmMME0_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
873 mask |= 1U << ((mmMME0_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
874 mask |= 1U << ((mmMME0_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
875 mask |= 1U << ((mmMME0_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
876 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
877 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
878 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
879 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
880 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
881 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
882 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
883 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
884 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
885 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
886 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
887 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
888 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
889 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
890 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
891 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
892 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
893 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
894 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
895 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
897 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
902 mask = 1U << ((mmMME0_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
903 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
904 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
905 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
906 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
907 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
908 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
909 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
910 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
911 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
912 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
913 mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
914 mask |= 1U << ((mmMME0_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
915 mask |= 1U << ((mmMME0_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
916 mask |= 1U << ((mmMME0_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
918 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
922 mask = 1U << ((mmMME0_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
923 mask |= 1U << ((mmMME0_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
924 mask |= 1U << ((mmMME0_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
925 mask |= 1U << ((mmMME0_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
926 mask |= 1U << ((mmMME0_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
927 mask |= 1U << ((mmMME0_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
928 mask |= 1U << ((mmMME0_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
929 mask |= 1U << ((mmMME0_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
930 mask |= 1U << ((mmMME0_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
931 mask |= 1U << ((mmMME0_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
932 mask |= 1U << ((mmMME0_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
933 mask |= 1U << ((mmMME0_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
934 mask |= 1U << ((mmMME0_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
935 mask |= 1U << ((mmMME0_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
936 mask |= 1U << ((mmMME0_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
938 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
943 mask = 1U << ((mmMME0_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
945 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
949 mask = 1U << ((mmMME1_CTRL_RESET & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
950 mask |= 1U << ((mmMME1_CTRL_QM_STALL & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
951 mask |= 1U << ((mmMME1_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
952 mask |= 1U << ((mmMME1_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
953 mask |= 1U << ((mmMME1_CTRL_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
954 mask |= 1U << ((mmMME1_CTRL_INTR_MASK & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
955 mask |= 1U << ((mmMME1_CTRL_LOG_SHADOW & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
956 mask |= 1U << ((mmMME1_CTRL_PCU_RL_DESC0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
957 mask |= 1U << ((mmMME1_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
958 mask |= 1U << ((mmMME1_CTRL_PCU_RL_TH & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
959 mask |= 1U << ((mmMME1_CTRL_PCU_RL_MIN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
960 mask |= 1U << ((mmMME1_CTRL_PCU_RL_CTRL_EN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
961 mask |= 1U << ((mmMME1_CTRL_PCU_RL_HISTORY_LOG_SIZE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
962 mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_A_BF16 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
963 mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_B_BF16 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
964 mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_A_FP32_ODD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
965 mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_A_FP32_EVEN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
966 mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_B_FP32_ODD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
967 mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_B_FP32_EVEN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
968 mask |= 1U << ((mmMME1_CTRL_PROT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
969 mask |= 1U << ((mmMME1_CTRL_EU_POWER_SAVE_DISABLE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
970 mask |= 1U << ((mmMME1_CTRL_CS_DBG_BLOCK_ID & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
971 mask |= 1U << ((mmMME1_CTRL_CS_DBG_STATUS_DROP_CNT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
972 mask |= 1U << ((mmMME1_CTRL_TE_CLOSE_CGATE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
973 mask |= 1U << ((mmMME1_CTRL_AGU_SM_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
974 mask |= 1U << ((mmMME1_CTRL_AGU_SM_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
975 mask |= 1U << ((mmMME1_CTRL_EZSYNC_OUT_CREDIT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
976 mask |= 1U << ((mmMME1_CTRL_PCU_RL_SAT_SEC & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
977 mask |= 1U << ((mmMME1_CTRL_AGU_SYNC_MSG_AXI_USER & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
978 mask |= 1U << ((mmMME1_CTRL_QM_SLV_LBW_CLK_EN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
980 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
985 mask = 1U << ((mmMME1_CTRL_SHADOW_0_STATUS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
987 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
993 mask = 1U << ((mmMME2_CTRL_RESET & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
994 mask |= 1U << ((mmMME2_CTRL_QM_STALL & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
995 mask |= 1U << ((mmMME2_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
996 mask |= 1U << ((mmMME2_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
997 mask |= 1U << ((mmMME2_CTRL_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
998 mask |= 1U << ((mmMME2_CTRL_INTR_MASK & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
999 mask |= 1U << ((mmMME2_CTRL_LOG_SHADOW & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1000 mask |= 1U << ((mmMME2_CTRL_PCU_RL_DESC0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1001 mask |= 1U << ((mmMME2_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1002 mask |= 1U << ((mmMME2_CTRL_PCU_RL_TH & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1003 mask |= 1U << ((mmMME2_CTRL_PCU_RL_MIN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1004 mask |= 1U << ((mmMME2_CTRL_PCU_RL_CTRL_EN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1005 mask |= 1U << ((mmMME2_CTRL_PCU_RL_HISTORY_LOG_SIZE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1006 mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_A_BF16 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1007 mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_B_BF16 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1008 mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_A_FP32_ODD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1009 mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_A_FP32_EVEN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1010 mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_B_FP32_ODD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1011 mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_B_FP32_EVEN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1012 mask |= 1U << ((mmMME2_CTRL_PROT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1013 mask |= 1U << ((mmMME2_CTRL_EU_POWER_SAVE_DISABLE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1014 mask |= 1U << ((mmMME2_CTRL_CS_DBG_BLOCK_ID & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1015 mask |= 1U << ((mmMME2_CTRL_CS_DBG_STATUS_DROP_CNT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1016 mask |= 1U << ((mmMME2_CTRL_TE_CLOSE_CGATE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1017 mask |= 1U << ((mmMME2_CTRL_AGU_SM_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1018 mask |= 1U << ((mmMME2_CTRL_AGU_SM_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1019 mask |= 1U << ((mmMME2_CTRL_EZSYNC_OUT_CREDIT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1020 mask |= 1U << ((mmMME2_CTRL_PCU_RL_SAT_SEC & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1021 mask |= 1U << ((mmMME2_CTRL_AGU_SYNC_MSG_AXI_USER & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1022 mask |= 1U << ((mmMME2_CTRL_QM_SLV_LBW_CLK_EN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1024 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1029 mask = 1U << ((mmMME2_CTRL_SHADOW_0_STATUS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1031 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1035 mask = 1U << ((mmMME2_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1036 mask |= 1U << ((mmMME2_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1037 mask |= 1U << ((mmMME2_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1038 mask |= 1U << ((mmMME2_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1039 mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1040 mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1041 mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1042 mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1043 mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1044 mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1045 mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1046 mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1047 mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1048 mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1049 mask |= 1U << ((mmMME2_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1050 mask |= 1U << ((mmMME2_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1051 mask |= 1U << ((mmMME2_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1052 mask |= 1U << ((mmMME2_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1053 mask |= 1U << ((mmMME2_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1054 mask |= 1U << ((mmMME2_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1055 mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1056 mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1057 mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1058 mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1059 mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1060 mask |= 1U << ((mmMME2_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1061 mask |= 1U << ((mmMME2_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1062 mask |= 1U << ((mmMME2_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1063 mask |= 1U << ((mmMME2_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1065 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1069 mask = 1U << ((mmMME2_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1070 mask |= 1U << ((mmMME2_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1071 mask |= 1U << ((mmMME2_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1072 mask |= 1U << ((mmMME2_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1073 mask |= 1U << ((mmMME2_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1074 mask |= 1U << ((mmMME2_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1075 mask |= 1U << ((mmMME2_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1076 mask |= 1U << ((mmMME2_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1077 mask |= 1U << ((mmMME2_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1078 mask |= 1U << ((mmMME2_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1079 mask |= 1U << ((mmMME2_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1080 mask |= 1U << ((mmMME2_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1081 mask |= 1U << ((mmMME2_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1082 mask |= 1U << ((mmMME2_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1083 mask |= 1U << ((mmMME2_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1084 mask |= 1U << ((mmMME2_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1085 mask |= 1U << ((mmMME2_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1086 mask |= 1U << ((mmMME2_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1087 mask |= 1U << ((mmMME2_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1088 mask |= 1U << ((mmMME2_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1089 mask |= 1U << ((mmMME2_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1090 mask |= 1U << ((mmMME2_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1091 mask |= 1U << ((mmMME2_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1092 mask |= 1U << ((mmMME2_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1093 mask |= 1U << ((mmMME2_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1094 mask |= 1U << ((mmMME2_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1095 mask |= 1U << ((mmMME2_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1096 mask |= 1U << ((mmMME2_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1097 mask |= 1U << ((mmMME2_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1098 mask |= 1U << ((mmMME2_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1099 mask |= 1U << ((mmMME2_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1100 mask |= 1U << ((mmMME2_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1102 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1106 mask = 1U << ((mmMME2_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1107 mask |= 1U << ((mmMME2_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1108 mask |= 1U << ((mmMME2_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1109 mask |= 1U << ((mmMME2_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1110 mask |= 1U << ((mmMME2_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1111 mask |= 1U << ((mmMME2_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1112 mask |= 1U << ((mmMME2_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1113 mask |= 1U << ((mmMME2_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1114 mask |= 1U << ((mmMME2_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1115 mask |= 1U << ((mmMME2_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1116 mask |= 1U << ((mmMME2_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1117 mask |= 1U << ((mmMME2_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1118 mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1119 mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1120 mask |= 1U << ((mmMME2_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1122 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1126 mask = 1U << ((mmMME2_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1127 mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1128 mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1129 mask |= 1U << ((mmMME2_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1130 mask |= 1U << ((mmMME2_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1131 mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1132 mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1133 mask |= 1U << ((mmMME2_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1134 mask |= 1U << ((mmMME2_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1135 mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1136 mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1137 mask |= 1U << ((mmMME2_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1138 mask |= 1U << ((mmMME2_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1139 mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1140 mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1141 mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1142 mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1143 mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1144 mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1145 mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1146 mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1147 mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1148 mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1149 mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1150 mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1151 mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1152 mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1153 mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1155 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1159 mask = 1U << ((mmMME2_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1160 mask |= 1U << ((mmMME2_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1161 mask |= 1U << ((mmMME2_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1162 mask |= 1U << ((mmMME2_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1163 mask |= 1U << ((mmMME2_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1164 mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1165 mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1166 mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1167 mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1168 mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1169 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1170 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1171 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1172 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1173 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1174 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1175 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1176 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1177 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1178 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1179 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1180 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1181 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1182 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1183 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1184 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1185 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1186 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1187 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1188 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1189 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1190 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1192 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1197 mask = 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1198 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1199 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1200 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1201 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1202 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1203 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1204 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1205 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1206 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1207 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1208 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1209 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1210 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1211 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1212 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1213 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1214 mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1215 mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1216 mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1217 mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1218 mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1219 mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1220 mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1221 mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1222 mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1223 mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1224 mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1225 mask |= 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1226 mask |= 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1227 mask |= 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1229 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1235 mask = 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1236 mask |= 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1238 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1242 mask = 1U << ((mmMME2_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1243 mask |= 1U << ((mmMME2_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1244 mask |= 1U << ((mmMME2_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1245 mask |= 1U << ((mmMME2_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1246 mask |= 1U << ((mmMME2_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1247 mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1248 mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1249 mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1250 mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1251 mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1252 mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1253 mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1254 mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1255 mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1256 mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1257 mask |= 1U << ((mmMME2_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1258 mask |= 1U << ((mmMME2_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1259 mask |= 1U << ((mmMME2_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1261 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1265 mask = 1U << ((mmMME2_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1266 mask |= 1U << ((mmMME2_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1267 mask |= 1U << ((mmMME2_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1268 mask |= 1U << ((mmMME2_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1270 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1274 mask = 1U << ((mmMME2_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1275 mask |= 1U << ((mmMME2_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1276 mask |= 1U << ((mmMME2_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1277 mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1278 mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1279 mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1280 mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1281 mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1282 mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1283 mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1284 mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1285 mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1286 mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1288 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1292 mask = 1U << ((mmMME2_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1293 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1294 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1295 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1296 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1297 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1298 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1299 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1300 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1301 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1302 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1303 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1304 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1305 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1306 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1307 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1308 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1309 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1310 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1311 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1312 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1313 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1314 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1315 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1316 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1318 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1323 mask = 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1324 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1325 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1326 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1327 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1328 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1329 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1330 mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1332 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1338 mask = 1U << ((mmMME2_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1339 mask |= 1U << ((mmMME2_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1340 mask |= 1U << ((mmMME2_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1341 mask |= 1U << ((mmMME2_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1342 mask |= 1U << ((mmMME2_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1344 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1348 mask = 1U << ((mmMME2_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1349 mask |= 1U << ((mmMME2_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1350 mask |= 1U << ((mmMME2_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1351 mask |= 1U << ((mmMME2_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1352 mask |= 1U << ((mmMME2_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1353 mask |= 1U << ((mmMME2_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1354 mask |= 1U << ((mmMME2_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1355 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1356 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1357 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1358 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1359 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1360 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1361 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1362 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1363 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1364 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1365 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1366 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1367 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1368 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1369 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1370 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1371 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1372 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1373 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1374 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1376 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1381 mask = 1U << ((mmMME2_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1382 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1383 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1384 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1385 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1386 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1387 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1388 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1389 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1390 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1391 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1392 mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1393 mask |= 1U << ((mmMME2_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1394 mask |= 1U << ((mmMME2_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1395 mask |= 1U << ((mmMME2_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1397 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1401 mask = 1U << ((mmMME2_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1402 mask |= 1U << ((mmMME2_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1403 mask |= 1U << ((mmMME2_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1404 mask |= 1U << ((mmMME2_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1405 mask |= 1U << ((mmMME2_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1406 mask |= 1U << ((mmMME2_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1407 mask |= 1U << ((mmMME2_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1408 mask |= 1U << ((mmMME2_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1409 mask |= 1U << ((mmMME2_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1410 mask |= 1U << ((mmMME2_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1411 mask |= 1U << ((mmMME2_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1412 mask |= 1U << ((mmMME2_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1413 mask |= 1U << ((mmMME2_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1414 mask |= 1U << ((mmMME2_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1415 mask |= 1U << ((mmMME2_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1417 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1422 mask = 1U << ((mmMME2_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1424 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1428 mask = 1U << ((mmMME3_CTRL_RESET & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1429 mask |= 1U << ((mmMME3_CTRL_QM_STALL & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1430 mask |= 1U << ((mmMME3_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1431 mask |= 1U << ((mmMME3_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1432 mask |= 1U << ((mmMME3_CTRL_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1433 mask |= 1U << ((mmMME3_CTRL_INTR_MASK & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1434 mask |= 1U << ((mmMME3_CTRL_LOG_SHADOW & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1435 mask |= 1U << ((mmMME3_CTRL_PCU_RL_DESC0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1436 mask |= 1U << ((mmMME3_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1437 mask |= 1U << ((mmMME3_CTRL_PCU_RL_TH & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1438 mask |= 1U << ((mmMME3_CTRL_PCU_RL_MIN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1439 mask |= 1U << ((mmMME3_CTRL_PCU_RL_CTRL_EN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1440 mask |= 1U << ((mmMME3_CTRL_PCU_RL_HISTORY_LOG_SIZE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1441 mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_A_BF16 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1442 mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_B_BF16 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1443 mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_A_FP32_ODD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1444 mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_A_FP32_EVEN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1445 mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_B_FP32_ODD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1446 mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_B_FP32_EVEN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1447 mask |= 1U << ((mmMME3_CTRL_PROT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1448 mask |= 1U << ((mmMME3_CTRL_EU_POWER_SAVE_DISABLE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1449 mask |= 1U << ((mmMME3_CTRL_CS_DBG_BLOCK_ID & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1450 mask |= 1U << ((mmMME3_CTRL_CS_DBG_STATUS_DROP_CNT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1451 mask |= 1U << ((mmMME3_CTRL_TE_CLOSE_CGATE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1452 mask |= 1U << ((mmMME3_CTRL_AGU_SM_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1453 mask |= 1U << ((mmMME3_CTRL_AGU_SM_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1454 mask |= 1U << ((mmMME3_CTRL_EZSYNC_OUT_CREDIT & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1455 mask |= 1U << ((mmMME3_CTRL_PCU_RL_SAT_SEC & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1456 mask |= 1U << ((mmMME3_CTRL_AGU_SYNC_MSG_AXI_USER & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1457 mask |= 1U << ((mmMME3_CTRL_QM_SLV_LBW_CLK_EN & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1459 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1464 mask = 1U << ((mmMME3_CTRL_SHADOW_0_STATUS & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
1466 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_mme_protection_bits()
1473 u32 pb_addr, mask; in gaudi_init_dma_protection_bits() local
1514 mask = 1U << ((mmDMA0_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1515 mask |= 1U << ((mmDMA0_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1516 mask |= 1U << ((mmDMA0_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1517 mask |= 1U << ((mmDMA0_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1518 mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1519 mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1520 mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1521 mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1522 mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1523 mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1524 mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1525 mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1526 mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1527 mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1528 mask |= 1U << ((mmDMA0_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1529 mask |= 1U << ((mmDMA0_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1530 mask |= 1U << ((mmDMA0_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1531 mask |= 1U << ((mmDMA0_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1532 mask |= 1U << ((mmDMA0_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1533 mask |= 1U << ((mmDMA0_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1534 mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1535 mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1536 mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1537 mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1538 mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1539 mask |= 1U << ((mmDMA0_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1540 mask |= 1U << ((mmDMA0_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1541 mask |= 1U << ((mmDMA0_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1542 mask |= 1U << ((mmDMA0_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1544 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1548 mask = 1U << ((mmDMA0_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1549 mask |= 1U << ((mmDMA0_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1550 mask |= 1U << ((mmDMA0_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1551 mask |= 1U << ((mmDMA0_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1552 mask |= 1U << ((mmDMA0_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1553 mask |= 1U << ((mmDMA0_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1554 mask |= 1U << ((mmDMA0_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1555 mask |= 1U << ((mmDMA0_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1556 mask |= 1U << ((mmDMA0_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1557 mask |= 1U << ((mmDMA0_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1558 mask |= 1U << ((mmDMA0_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1559 mask |= 1U << ((mmDMA0_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1560 mask |= 1U << ((mmDMA0_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1561 mask |= 1U << ((mmDMA0_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1562 mask |= 1U << ((mmDMA0_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1563 mask |= 1U << ((mmDMA0_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1564 mask |= 1U << ((mmDMA0_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1565 mask |= 1U << ((mmDMA0_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1566 mask |= 1U << ((mmDMA0_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1567 mask |= 1U << ((mmDMA0_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1568 mask |= 1U << ((mmDMA0_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1569 mask |= 1U << ((mmDMA0_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1570 mask |= 1U << ((mmDMA0_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1571 mask |= 1U << ((mmDMA0_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1572 mask |= 1U << ((mmDMA0_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1573 mask |= 1U << ((mmDMA0_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1574 mask |= 1U << ((mmDMA0_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1575 mask |= 1U << ((mmDMA0_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1576 mask |= 1U << ((mmDMA0_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1577 mask |= 1U << ((mmDMA0_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1578 mask |= 1U << ((mmDMA0_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1579 mask |= 1U << ((mmDMA0_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1581 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1585 mask = 1U << ((mmDMA0_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1586 mask |= 1U << ((mmDMA0_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1587 mask |= 1U << ((mmDMA0_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1588 mask |= 1U << ((mmDMA0_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1589 mask |= 1U << ((mmDMA0_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1590 mask |= 1U << ((mmDMA0_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1591 mask |= 1U << ((mmDMA0_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1592 mask |= 1U << ((mmDMA0_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1593 mask |= 1U << ((mmDMA0_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1594 mask |= 1U << ((mmDMA0_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1595 mask |= 1U << ((mmDMA0_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1596 mask |= 1U << ((mmDMA0_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1597 mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1598 mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1599 mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1601 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1605 mask = 1U << ((mmDMA0_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1606 mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1607 mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1608 mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1609 mask |= 1U << ((mmDMA0_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1610 mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1611 mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1612 mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1613 mask |= 1U << ((mmDMA0_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1614 mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1615 mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1616 mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1617 mask |= 1U << ((mmDMA0_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1618 mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1619 mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1620 mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1621 mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1622 mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1623 mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1624 mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1625 mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1626 mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1627 mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1628 mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1629 mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1630 mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1631 mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1632 mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1634 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1638 mask = 1U << ((mmDMA0_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1639 mask |= 1U << ((mmDMA0_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1640 mask |= 1U << ((mmDMA0_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1641 mask |= 1U << ((mmDMA0_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1642 mask |= 1U << ((mmDMA0_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1643 mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1644 mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1645 mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1646 mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1647 mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1648 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1649 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1650 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1651 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1652 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1653 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1654 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1655 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1656 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1657 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1658 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1659 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1660 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1661 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1662 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1663 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1664 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1665 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1666 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1667 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1668 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1669 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1671 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1676 mask = 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1677 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1678 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1679 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1680 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1681 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1682 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1683 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1684 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1685 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1686 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1687 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1688 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1689 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1690 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1691 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1692 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1693 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1694 mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1695 mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1696 mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1697 mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1698 mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1699 mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1700 mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1701 mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1702 mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1703 mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1704 mask |= 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1705 mask |= 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1706 mask |= 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1708 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1715 mask = 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1716 mask |= 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1718 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1722 mask = 1U << ((mmDMA0_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1723 mask |= 1U << ((mmDMA0_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1724 mask |= 1U << ((mmDMA0_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1725 mask |= 1U << ((mmDMA0_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1726 mask |= 1U << ((mmDMA0_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1727 mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1728 mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1729 mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1730 mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1731 mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1732 mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1733 mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1734 mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1735 mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1736 mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1737 mask |= 1U << ((mmDMA0_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1738 mask |= 1U << ((mmDMA0_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1739 mask |= 1U << ((mmDMA0_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1741 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1745 mask = 1U << ((mmDMA0_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1746 mask |= 1U << ((mmDMA0_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1747 mask |= 1U << ((mmDMA0_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1748 mask |= 1U << ((mmDMA0_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1750 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1754 mask = 1U << ((mmDMA0_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1755 mask |= 1U << ((mmDMA0_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1756 mask |= 1U << ((mmDMA0_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1757 mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1758 mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1759 mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1760 mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1761 mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1762 mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1763 mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1764 mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1765 mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1766 mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1768 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1772 mask = 1U << ((mmDMA0_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1773 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1774 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1775 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1776 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1777 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1778 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1779 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1780 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1781 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1782 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1783 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1784 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1785 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1786 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1787 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1788 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1789 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1790 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1791 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1792 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1793 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1794 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1795 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1796 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1798 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1803 mask = 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1804 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1805 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1806 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1807 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1808 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1809 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1810 mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1811 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1818 mask = 1U << ((mmDMA0_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1819 mask |= 1U << ((mmDMA0_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1820 mask |= 1U << ((mmDMA0_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1821 mask |= 1U << ((mmDMA0_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1822 mask |= 1U << ((mmDMA0_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1824 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1828 mask = 1U << ((mmDMA0_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1829 mask |= 1U << ((mmDMA0_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1830 mask |= 1U << ((mmDMA0_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1831 mask |= 1U << ((mmDMA0_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1832 mask |= 1U << ((mmDMA0_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1833 mask |= 1U << ((mmDMA0_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1834 mask |= 1U << ((mmDMA0_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1835 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1836 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1837 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1838 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1839 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1840 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1841 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1842 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1843 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1844 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1845 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1846 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1847 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1848 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1849 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1850 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1851 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1852 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1853 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1854 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1856 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1861 mask = 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1862 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1863 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1864 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1865 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1866 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1867 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1868 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1869 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1870 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1871 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1872 mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1873 mask |= 1U << ((mmDMA0_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1874 mask |= 1U << ((mmDMA0_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1875 mask |= 1U << ((mmDMA0_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1877 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1881 mask = 1U << ((mmDMA0_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1882 mask |= 1U << ((mmDMA0_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1883 mask |= 1U << ((mmDMA0_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1884 mask |= 1U << ((mmDMA0_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1885 mask |= 1U << ((mmDMA0_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1886 mask |= 1U << ((mmDMA0_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1887 mask |= 1U << ((mmDMA0_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1888 mask |= 1U << ((mmDMA0_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1889 mask |= 1U << ((mmDMA0_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1890 mask |= 1U << ((mmDMA0_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1891 mask |= 1U << ((mmDMA0_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1892 mask |= 1U << ((mmDMA0_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1893 mask |= 1U << ((mmDMA0_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1894 mask |= 1U << ((mmDMA0_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1895 mask |= 1U << ((mmDMA0_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1897 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1902 mask = 1U << ((mmDMA0_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1904 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1908 mask = 1U << ((mmDMA1_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1909 mask |= 1U << ((mmDMA1_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1910 mask |= 1U << ((mmDMA1_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1911 mask |= 1U << ((mmDMA1_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1912 mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1913 mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1914 mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1915 mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1916 mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1917 mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1918 mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1919 mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1920 mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1921 mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1922 mask |= 1U << ((mmDMA1_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1923 mask |= 1U << ((mmDMA1_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1924 mask |= 1U << ((mmDMA1_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1925 mask |= 1U << ((mmDMA1_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1926 mask |= 1U << ((mmDMA1_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1927 mask |= 1U << ((mmDMA1_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1928 mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1929 mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1930 mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1931 mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1932 mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1933 mask |= 1U << ((mmDMA1_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1934 mask |= 1U << ((mmDMA1_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1935 mask |= 1U << ((mmDMA1_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1936 mask |= 1U << ((mmDMA1_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1938 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1942 mask = 1U << ((mmDMA1_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1943 mask |= 1U << ((mmDMA1_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1944 mask |= 1U << ((mmDMA1_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1945 mask |= 1U << ((mmDMA1_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1946 mask |= 1U << ((mmDMA1_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1947 mask |= 1U << ((mmDMA1_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1948 mask |= 1U << ((mmDMA1_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1949 mask |= 1U << ((mmDMA1_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1950 mask |= 1U << ((mmDMA1_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1951 mask |= 1U << ((mmDMA1_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1952 mask |= 1U << ((mmDMA1_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1953 mask |= 1U << ((mmDMA1_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1954 mask |= 1U << ((mmDMA1_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1955 mask |= 1U << ((mmDMA1_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1956 mask |= 1U << ((mmDMA1_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1957 mask |= 1U << ((mmDMA1_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1958 mask |= 1U << ((mmDMA1_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1959 mask |= 1U << ((mmDMA1_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1960 mask |= 1U << ((mmDMA1_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1961 mask |= 1U << ((mmDMA1_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1962 mask |= 1U << ((mmDMA1_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1963 mask |= 1U << ((mmDMA1_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1964 mask |= 1U << ((mmDMA1_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1965 mask |= 1U << ((mmDMA1_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1966 mask |= 1U << ((mmDMA1_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1967 mask |= 1U << ((mmDMA1_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1968 mask |= 1U << ((mmDMA1_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1969 mask |= 1U << ((mmDMA1_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1970 mask |= 1U << ((mmDMA1_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1971 mask |= 1U << ((mmDMA1_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1972 mask |= 1U << ((mmDMA1_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1973 mask |= 1U << ((mmDMA1_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1975 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1979 mask = 1U << ((mmDMA1_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1980 mask |= 1U << ((mmDMA1_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1981 mask |= 1U << ((mmDMA1_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1982 mask |= 1U << ((mmDMA1_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1983 mask |= 1U << ((mmDMA1_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1984 mask |= 1U << ((mmDMA1_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1985 mask |= 1U << ((mmDMA1_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1986 mask |= 1U << ((mmDMA1_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1987 mask |= 1U << ((mmDMA1_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1988 mask |= 1U << ((mmDMA1_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1989 mask |= 1U << ((mmDMA1_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1990 mask |= 1U << ((mmDMA1_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1991 mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1992 mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1993 mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
1995 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
1999 mask = 1U << ((mmDMA1_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2000 mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2001 mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2002 mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2003 mask |= 1U << ((mmDMA1_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2004 mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2005 mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2006 mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2007 mask |= 1U << ((mmDMA1_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2008 mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2009 mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2010 mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2011 mask |= 1U << ((mmDMA1_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2012 mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2013 mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2014 mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2015 mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2016 mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2017 mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2018 mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2019 mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2020 mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2021 mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2022 mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2023 mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2024 mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2025 mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2026 mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2028 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2032 mask = 1U << ((mmDMA1_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2033 mask |= 1U << ((mmDMA1_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2034 mask |= 1U << ((mmDMA1_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2035 mask |= 1U << ((mmDMA1_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2036 mask |= 1U << ((mmDMA1_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2037 mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2038 mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2039 mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2040 mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2041 mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2042 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2043 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2044 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2045 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2046 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2047 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2048 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2049 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2050 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2051 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2052 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2053 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2054 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2055 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2056 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2057 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2058 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2059 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2060 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2061 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2062 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2063 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2065 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2070 mask = 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2071 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2072 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2073 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2074 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2075 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2076 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2077 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2078 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2079 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2080 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2081 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2082 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2083 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2084 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2085 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2086 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2087 mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2088 mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2089 mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2090 mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2091 mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2092 mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2093 mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2094 mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2095 mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2096 mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2097 mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2098 mask |= 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2099 mask |= 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2100 mask |= 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2102 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2109 mask = 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2110 mask |= 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2112 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2116 mask = 1U << ((mmDMA1_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2117 mask |= 1U << ((mmDMA1_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2118 mask |= 1U << ((mmDMA1_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2119 mask |= 1U << ((mmDMA1_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2120 mask |= 1U << ((mmDMA1_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2121 mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2122 mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2123 mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2124 mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2125 mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2126 mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2127 mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2128 mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2129 mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2130 mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2131 mask |= 1U << ((mmDMA1_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2132 mask |= 1U << ((mmDMA1_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2133 mask |= 1U << ((mmDMA1_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2135 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2139 mask = 1U << ((mmDMA1_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2140 mask |= 1U << ((mmDMA1_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2141 mask |= 1U << ((mmDMA1_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2142 mask |= 1U << ((mmDMA1_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2144 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2148 mask = 1U << ((mmDMA1_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2149 mask |= 1U << ((mmDMA1_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2150 mask |= 1U << ((mmDMA1_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2151 mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2152 mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2153 mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2154 mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2155 mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2156 mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2157 mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2158 mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2159 mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2160 mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2162 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2166 mask = 1U << ((mmDMA1_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2167 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2168 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2169 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2170 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2171 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2172 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2173 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2174 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2175 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2176 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2177 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2178 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2179 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2180 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2181 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2182 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2183 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2184 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2185 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2186 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2187 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2188 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2189 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2190 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2192 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2197 mask = 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2198 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2199 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2200 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2201 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2202 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2203 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2204 mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2206 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2213 mask = 1U << ((mmDMA1_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2214 mask |= 1U << ((mmDMA1_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2215 mask |= 1U << ((mmDMA1_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2216 mask |= 1U << ((mmDMA1_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2217 mask |= 1U << ((mmDMA1_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2219 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2223 mask = 1U << ((mmDMA1_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2224 mask |= 1U << ((mmDMA1_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2225 mask |= 1U << ((mmDMA1_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2226 mask |= 1U << ((mmDMA1_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2227 mask |= 1U << ((mmDMA1_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2228 mask |= 1U << ((mmDMA1_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2229 mask |= 1U << ((mmDMA1_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2230 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2231 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2232 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2233 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2234 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2235 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2236 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2237 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2238 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2239 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2240 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2241 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2242 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2243 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2244 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2245 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2246 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2247 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2248 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2249 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2251 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2256 mask = 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2257 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2258 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2259 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2260 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2261 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2262 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2263 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2264 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2265 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2266 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2267 mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2268 mask |= 1U << ((mmDMA1_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2269 mask |= 1U << ((mmDMA1_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2270 mask |= 1U << ((mmDMA1_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2272 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2276 mask = 1U << ((mmDMA1_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2277 mask |= 1U << ((mmDMA1_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2278 mask |= 1U << ((mmDMA1_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2279 mask |= 1U << ((mmDMA1_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2280 mask |= 1U << ((mmDMA1_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2281 mask |= 1U << ((mmDMA1_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2282 mask |= 1U << ((mmDMA1_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2283 mask |= 1U << ((mmDMA1_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2284 mask |= 1U << ((mmDMA1_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2285 mask |= 1U << ((mmDMA1_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2286 mask |= 1U << ((mmDMA1_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2287 mask |= 1U << ((mmDMA1_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2288 mask |= 1U << ((mmDMA1_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2289 mask |= 1U << ((mmDMA1_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2290 mask |= 1U << ((mmDMA1_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2292 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2297 mask = 1U << ((mmDMA1_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2299 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2303 mask = 1U << ((mmDMA2_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2304 mask |= 1U << ((mmDMA2_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2305 mask |= 1U << ((mmDMA2_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2306 mask |= 1U << ((mmDMA2_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2307 mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2308 mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2309 mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2310 mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2311 mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2312 mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2313 mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2314 mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2315 mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2316 mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2317 mask |= 1U << ((mmDMA2_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2318 mask |= 1U << ((mmDMA2_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2319 mask |= 1U << ((mmDMA2_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2320 mask |= 1U << ((mmDMA2_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2321 mask |= 1U << ((mmDMA2_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2322 mask |= 1U << ((mmDMA2_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2323 mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2324 mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2325 mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2326 mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2327 mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2328 mask |= 1U << ((mmDMA2_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2329 mask |= 1U << ((mmDMA2_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2330 mask |= 1U << ((mmDMA2_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2331 mask |= 1U << ((mmDMA2_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2333 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2337 mask = 1U << ((mmDMA2_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2338 mask |= 1U << ((mmDMA2_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2339 mask |= 1U << ((mmDMA2_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2340 mask |= 1U << ((mmDMA2_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2341 mask |= 1U << ((mmDMA2_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2342 mask |= 1U << ((mmDMA2_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2343 mask |= 1U << ((mmDMA2_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2344 mask |= 1U << ((mmDMA2_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2345 mask |= 1U << ((mmDMA2_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2346 mask |= 1U << ((mmDMA2_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2347 mask |= 1U << ((mmDMA2_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2348 mask |= 1U << ((mmDMA2_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2349 mask |= 1U << ((mmDMA2_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2350 mask |= 1U << ((mmDMA2_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2351 mask |= 1U << ((mmDMA2_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2352 mask |= 1U << ((mmDMA2_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2353 mask |= 1U << ((mmDMA2_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2354 mask |= 1U << ((mmDMA2_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2355 mask |= 1U << ((mmDMA2_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2356 mask |= 1U << ((mmDMA2_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2357 mask |= 1U << ((mmDMA2_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2358 mask |= 1U << ((mmDMA2_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2359 mask |= 1U << ((mmDMA2_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2360 mask |= 1U << ((mmDMA2_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2361 mask |= 1U << ((mmDMA2_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2362 mask |= 1U << ((mmDMA2_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2363 mask |= 1U << ((mmDMA2_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2364 mask |= 1U << ((mmDMA2_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2365 mask |= 1U << ((mmDMA2_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2366 mask |= 1U << ((mmDMA2_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2367 mask |= 1U << ((mmDMA2_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2368 mask |= 1U << ((mmDMA2_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2370 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2374 mask = 1U << ((mmDMA2_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2375 mask |= 1U << ((mmDMA2_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2376 mask |= 1U << ((mmDMA2_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2377 mask |= 1U << ((mmDMA2_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2378 mask |= 1U << ((mmDMA2_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2379 mask |= 1U << ((mmDMA2_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2380 mask |= 1U << ((mmDMA2_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2381 mask |= 1U << ((mmDMA2_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2382 mask |= 1U << ((mmDMA2_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2383 mask |= 1U << ((mmDMA2_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2384 mask |= 1U << ((mmDMA2_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2385 mask |= 1U << ((mmDMA2_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2386 mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2387 mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2388 mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2390 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2394 mask = 1U << ((mmDMA2_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2395 mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2396 mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2397 mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2398 mask |= 1U << ((mmDMA2_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2399 mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2400 mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2401 mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2402 mask |= 1U << ((mmDMA2_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2403 mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2404 mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2405 mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2406 mask |= 1U << ((mmDMA2_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2407 mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2408 mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2409 mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2410 mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2411 mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2412 mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2413 mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2414 mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2415 mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2416 mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2417 mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2418 mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2419 mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2420 mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2421 mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2423 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2427 mask = 1U << ((mmDMA2_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2428 mask |= 1U << ((mmDMA2_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2429 mask |= 1U << ((mmDMA2_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2430 mask |= 1U << ((mmDMA2_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2431 mask |= 1U << ((mmDMA2_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2432 mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2433 mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2434 mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2435 mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2436 mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2437 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2438 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2439 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2440 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2441 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2442 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2443 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2444 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2445 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2446 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2447 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2448 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2449 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2450 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2451 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2452 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2453 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2454 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2455 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2456 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2457 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2458 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2460 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2465 mask = 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2466 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2467 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2468 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2469 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2470 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2471 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2472 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2473 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2474 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2475 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2476 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2477 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2478 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2479 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2480 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2481 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2482 mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2483 mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2484 mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2485 mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2486 mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2487 mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2488 mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2489 mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2490 mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2491 mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2492 mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2493 mask |= 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2494 mask |= 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2495 mask |= 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2497 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2504 mask = 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2505 mask |= 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2507 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2511 mask = 1U << ((mmDMA2_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2512 mask |= 1U << ((mmDMA2_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2513 mask |= 1U << ((mmDMA2_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2514 mask |= 1U << ((mmDMA2_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2515 mask |= 1U << ((mmDMA2_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2516 mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2517 mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2518 mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2519 mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2520 mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2521 mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2522 mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2523 mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2524 mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2525 mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2526 mask |= 1U << ((mmDMA2_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2527 mask |= 1U << ((mmDMA2_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2528 mask |= 1U << ((mmDMA2_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2530 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2534 mask = 1U << ((mmDMA2_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2535 mask |= 1U << ((mmDMA2_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2536 mask |= 1U << ((mmDMA2_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2537 mask |= 1U << ((mmDMA2_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2539 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2543 mask = 1U << ((mmDMA2_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2544 mask |= 1U << ((mmDMA2_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2545 mask |= 1U << ((mmDMA2_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2546 mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2547 mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2548 mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2549 mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2550 mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2551 mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2552 mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2553 mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2554 mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2555 mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2557 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2561 mask = 1U << ((mmDMA2_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2562 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2563 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2564 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2565 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2566 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2567 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2568 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2569 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2570 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2571 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2572 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2573 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2574 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2575 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2576 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2577 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2578 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2579 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2580 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2581 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2582 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2583 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2584 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2585 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2587 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2592 mask = 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2593 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2594 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2595 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2596 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2597 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2598 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2599 mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2601 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2608 mask = 1U << ((mmDMA2_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2609 mask |= 1U << ((mmDMA2_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2610 mask |= 1U << ((mmDMA2_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2611 mask |= 1U << ((mmDMA2_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2612 mask |= 1U << ((mmDMA2_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2614 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2618 mask = 1U << ((mmDMA2_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2619 mask |= 1U << ((mmDMA2_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2620 mask |= 1U << ((mmDMA2_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2621 mask |= 1U << ((mmDMA2_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2622 mask |= 1U << ((mmDMA2_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2623 mask |= 1U << ((mmDMA2_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2624 mask |= 1U << ((mmDMA2_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2625 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2626 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2627 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2628 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2629 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2630 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2631 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2632 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2633 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2634 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2635 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2636 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2637 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2638 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2639 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2640 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2641 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2642 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2643 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2644 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2646 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2651 mask = 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2652 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2653 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2654 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2655 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2656 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2657 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2658 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2659 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2660 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2661 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2662 mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2663 mask |= 1U << ((mmDMA2_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2664 mask |= 1U << ((mmDMA2_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2665 mask |= 1U << ((mmDMA2_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2667 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2671 mask = 1U << ((mmDMA2_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2672 mask |= 1U << ((mmDMA2_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2673 mask |= 1U << ((mmDMA2_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2674 mask |= 1U << ((mmDMA2_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2675 mask |= 1U << ((mmDMA2_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2676 mask |= 1U << ((mmDMA2_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2677 mask |= 1U << ((mmDMA2_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2678 mask |= 1U << ((mmDMA2_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2679 mask |= 1U << ((mmDMA2_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2680 mask |= 1U << ((mmDMA2_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2681 mask |= 1U << ((mmDMA2_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2682 mask |= 1U << ((mmDMA2_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2683 mask |= 1U << ((mmDMA2_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2684 mask |= 1U << ((mmDMA2_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2685 mask |= 1U << ((mmDMA2_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2687 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2692 mask = 1U << ((mmDMA2_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2694 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2698 mask = 1U << ((mmDMA3_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2699 mask |= 1U << ((mmDMA3_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2700 mask |= 1U << ((mmDMA3_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2701 mask |= 1U << ((mmDMA3_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2702 mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2703 mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2704 mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2705 mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2706 mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2707 mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2708 mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2709 mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2710 mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2711 mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2712 mask |= 1U << ((mmDMA3_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2713 mask |= 1U << ((mmDMA3_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2714 mask |= 1U << ((mmDMA3_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2715 mask |= 1U << ((mmDMA3_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2716 mask |= 1U << ((mmDMA3_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2717 mask |= 1U << ((mmDMA3_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2718 mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2719 mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2720 mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2721 mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2722 mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2723 mask |= 1U << ((mmDMA3_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2724 mask |= 1U << ((mmDMA3_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2725 mask |= 1U << ((mmDMA3_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2726 mask |= 1U << ((mmDMA3_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2728 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2732 mask = 1U << ((mmDMA3_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2733 mask |= 1U << ((mmDMA3_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2734 mask |= 1U << ((mmDMA3_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2735 mask |= 1U << ((mmDMA3_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2736 mask |= 1U << ((mmDMA3_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2737 mask |= 1U << ((mmDMA3_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2738 mask |= 1U << ((mmDMA3_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2739 mask |= 1U << ((mmDMA3_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2740 mask |= 1U << ((mmDMA3_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2741 mask |= 1U << ((mmDMA3_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2742 mask |= 1U << ((mmDMA3_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2743 mask |= 1U << ((mmDMA3_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2744 mask |= 1U << ((mmDMA3_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2745 mask |= 1U << ((mmDMA3_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2746 mask |= 1U << ((mmDMA3_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2747 mask |= 1U << ((mmDMA3_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2748 mask |= 1U << ((mmDMA3_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2749 mask |= 1U << ((mmDMA3_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2750 mask |= 1U << ((mmDMA3_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2751 mask |= 1U << ((mmDMA3_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2752 mask |= 1U << ((mmDMA3_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2753 mask |= 1U << ((mmDMA3_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2754 mask |= 1U << ((mmDMA3_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2755 mask |= 1U << ((mmDMA3_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2756 mask |= 1U << ((mmDMA3_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2757 mask |= 1U << ((mmDMA3_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2758 mask |= 1U << ((mmDMA3_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2759 mask |= 1U << ((mmDMA3_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2760 mask |= 1U << ((mmDMA3_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2761 mask |= 1U << ((mmDMA3_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2762 mask |= 1U << ((mmDMA3_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2763 mask |= 1U << ((mmDMA3_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2765 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2769 mask = 1U << ((mmDMA3_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2770 mask |= 1U << ((mmDMA3_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2771 mask |= 1U << ((mmDMA3_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2772 mask |= 1U << ((mmDMA3_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2773 mask |= 1U << ((mmDMA3_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2774 mask |= 1U << ((mmDMA3_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2775 mask |= 1U << ((mmDMA3_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2776 mask |= 1U << ((mmDMA3_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2777 mask |= 1U << ((mmDMA3_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2778 mask |= 1U << ((mmDMA3_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2779 mask |= 1U << ((mmDMA3_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2780 mask |= 1U << ((mmDMA3_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2781 mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2782 mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2783 mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2785 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2789 mask = 1U << ((mmDMA3_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2790 mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2791 mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2792 mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2793 mask |= 1U << ((mmDMA3_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2794 mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2795 mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2796 mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2797 mask |= 1U << ((mmDMA3_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2798 mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2799 mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2800 mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2801 mask |= 1U << ((mmDMA3_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2802 mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2803 mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2804 mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2805 mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2806 mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2807 mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2808 mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2809 mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2810 mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2811 mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2812 mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2813 mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2814 mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2815 mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2816 mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2818 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2822 mask = 1U << ((mmDMA3_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2823 mask |= 1U << ((mmDMA3_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2824 mask |= 1U << ((mmDMA3_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2825 mask |= 1U << ((mmDMA3_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2826 mask |= 1U << ((mmDMA3_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2827 mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2828 mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2829 mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2830 mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2831 mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2832 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2833 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2834 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2835 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2836 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2837 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2838 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2839 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2840 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2841 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2842 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2843 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2844 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2845 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2846 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2847 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2848 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2849 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2850 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2851 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2852 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2853 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2855 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2860 mask = 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2861 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2862 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2863 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2864 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2865 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2866 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2867 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2868 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2869 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2870 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2871 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2872 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2873 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2874 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2875 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2876 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2877 mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2878 mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2879 mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2880 mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2881 mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2882 mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2883 mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2884 mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2885 mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2886 mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2887 mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2888 mask |= 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2889 mask |= 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2890 mask |= 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2892 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2899 mask = 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2900 mask |= 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2902 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2906 mask = 1U << ((mmDMA3_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2907 mask |= 1U << ((mmDMA3_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2908 mask |= 1U << ((mmDMA3_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2909 mask |= 1U << ((mmDMA3_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2910 mask |= 1U << ((mmDMA3_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2911 mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2912 mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2913 mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2914 mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2915 mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2916 mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2917 mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2918 mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2919 mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2920 mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2921 mask |= 1U << ((mmDMA3_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2922 mask |= 1U << ((mmDMA3_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2923 mask |= 1U << ((mmDMA3_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2925 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2929 mask = 1U << ((mmDMA3_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2930 mask |= 1U << ((mmDMA3_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2931 mask |= 1U << ((mmDMA3_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2932 mask |= 1U << ((mmDMA3_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2934 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2938 mask = 1U << ((mmDMA3_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2939 mask |= 1U << ((mmDMA3_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2940 mask |= 1U << ((mmDMA3_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2941 mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2942 mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2943 mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2944 mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2945 mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2946 mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2947 mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2948 mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2949 mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2950 mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2952 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2956 mask = 1U << ((mmDMA3_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2957 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2958 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2959 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2960 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2961 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2962 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2963 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2964 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2965 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2966 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2967 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2968 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2969 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2970 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2971 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2972 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2973 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2974 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2975 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2976 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2977 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2978 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2979 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2980 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2982 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
2987 mask = 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2988 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2989 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2990 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2991 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2992 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2993 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2994 mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
2996 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3003 mask = 1U << ((mmDMA3_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3004 mask |= 1U << ((mmDMA3_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3005 mask |= 1U << ((mmDMA3_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3006 mask |= 1U << ((mmDMA3_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3007 mask |= 1U << ((mmDMA3_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3009 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3013 mask = 1U << ((mmDMA3_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3014 mask |= 1U << ((mmDMA3_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3015 mask |= 1U << ((mmDMA3_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3016 mask |= 1U << ((mmDMA3_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3017 mask |= 1U << ((mmDMA3_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3018 mask |= 1U << ((mmDMA3_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3019 mask |= 1U << ((mmDMA3_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3020 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3021 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3022 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3023 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3024 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3025 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3026 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3027 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3028 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3029 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3030 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3031 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3032 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3033 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3034 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3035 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3036 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3037 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3038 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3039 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3041 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3046 mask = 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3047 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3048 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3049 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3050 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3051 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3052 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3053 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3054 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3055 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3056 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3057 mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3058 mask |= 1U << ((mmDMA3_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3059 mask |= 1U << ((mmDMA3_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3060 mask |= 1U << ((mmDMA3_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3062 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3066 mask = 1U << ((mmDMA3_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3067 mask |= 1U << ((mmDMA3_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3068 mask |= 1U << ((mmDMA3_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3069 mask |= 1U << ((mmDMA3_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3070 mask |= 1U << ((mmDMA3_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3071 mask |= 1U << ((mmDMA3_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3072 mask |= 1U << ((mmDMA3_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3073 mask |= 1U << ((mmDMA3_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3074 mask |= 1U << ((mmDMA3_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3075 mask |= 1U << ((mmDMA3_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3076 mask |= 1U << ((mmDMA3_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3077 mask |= 1U << ((mmDMA3_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3078 mask |= 1U << ((mmDMA3_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3079 mask |= 1U << ((mmDMA3_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3080 mask |= 1U << ((mmDMA3_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3082 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3087 mask = 1U << ((mmDMA3_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3089 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3093 mask = 1U << ((mmDMA4_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3094 mask |= 1U << ((mmDMA4_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3095 mask |= 1U << ((mmDMA4_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3096 mask |= 1U << ((mmDMA4_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3097 mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3098 mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3099 mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3100 mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3101 mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3102 mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3103 mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3104 mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3105 mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3106 mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3107 mask |= 1U << ((mmDMA4_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3108 mask |= 1U << ((mmDMA4_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3109 mask |= 1U << ((mmDMA4_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3110 mask |= 1U << ((mmDMA4_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3111 mask |= 1U << ((mmDMA4_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3112 mask |= 1U << ((mmDMA4_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3113 mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3114 mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3115 mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3116 mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3117 mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3118 mask |= 1U << ((mmDMA4_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3119 mask |= 1U << ((mmDMA4_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3120 mask |= 1U << ((mmDMA4_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3121 mask |= 1U << ((mmDMA4_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3123 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3127 mask = 1U << ((mmDMA4_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3128 mask |= 1U << ((mmDMA4_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3129 mask |= 1U << ((mmDMA4_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3130 mask |= 1U << ((mmDMA4_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3131 mask |= 1U << ((mmDMA4_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3132 mask |= 1U << ((mmDMA4_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3133 mask |= 1U << ((mmDMA4_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3134 mask |= 1U << ((mmDMA4_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3135 mask |= 1U << ((mmDMA4_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3136 mask |= 1U << ((mmDMA4_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3137 mask |= 1U << ((mmDMA4_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3138 mask |= 1U << ((mmDMA4_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3139 mask |= 1U << ((mmDMA4_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3140 mask |= 1U << ((mmDMA4_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3141 mask |= 1U << ((mmDMA4_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3142 mask |= 1U << ((mmDMA4_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3143 mask |= 1U << ((mmDMA4_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3144 mask |= 1U << ((mmDMA4_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3145 mask |= 1U << ((mmDMA4_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3146 mask |= 1U << ((mmDMA4_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3147 mask |= 1U << ((mmDMA4_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3148 mask |= 1U << ((mmDMA4_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3149 mask |= 1U << ((mmDMA4_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3150 mask |= 1U << ((mmDMA4_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3151 mask |= 1U << ((mmDMA4_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3152 mask |= 1U << ((mmDMA4_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3153 mask |= 1U << ((mmDMA4_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3154 mask |= 1U << ((mmDMA4_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3155 mask |= 1U << ((mmDMA4_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3156 mask |= 1U << ((mmDMA4_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3157 mask |= 1U << ((mmDMA4_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3158 mask |= 1U << ((mmDMA4_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3160 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3164 mask = 1U << ((mmDMA4_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3165 mask |= 1U << ((mmDMA4_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3166 mask |= 1U << ((mmDMA4_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3167 mask |= 1U << ((mmDMA4_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3168 mask |= 1U << ((mmDMA4_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3169 mask |= 1U << ((mmDMA4_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3170 mask |= 1U << ((mmDMA4_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3171 mask |= 1U << ((mmDMA4_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3172 mask |= 1U << ((mmDMA4_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3173 mask |= 1U << ((mmDMA4_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3174 mask |= 1U << ((mmDMA4_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3175 mask |= 1U << ((mmDMA4_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3176 mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3177 mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3178 mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3180 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3184 mask = 1U << ((mmDMA4_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3185 mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3186 mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3187 mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3188 mask |= 1U << ((mmDMA4_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3189 mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3190 mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3191 mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3192 mask |= 1U << ((mmDMA4_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3193 mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3194 mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3195 mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3196 mask |= 1U << ((mmDMA4_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3197 mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3198 mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3199 mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3200 mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3201 mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3202 mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3203 mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3204 mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3205 mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3206 mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3207 mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3208 mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3209 mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3210 mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3211 mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3213 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3217 mask = 1U << ((mmDMA4_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3218 mask |= 1U << ((mmDMA4_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3219 mask |= 1U << ((mmDMA4_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3220 mask |= 1U << ((mmDMA4_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3221 mask |= 1U << ((mmDMA4_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3222 mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3223 mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3224 mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3225 mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3226 mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3227 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3228 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3229 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3230 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3231 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3232 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3233 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3234 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3235 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3236 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3237 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3238 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3239 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3240 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3241 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3242 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3243 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3244 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3245 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3246 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3247 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3248 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3250 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3255 mask = 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3256 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3257 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3258 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3259 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3260 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3261 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3262 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3263 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3264 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3265 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3266 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3267 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3268 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3269 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3270 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3271 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3272 mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3273 mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3274 mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3275 mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3276 mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3277 mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3278 mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3279 mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3280 mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3281 mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3282 mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3283 mask |= 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3284 mask |= 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3285 mask |= 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3287 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3294 mask = 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3295 mask |= 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3297 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3301 mask = 1U << ((mmDMA4_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3302 mask |= 1U << ((mmDMA4_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3303 mask |= 1U << ((mmDMA4_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3304 mask |= 1U << ((mmDMA4_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3305 mask |= 1U << ((mmDMA4_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3306 mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3307 mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3308 mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3309 mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3310 mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3311 mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3312 mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3313 mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3314 mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3315 mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3316 mask |= 1U << ((mmDMA4_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3317 mask |= 1U << ((mmDMA4_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3318 mask |= 1U << ((mmDMA4_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3320 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3324 mask = 1U << ((mmDMA4_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3325 mask |= 1U << ((mmDMA4_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3326 mask |= 1U << ((mmDMA4_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3327 mask |= 1U << ((mmDMA4_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3329 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3333 mask = 1U << ((mmDMA4_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3334 mask |= 1U << ((mmDMA4_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3335 mask |= 1U << ((mmDMA4_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3336 mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3337 mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3338 mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3339 mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3340 mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3341 mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3342 mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3343 mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3344 mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3345 mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3347 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3351 mask = 1U << ((mmDMA4_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3352 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3353 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3354 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3355 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3356 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3357 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3358 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3359 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3360 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3361 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3362 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3363 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3364 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3365 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3366 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3367 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3368 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3369 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3370 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3371 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3372 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3373 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3374 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3375 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3377 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3382 mask = 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3383 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3384 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3385 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3386 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3387 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3388 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3389 mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3391 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3398 mask = 1U << ((mmDMA4_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3399 mask |= 1U << ((mmDMA4_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3400 mask |= 1U << ((mmDMA4_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3401 mask |= 1U << ((mmDMA4_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3402 mask |= 1U << ((mmDMA4_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3404 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3408 mask = 1U << ((mmDMA4_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3409 mask |= 1U << ((mmDMA4_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3410 mask |= 1U << ((mmDMA4_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3411 mask |= 1U << ((mmDMA4_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3412 mask |= 1U << ((mmDMA4_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3413 mask |= 1U << ((mmDMA4_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3414 mask |= 1U << ((mmDMA4_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3415 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3416 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3417 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3418 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3419 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3420 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3421 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3422 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3423 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3424 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3425 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3426 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3427 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3428 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3429 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3430 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3431 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3432 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3433 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3434 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3436 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3441 mask = 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3442 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3443 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3444 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3445 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3446 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3447 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3448 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3449 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3450 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3451 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3452 mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3453 mask |= 1U << ((mmDMA4_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3454 mask |= 1U << ((mmDMA4_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3455 mask |= 1U << ((mmDMA4_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3457 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3461 mask = 1U << ((mmDMA4_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3462 mask |= 1U << ((mmDMA4_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3463 mask |= 1U << ((mmDMA4_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3464 mask |= 1U << ((mmDMA4_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3465 mask |= 1U << ((mmDMA4_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3466 mask |= 1U << ((mmDMA4_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3467 mask |= 1U << ((mmDMA4_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3468 mask |= 1U << ((mmDMA4_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3469 mask |= 1U << ((mmDMA4_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3470 mask |= 1U << ((mmDMA4_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3471 mask |= 1U << ((mmDMA4_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3472 mask |= 1U << ((mmDMA4_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3473 mask |= 1U << ((mmDMA4_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3474 mask |= 1U << ((mmDMA4_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3475 mask |= 1U << ((mmDMA4_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3477 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3482 mask = 1U << ((mmDMA4_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3484 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3488 mask = 1U << ((mmDMA5_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3489 mask |= 1U << ((mmDMA5_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3490 mask |= 1U << ((mmDMA5_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3491 mask |= 1U << ((mmDMA5_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3492 mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3493 mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3494 mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3495 mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3496 mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3497 mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3498 mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3499 mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3500 mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3501 mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3502 mask |= 1U << ((mmDMA5_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3503 mask |= 1U << ((mmDMA5_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3504 mask |= 1U << ((mmDMA5_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3505 mask |= 1U << ((mmDMA5_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3506 mask |= 1U << ((mmDMA5_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3507 mask |= 1U << ((mmDMA5_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3508 mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3509 mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3510 mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3511 mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3512 mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3513 mask |= 1U << ((mmDMA5_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3514 mask |= 1U << ((mmDMA5_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3515 mask |= 1U << ((mmDMA5_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3516 mask |= 1U << ((mmDMA5_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3518 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3522 mask = 1U << ((mmDMA5_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3523 mask |= 1U << ((mmDMA5_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3524 mask |= 1U << ((mmDMA5_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3525 mask |= 1U << ((mmDMA5_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3526 mask |= 1U << ((mmDMA5_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3527 mask |= 1U << ((mmDMA5_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3528 mask |= 1U << ((mmDMA5_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3529 mask |= 1U << ((mmDMA5_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3530 mask |= 1U << ((mmDMA5_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3531 mask |= 1U << ((mmDMA5_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3532 mask |= 1U << ((mmDMA5_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3533 mask |= 1U << ((mmDMA5_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3534 mask |= 1U << ((mmDMA5_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3535 mask |= 1U << ((mmDMA5_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3536 mask |= 1U << ((mmDMA5_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3537 mask |= 1U << ((mmDMA5_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3538 mask |= 1U << ((mmDMA5_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3539 mask |= 1U << ((mmDMA5_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3540 mask |= 1U << ((mmDMA5_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3541 mask |= 1U << ((mmDMA5_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3542 mask |= 1U << ((mmDMA5_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3543 mask |= 1U << ((mmDMA5_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3544 mask |= 1U << ((mmDMA5_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3545 mask |= 1U << ((mmDMA5_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3546 mask |= 1U << ((mmDMA5_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3547 mask |= 1U << ((mmDMA5_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3548 mask |= 1U << ((mmDMA5_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3549 mask |= 1U << ((mmDMA5_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3550 mask |= 1U << ((mmDMA5_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3551 mask |= 1U << ((mmDMA5_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3552 mask |= 1U << ((mmDMA5_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3553 mask |= 1U << ((mmDMA5_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3555 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3559 mask = 1U << ((mmDMA5_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3560 mask |= 1U << ((mmDMA5_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3561 mask |= 1U << ((mmDMA5_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3562 mask |= 1U << ((mmDMA5_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3563 mask |= 1U << ((mmDMA5_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3564 mask |= 1U << ((mmDMA5_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3565 mask |= 1U << ((mmDMA5_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3566 mask |= 1U << ((mmDMA5_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3567 mask |= 1U << ((mmDMA5_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3568 mask |= 1U << ((mmDMA5_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3569 mask |= 1U << ((mmDMA5_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3570 mask |= 1U << ((mmDMA5_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3571 mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3572 mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3573 mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3575 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3579 mask = 1U << ((mmDMA5_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3580 mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3581 mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3582 mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3583 mask |= 1U << ((mmDMA5_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3584 mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3585 mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3586 mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3587 mask |= 1U << ((mmDMA5_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3588 mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3589 mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3590 mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3591 mask |= 1U << ((mmDMA5_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3592 mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3593 mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3594 mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3595 mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3596 mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3597 mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3598 mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3599 mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3600 mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3601 mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3602 mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3603 mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3604 mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3605 mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3606 mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3608 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3612 mask = 1U << ((mmDMA5_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3613 mask |= 1U << ((mmDMA5_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3614 mask |= 1U << ((mmDMA5_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3615 mask |= 1U << ((mmDMA5_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3616 mask |= 1U << ((mmDMA5_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3617 mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3618 mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3619 mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3620 mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3621 mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3622 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3623 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3624 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3625 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3626 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3627 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3628 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3629 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3630 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3631 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3632 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3633 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3634 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3635 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3636 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3637 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3638 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3639 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3640 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3641 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3642 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3643 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3645 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3650 mask = 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3651 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3652 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3653 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3654 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3655 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3656 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3657 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3658 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3659 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3660 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3661 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3662 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3663 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3664 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3665 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3666 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3667 mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3668 mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3669 mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3670 mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3671 mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3672 mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3673 mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3674 mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3675 mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3676 mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3677 mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3678 mask |= 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3679 mask |= 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3680 mask |= 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3682 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3689 mask = 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3690 mask |= 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3692 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3696 mask = 1U << ((mmDMA5_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3697 mask |= 1U << ((mmDMA5_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3698 mask |= 1U << ((mmDMA5_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3699 mask |= 1U << ((mmDMA5_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3700 mask |= 1U << ((mmDMA5_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3701 mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3702 mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3703 mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3704 mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3705 mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3706 mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3707 mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3708 mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3709 mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3710 mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3711 mask |= 1U << ((mmDMA5_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3712 mask |= 1U << ((mmDMA5_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3713 mask |= 1U << ((mmDMA5_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3715 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3719 mask = 1U << ((mmDMA5_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3720 mask |= 1U << ((mmDMA5_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3721 mask |= 1U << ((mmDMA5_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3722 mask |= 1U << ((mmDMA5_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3724 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3728 mask = 1U << ((mmDMA5_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3729 mask |= 1U << ((mmDMA5_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3730 mask |= 1U << ((mmDMA5_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3731 mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3732 mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3733 mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3734 mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3735 mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3736 mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3737 mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3738 mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3739 mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3740 mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3742 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3746 mask = 1U << ((mmDMA5_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3747 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3748 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3749 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3750 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3751 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3752 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3753 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3754 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3755 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3756 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3757 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3758 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3759 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3760 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3761 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3762 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3763 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3764 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3765 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3766 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3767 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3768 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3769 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3770 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3772 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3777 mask = 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3778 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3779 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3780 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3781 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3782 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3783 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3784 mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3786 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3793 mask = 1U << ((mmDMA5_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3794 mask |= 1U << ((mmDMA5_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3795 mask |= 1U << ((mmDMA5_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3796 mask |= 1U << ((mmDMA5_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3797 mask |= 1U << ((mmDMA5_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3799 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3803 mask = 1U << ((mmDMA5_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3804 mask |= 1U << ((mmDMA5_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3805 mask |= 1U << ((mmDMA5_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3806 mask |= 1U << ((mmDMA5_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3807 mask |= 1U << ((mmDMA5_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3808 mask |= 1U << ((mmDMA5_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3809 mask |= 1U << ((mmDMA5_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3810 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3811 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3812 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3813 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3814 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3815 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3816 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3817 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3818 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3819 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3820 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3821 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3822 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3823 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3824 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3825 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3826 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3827 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3828 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3829 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3831 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3836 mask = 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3837 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3838 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3839 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3840 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3841 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3842 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3843 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3844 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3845 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3846 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3847 mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3848 mask |= 1U << ((mmDMA5_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3849 mask |= 1U << ((mmDMA5_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3850 mask |= 1U << ((mmDMA5_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3852 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3856 mask = 1U << ((mmDMA5_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3857 mask |= 1U << ((mmDMA5_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3858 mask |= 1U << ((mmDMA5_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3859 mask |= 1U << ((mmDMA5_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3860 mask |= 1U << ((mmDMA5_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3861 mask |= 1U << ((mmDMA5_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3862 mask |= 1U << ((mmDMA5_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3863 mask |= 1U << ((mmDMA5_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3864 mask |= 1U << ((mmDMA5_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3865 mask |= 1U << ((mmDMA5_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3866 mask |= 1U << ((mmDMA5_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3867 mask |= 1U << ((mmDMA5_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3868 mask |= 1U << ((mmDMA5_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3869 mask |= 1U << ((mmDMA5_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3870 mask |= 1U << ((mmDMA5_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3872 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3877 mask = 1U << ((mmDMA5_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3879 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3883 mask = 1U << ((mmDMA6_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3884 mask |= 1U << ((mmDMA6_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3885 mask |= 1U << ((mmDMA6_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3886 mask |= 1U << ((mmDMA6_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3887 mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3888 mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3889 mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3890 mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3891 mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3892 mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3893 mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3894 mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3895 mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3896 mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3897 mask |= 1U << ((mmDMA6_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3898 mask |= 1U << ((mmDMA6_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3899 mask |= 1U << ((mmDMA6_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3900 mask |= 1U << ((mmDMA6_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3901 mask |= 1U << ((mmDMA6_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3902 mask |= 1U << ((mmDMA6_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3903 mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3904 mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3905 mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3906 mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3907 mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3908 mask |= 1U << ((mmDMA6_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3909 mask |= 1U << ((mmDMA6_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3910 mask |= 1U << ((mmDMA6_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3911 mask |= 1U << ((mmDMA6_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3913 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3917 mask = 1U << ((mmDMA6_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3918 mask |= 1U << ((mmDMA6_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3919 mask |= 1U << ((mmDMA6_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3920 mask |= 1U << ((mmDMA6_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3921 mask |= 1U << ((mmDMA6_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3922 mask |= 1U << ((mmDMA6_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3923 mask |= 1U << ((mmDMA6_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3924 mask |= 1U << ((mmDMA6_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3925 mask |= 1U << ((mmDMA6_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3926 mask |= 1U << ((mmDMA6_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3927 mask |= 1U << ((mmDMA6_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3928 mask |= 1U << ((mmDMA6_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3929 mask |= 1U << ((mmDMA6_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3930 mask |= 1U << ((mmDMA6_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3931 mask |= 1U << ((mmDMA6_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3932 mask |= 1U << ((mmDMA6_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3933 mask |= 1U << ((mmDMA6_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3934 mask |= 1U << ((mmDMA6_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3935 mask |= 1U << ((mmDMA6_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3936 mask |= 1U << ((mmDMA6_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3937 mask |= 1U << ((mmDMA6_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3938 mask |= 1U << ((mmDMA6_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3939 mask |= 1U << ((mmDMA6_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3940 mask |= 1U << ((mmDMA6_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3941 mask |= 1U << ((mmDMA6_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3942 mask |= 1U << ((mmDMA6_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3943 mask |= 1U << ((mmDMA6_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3944 mask |= 1U << ((mmDMA6_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3945 mask |= 1U << ((mmDMA6_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3946 mask |= 1U << ((mmDMA6_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3947 mask |= 1U << ((mmDMA6_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3948 mask |= 1U << ((mmDMA6_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3950 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3954 mask = 1U << ((mmDMA6_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3955 mask |= 1U << ((mmDMA6_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3956 mask |= 1U << ((mmDMA6_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3957 mask |= 1U << ((mmDMA6_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3958 mask |= 1U << ((mmDMA6_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3959 mask |= 1U << ((mmDMA6_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3960 mask |= 1U << ((mmDMA6_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3961 mask |= 1U << ((mmDMA6_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3962 mask |= 1U << ((mmDMA6_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3963 mask |= 1U << ((mmDMA6_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3964 mask |= 1U << ((mmDMA6_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3965 mask |= 1U << ((mmDMA6_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3966 mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3967 mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3968 mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3970 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
3974 mask = 1U << ((mmDMA6_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3975 mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3976 mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3977 mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3978 mask |= 1U << ((mmDMA6_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3979 mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3980 mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3981 mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3982 mask |= 1U << ((mmDMA6_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3983 mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3984 mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3985 mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3986 mask |= 1U << ((mmDMA6_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3987 mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3988 mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3989 mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3990 mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3991 mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3992 mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3993 mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3994 mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3995 mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3996 mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3997 mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3998 mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
3999 mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4000 mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4001 mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4003 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4007 mask = 1U << ((mmDMA6_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4008 mask |= 1U << ((mmDMA6_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4009 mask |= 1U << ((mmDMA6_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4010 mask |= 1U << ((mmDMA6_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4011 mask |= 1U << ((mmDMA6_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4012 mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4013 mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4014 mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4015 mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4016 mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4017 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4018 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4019 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4020 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4021 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4022 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4023 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4024 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4025 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4026 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4027 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4028 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4029 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4030 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4031 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4032 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4033 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4034 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4035 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4036 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4037 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4038 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4040 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4045 mask = 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4046 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4047 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4048 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4049 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4050 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4051 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4052 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4053 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4054 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4055 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4056 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4057 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4058 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4059 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4060 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4061 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4062 mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4063 mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4064 mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4065 mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4066 mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4067 mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4068 mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4069 mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4070 mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4071 mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4072 mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4073 mask |= 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4074 mask |= 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4075 mask |= 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4077 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4084 mask = 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4085 mask |= 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4087 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4091 mask = 1U << ((mmDMA6_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4092 mask |= 1U << ((mmDMA6_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4093 mask |= 1U << ((mmDMA6_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4094 mask |= 1U << ((mmDMA6_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4095 mask |= 1U << ((mmDMA6_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4096 mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4097 mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4098 mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4099 mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4100 mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4101 mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4102 mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4103 mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4104 mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4105 mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4106 mask |= 1U << ((mmDMA6_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4107 mask |= 1U << ((mmDMA6_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4108 mask |= 1U << ((mmDMA6_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4110 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4114 mask = 1U << ((mmDMA6_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4115 mask |= 1U << ((mmDMA6_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4116 mask |= 1U << ((mmDMA6_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4117 mask |= 1U << ((mmDMA6_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4119 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4123 mask = 1U << ((mmDMA6_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4124 mask |= 1U << ((mmDMA6_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4125 mask |= 1U << ((mmDMA6_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4126 mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4127 mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4128 mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4129 mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4130 mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4131 mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4132 mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4133 mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4134 mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4135 mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4137 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4141 mask = 1U << ((mmDMA6_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4142 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4143 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4144 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4145 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4146 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4147 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4148 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4149 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4150 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4151 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4152 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4153 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4154 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4155 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4156 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4157 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4158 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4159 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4160 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4161 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4162 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4163 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4164 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4165 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4167 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4172 mask = 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4173 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4174 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4175 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4176 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4177 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4178 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4179 mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4181 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4189 mask = 1U << ((mmDMA6_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4190 mask |= 1U << ((mmDMA6_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4191 mask |= 1U << ((mmDMA6_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4192 mask |= 1U << ((mmDMA6_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4193 mask |= 1U << ((mmDMA6_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4195 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4199 mask = 1U << ((mmDMA6_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4200 mask |= 1U << ((mmDMA6_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4201 mask |= 1U << ((mmDMA6_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4202 mask |= 1U << ((mmDMA6_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4203 mask |= 1U << ((mmDMA6_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4204 mask |= 1U << ((mmDMA6_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4205 mask |= 1U << ((mmDMA6_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4206 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4207 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4208 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4209 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4210 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4211 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4212 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4213 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4214 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4215 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4216 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4217 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4218 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4219 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4220 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4221 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4222 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4223 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4224 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4225 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4227 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4232 mask = 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4233 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4234 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4235 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4236 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4237 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4238 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4239 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4240 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4241 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4242 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4243 mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4244 mask |= 1U << ((mmDMA6_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4245 mask |= 1U << ((mmDMA6_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4246 mask |= 1U << ((mmDMA6_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4248 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4252 mask = 1U << ((mmDMA6_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4253 mask |= 1U << ((mmDMA6_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4254 mask |= 1U << ((mmDMA6_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4255 mask |= 1U << ((mmDMA6_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4256 mask |= 1U << ((mmDMA6_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4257 mask |= 1U << ((mmDMA6_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4258 mask |= 1U << ((mmDMA6_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4259 mask |= 1U << ((mmDMA6_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4260 mask |= 1U << ((mmDMA6_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4261 mask |= 1U << ((mmDMA6_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4262 mask |= 1U << ((mmDMA6_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4263 mask |= 1U << ((mmDMA6_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4264 mask |= 1U << ((mmDMA6_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4265 mask |= 1U << ((mmDMA6_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4266 mask |= 1U << ((mmDMA6_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4268 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4273 mask = 1U << ((mmDMA6_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4275 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4279 mask = 1U << ((mmDMA7_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4280 mask |= 1U << ((mmDMA7_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4281 mask |= 1U << ((mmDMA7_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4282 mask |= 1U << ((mmDMA7_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4283 mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4284 mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4285 mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4286 mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4287 mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4288 mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4289 mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4290 mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4291 mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4292 mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4293 mask |= 1U << ((mmDMA7_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4294 mask |= 1U << ((mmDMA7_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4295 mask |= 1U << ((mmDMA7_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4296 mask |= 1U << ((mmDMA7_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4297 mask |= 1U << ((mmDMA7_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4298 mask |= 1U << ((mmDMA7_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4299 mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4300 mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4301 mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4302 mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4303 mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4304 mask |= 1U << ((mmDMA7_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4305 mask |= 1U << ((mmDMA7_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4306 mask |= 1U << ((mmDMA7_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4307 mask |= 1U << ((mmDMA7_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4309 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4313 mask = 1U << ((mmDMA7_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4314 mask |= 1U << ((mmDMA7_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4315 mask |= 1U << ((mmDMA7_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4316 mask |= 1U << ((mmDMA7_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4317 mask |= 1U << ((mmDMA7_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4318 mask |= 1U << ((mmDMA7_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4319 mask |= 1U << ((mmDMA7_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4320 mask |= 1U << ((mmDMA7_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4321 mask |= 1U << ((mmDMA7_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4322 mask |= 1U << ((mmDMA7_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4323 mask |= 1U << ((mmDMA7_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4324 mask |= 1U << ((mmDMA7_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4325 mask |= 1U << ((mmDMA7_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4326 mask |= 1U << ((mmDMA7_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4327 mask |= 1U << ((mmDMA7_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4328 mask |= 1U << ((mmDMA7_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4329 mask |= 1U << ((mmDMA7_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4330 mask |= 1U << ((mmDMA7_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4331 mask |= 1U << ((mmDMA7_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4332 mask |= 1U << ((mmDMA7_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4333 mask |= 1U << ((mmDMA7_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4334 mask |= 1U << ((mmDMA7_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4335 mask |= 1U << ((mmDMA7_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4336 mask |= 1U << ((mmDMA7_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4337 mask |= 1U << ((mmDMA7_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4338 mask |= 1U << ((mmDMA7_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4339 mask |= 1U << ((mmDMA7_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4340 mask |= 1U << ((mmDMA7_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4341 mask |= 1U << ((mmDMA7_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4342 mask |= 1U << ((mmDMA7_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4343 mask |= 1U << ((mmDMA7_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4344 mask |= 1U << ((mmDMA7_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4346 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4350 mask = 1U << ((mmDMA7_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4351 mask |= 1U << ((mmDMA7_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4352 mask |= 1U << ((mmDMA7_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4353 mask |= 1U << ((mmDMA7_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4354 mask |= 1U << ((mmDMA7_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4355 mask |= 1U << ((mmDMA7_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4356 mask |= 1U << ((mmDMA7_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4357 mask |= 1U << ((mmDMA7_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4358 mask |= 1U << ((mmDMA7_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4359 mask |= 1U << ((mmDMA7_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4360 mask |= 1U << ((mmDMA7_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4361 mask |= 1U << ((mmDMA7_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4362 mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4363 mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4364 mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4366 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4370 mask = 1U << ((mmDMA7_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4371 mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4372 mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4373 mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4374 mask |= 1U << ((mmDMA7_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4375 mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4376 mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4377 mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4378 mask |= 1U << ((mmDMA7_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4379 mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4380 mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4381 mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4382 mask |= 1U << ((mmDMA7_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4383 mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4384 mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4385 mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4386 mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4387 mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4388 mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4389 mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4390 mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4391 mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4392 mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4393 mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4394 mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4395 mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4396 mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4397 mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4399 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4403 mask = 1U << ((mmDMA7_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4404 mask |= 1U << ((mmDMA7_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4405 mask |= 1U << ((mmDMA7_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4406 mask |= 1U << ((mmDMA7_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4407 mask |= 1U << ((mmDMA7_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4408 mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4409 mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4410 mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4411 mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4412 mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4413 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4414 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4415 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4416 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4417 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4418 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4419 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4420 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4421 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4422 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4423 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4424 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4425 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4426 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4427 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4428 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4429 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4430 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4431 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4432 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4433 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4434 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4436 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4441 mask = 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4442 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4443 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4444 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4445 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4446 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4447 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4448 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4449 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4450 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4451 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4452 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4453 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4454 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4455 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4456 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4457 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4458 mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4459 mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4460 mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4461 mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4462 mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4463 mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4464 mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4465 mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4466 mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4467 mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4468 mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4469 mask |= 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4470 mask |= 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4471 mask |= 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4473 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4480 mask = 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4481 mask |= 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4483 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4487 mask = 1U << ((mmDMA7_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4488 mask |= 1U << ((mmDMA7_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4489 mask |= 1U << ((mmDMA7_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4490 mask |= 1U << ((mmDMA7_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4491 mask |= 1U << ((mmDMA7_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4492 mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4493 mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4494 mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4495 mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4496 mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4497 mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4498 mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4499 mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4500 mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4501 mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4502 mask |= 1U << ((mmDMA7_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4503 mask |= 1U << ((mmDMA7_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4504 mask |= 1U << ((mmDMA7_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4506 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4510 mask = 1U << ((mmDMA7_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4511 mask |= 1U << ((mmDMA7_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4512 mask |= 1U << ((mmDMA7_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4513 mask |= 1U << ((mmDMA7_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4515 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4519 mask = 1U << ((mmDMA7_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4520 mask |= 1U << ((mmDMA7_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4521 mask |= 1U << ((mmDMA7_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4522 mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4523 mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4524 mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4525 mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4526 mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4527 mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4528 mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4529 mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4530 mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4531 mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4533 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4537 mask = 1U << ((mmDMA7_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4538 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4539 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4540 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4541 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4542 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4543 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4544 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4545 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4546 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4547 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4548 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4549 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4550 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4551 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4552 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4553 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4554 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4555 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4556 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4557 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4558 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4559 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4560 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4561 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4563 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4568 mask = 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4569 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4570 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4571 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4572 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4573 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4574 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4575 mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4577 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4584 mask = 1U << ((mmDMA7_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4585 mask |= 1U << ((mmDMA7_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4586 mask |= 1U << ((mmDMA7_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4587 mask |= 1U << ((mmDMA7_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4588 mask |= 1U << ((mmDMA7_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4590 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4594 mask = 1U << ((mmDMA7_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4595 mask |= 1U << ((mmDMA7_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4596 mask |= 1U << ((mmDMA7_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4597 mask |= 1U << ((mmDMA7_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4598 mask |= 1U << ((mmDMA7_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4599 mask |= 1U << ((mmDMA7_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4600 mask |= 1U << ((mmDMA7_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4601 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4602 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4603 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4604 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4605 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4606 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4607 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4608 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4609 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4610 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4611 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4612 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4613 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4614 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4615 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4616 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4617 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4618 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4619 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4620 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4622 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4627 mask = 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4628 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4629 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4630 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4631 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4632 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4633 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4634 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4635 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4636 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4637 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4638 mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4639 mask |= 1U << ((mmDMA7_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4640 mask |= 1U << ((mmDMA7_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4641 mask |= 1U << ((mmDMA7_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4643 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4647 mask = 1U << ((mmDMA7_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4648 mask |= 1U << ((mmDMA7_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4649 mask |= 1U << ((mmDMA7_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4650 mask |= 1U << ((mmDMA7_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4651 mask |= 1U << ((mmDMA7_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4652 mask |= 1U << ((mmDMA7_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4653 mask |= 1U << ((mmDMA7_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4654 mask |= 1U << ((mmDMA7_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4655 mask |= 1U << ((mmDMA7_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4656 mask |= 1U << ((mmDMA7_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4657 mask |= 1U << ((mmDMA7_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4658 mask |= 1U << ((mmDMA7_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4659 mask |= 1U << ((mmDMA7_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4660 mask |= 1U << ((mmDMA7_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4661 mask |= 1U << ((mmDMA7_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4663 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4668 mask = 1U << ((mmDMA7_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4670 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4674 mask = 1U << ((mmDMA0_CORE_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4675 mask |= 1U << ((mmDMA0_CORE_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4676 mask |= 1U << ((mmDMA0_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4678 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4682 mask = 1U << ((mmDMA0_CORE_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4683 mask |= 1U << ((mmDMA0_CORE_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4684 mask |= 1U << ((mmDMA0_CORE_NON_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4686 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4691 mask = 1U << ((mmDMA0_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4692 mask |= 1U << ((mmDMA0_CORE_RD_MAX_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4693 mask |= 1U << ((mmDMA0_CORE_RD_ARCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4694 mask |= 1U << ((mmDMA0_CORE_RD_ARUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4695 mask |= 1U << ((mmDMA0_CORE_RD_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4696 mask |= 1U << ((mmDMA0_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4697 mask |= 1U << ((mmDMA0_CORE_WR_MAX_AWID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4698 mask |= 1U << ((mmDMA0_CORE_WR_AWCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4699 mask |= 1U << ((mmDMA0_CORE_WR_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4700 mask |= 1U << ((mmDMA0_CORE_WR_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4701 mask |= 1U << ((mmDMA0_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4702 mask |= 1U << ((mmDMA0_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4703 mask |= 1U << ((mmDMA0_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4704 mask |= 1U << ((mmDMA0_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4705 mask |= 1U << ((mmDMA0_CORE_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4706 mask |= 1U << ((mmDMA0_CORE_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4707 mask |= 1U << ((mmDMA0_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4708 mask |= 1U << ((mmDMA0_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4709 mask |= 1U << ((mmDMA0_CORE_ERRMSG_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4711 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4715 mask = 1U << ((mmDMA0_CORE_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4716 mask |= 1U << ((mmDMA0_CORE_STS1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4718 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4722 mask = 1U << ((mmDMA0_CORE_RD_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4723 mask |= 1U << ((mmDMA0_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4724 mask |= 1U << ((mmDMA0_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4725 mask |= 1U << ((mmDMA0_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4726 mask |= 1U << ((mmDMA0_CORE_RD_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4727 mask |= 1U << ((mmDMA0_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4728 mask |= 1U << ((mmDMA0_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4729 mask |= 1U << ((mmDMA0_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4730 mask |= 1U << ((mmDMA0_CORE_DBG_DESC_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4731 mask |= 1U << ((mmDMA0_CORE_DBG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4732 mask |= 1U << ((mmDMA0_CORE_DBG_RD_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4733 mask |= 1U << ((mmDMA0_CORE_DBG_WR_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4735 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4739 mask = 1U << ((mmDMA1_CORE_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4740 mask |= 1U << ((mmDMA1_CORE_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4741 mask |= 1U << ((mmDMA1_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4743 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4747 mask = 1U << ((mmDMA1_CORE_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4748 mask |= 1U << ((mmDMA1_CORE_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4749 mask |= 1U << ((mmDMA1_CORE_NON_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4751 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4756 mask = 1U << ((mmDMA1_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4757 mask |= 1U << ((mmDMA1_CORE_RD_MAX_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4758 mask |= 1U << ((mmDMA1_CORE_RD_ARCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4759 mask |= 1U << ((mmDMA1_CORE_RD_ARUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4760 mask |= 1U << ((mmDMA1_CORE_RD_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4761 mask |= 1U << ((mmDMA1_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4762 mask |= 1U << ((mmDMA1_CORE_WR_MAX_AWID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4763 mask |= 1U << ((mmDMA1_CORE_WR_AWCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4764 mask |= 1U << ((mmDMA1_CORE_WR_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4765 mask |= 1U << ((mmDMA1_CORE_WR_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4766 mask |= 1U << ((mmDMA1_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4767 mask |= 1U << ((mmDMA1_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4768 mask |= 1U << ((mmDMA1_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4769 mask |= 1U << ((mmDMA1_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4770 mask |= 1U << ((mmDMA1_CORE_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4771 mask |= 1U << ((mmDMA1_CORE_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4772 mask |= 1U << ((mmDMA1_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4773 mask |= 1U << ((mmDMA1_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4774 mask |= 1U << ((mmDMA1_CORE_ERRMSG_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4776 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4780 mask = 1U << ((mmDMA1_CORE_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4781 mask |= 1U << ((mmDMA1_CORE_STS1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4783 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4787 mask = 1U << ((mmDMA1_CORE_RD_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4788 mask |= 1U << ((mmDMA1_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4789 mask |= 1U << ((mmDMA1_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4790 mask |= 1U << ((mmDMA1_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4791 mask |= 1U << ((mmDMA1_CORE_RD_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4792 mask |= 1U << ((mmDMA1_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4793 mask |= 1U << ((mmDMA1_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4794 mask |= 1U << ((mmDMA1_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4795 mask |= 1U << ((mmDMA1_CORE_DBG_DESC_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4796 mask |= 1U << ((mmDMA1_CORE_DBG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4797 mask |= 1U << ((mmDMA1_CORE_DBG_RD_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4798 mask |= 1U << ((mmDMA1_CORE_DBG_WR_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4800 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4804 mask = 1U << ((mmDMA2_CORE_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4805 mask |= 1U << ((mmDMA2_CORE_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4806 mask |= 1U << ((mmDMA2_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4808 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4812 mask = 1U << ((mmDMA2_CORE_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4813 mask |= 1U << ((mmDMA2_CORE_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4814 mask |= 1U << ((mmDMA2_CORE_NON_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4816 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4821 mask = 1U << ((mmDMA2_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4822 mask |= 1U << ((mmDMA2_CORE_RD_MAX_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4823 mask |= 1U << ((mmDMA2_CORE_RD_ARCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4824 mask |= 1U << ((mmDMA2_CORE_RD_ARUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4825 mask |= 1U << ((mmDMA2_CORE_RD_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4826 mask |= 1U << ((mmDMA2_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4827 mask |= 1U << ((mmDMA2_CORE_WR_MAX_AWID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4828 mask |= 1U << ((mmDMA2_CORE_WR_AWCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4829 mask |= 1U << ((mmDMA2_CORE_WR_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4830 mask |= 1U << ((mmDMA2_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4831 mask |= 1U << ((mmDMA2_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4832 mask |= 1U << ((mmDMA2_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4833 mask |= 1U << ((mmDMA2_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4834 mask |= 1U << ((mmDMA2_CORE_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4835 mask |= 1U << ((mmDMA2_CORE_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4836 mask |= 1U << ((mmDMA2_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4837 mask |= 1U << ((mmDMA2_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4838 mask |= 1U << ((mmDMA2_CORE_ERRMSG_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4840 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4844 mask = 1U << ((mmDMA2_CORE_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4845 mask |= 1U << ((mmDMA2_CORE_STS1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4847 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4851 mask = 1U << ((mmDMA2_CORE_RD_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4852 mask |= 1U << ((mmDMA2_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4853 mask |= 1U << ((mmDMA2_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4854 mask |= 1U << ((mmDMA2_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4855 mask |= 1U << ((mmDMA2_CORE_RD_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4856 mask |= 1U << ((mmDMA2_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4857 mask |= 1U << ((mmDMA2_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4858 mask |= 1U << ((mmDMA2_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4859 mask |= 1U << ((mmDMA2_CORE_DBG_DESC_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4860 mask |= 1U << ((mmDMA2_CORE_DBG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4861 mask |= 1U << ((mmDMA2_CORE_DBG_RD_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4862 mask |= 1U << ((mmDMA2_CORE_DBG_WR_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4864 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4868 mask = 1U << ((mmDMA3_CORE_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4869 mask |= 1U << ((mmDMA3_CORE_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4870 mask |= 1U << ((mmDMA3_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4872 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4876 mask = 1U << ((mmDMA3_CORE_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4877 mask |= 1U << ((mmDMA3_CORE_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4878 mask |= 1U << ((mmDMA3_CORE_NON_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4880 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4885 mask = 1U << ((mmDMA3_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4886 mask |= 1U << ((mmDMA3_CORE_RD_MAX_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4887 mask |= 1U << ((mmDMA3_CORE_RD_ARCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4888 mask |= 1U << ((mmDMA3_CORE_RD_ARUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4889 mask |= 1U << ((mmDMA3_CORE_RD_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4890 mask |= 1U << ((mmDMA3_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4891 mask |= 1U << ((mmDMA3_CORE_WR_MAX_AWID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4892 mask |= 1U << ((mmDMA3_CORE_WR_AWCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4893 mask |= 1U << ((mmDMA3_CORE_WR_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4894 mask |= 1U << ((mmDMA3_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4895 mask |= 1U << ((mmDMA3_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4896 mask |= 1U << ((mmDMA3_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4897 mask |= 1U << ((mmDMA3_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4898 mask |= 1U << ((mmDMA3_CORE_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4899 mask |= 1U << ((mmDMA3_CORE_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4900 mask |= 1U << ((mmDMA3_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4901 mask |= 1U << ((mmDMA3_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4902 mask |= 1U << ((mmDMA3_CORE_ERRMSG_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4904 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4908 mask = 1U << ((mmDMA3_CORE_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4909 mask |= 1U << ((mmDMA3_CORE_STS1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4911 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4915 mask = 1U << ((mmDMA3_CORE_RD_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4916 mask |= 1U << ((mmDMA3_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4917 mask |= 1U << ((mmDMA3_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4918 mask |= 1U << ((mmDMA3_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4919 mask |= 1U << ((mmDMA3_CORE_RD_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4920 mask |= 1U << ((mmDMA3_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4921 mask |= 1U << ((mmDMA3_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4922 mask |= 1U << ((mmDMA3_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4923 mask |= 1U << ((mmDMA3_CORE_DBG_DESC_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4924 mask |= 1U << ((mmDMA3_CORE_DBG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4925 mask |= 1U << ((mmDMA3_CORE_DBG_RD_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4926 mask |= 1U << ((mmDMA3_CORE_DBG_WR_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4928 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4932 mask = 1U << ((mmDMA4_CORE_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4933 mask |= 1U << ((mmDMA4_CORE_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4934 mask |= 1U << ((mmDMA4_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4936 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4940 mask = 1U << ((mmDMA4_CORE_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4941 mask |= 1U << ((mmDMA4_CORE_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4942 mask |= 1U << ((mmDMA4_CORE_NON_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4944 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4949 mask = 1U << ((mmDMA4_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4950 mask |= 1U << ((mmDMA4_CORE_RD_MAX_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4951 mask |= 1U << ((mmDMA4_CORE_RD_ARCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4952 mask |= 1U << ((mmDMA4_CORE_RD_ARUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4953 mask |= 1U << ((mmDMA4_CORE_RD_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4954 mask |= 1U << ((mmDMA4_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4955 mask |= 1U << ((mmDMA4_CORE_WR_MAX_AWID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4956 mask |= 1U << ((mmDMA4_CORE_WR_AWCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4957 mask |= 1U << ((mmDMA4_CORE_WR_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4958 mask |= 1U << ((mmDMA4_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4959 mask |= 1U << ((mmDMA4_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4960 mask |= 1U << ((mmDMA4_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4961 mask |= 1U << ((mmDMA4_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4962 mask |= 1U << ((mmDMA4_CORE_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4963 mask |= 1U << ((mmDMA4_CORE_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4964 mask |= 1U << ((mmDMA4_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4965 mask |= 1U << ((mmDMA4_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4966 mask |= 1U << ((mmDMA4_CORE_ERRMSG_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4968 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4972 mask = 1U << ((mmDMA4_CORE_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4973 mask |= 1U << ((mmDMA4_CORE_STS1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4975 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4979 mask = 1U << ((mmDMA4_CORE_RD_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4980 mask |= 1U << ((mmDMA4_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4981 mask |= 1U << ((mmDMA4_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4982 mask |= 1U << ((mmDMA4_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4983 mask |= 1U << ((mmDMA4_CORE_RD_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4984 mask |= 1U << ((mmDMA4_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4985 mask |= 1U << ((mmDMA4_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4986 mask |= 1U << ((mmDMA4_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4987 mask |= 1U << ((mmDMA4_CORE_DBG_DESC_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4988 mask |= 1U << ((mmDMA4_CORE_DBG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4989 mask |= 1U << ((mmDMA4_CORE_DBG_RD_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4990 mask |= 1U << ((mmDMA4_CORE_DBG_WR_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4992 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
4996 mask = 1U << ((mmDMA5_CORE_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4997 mask |= 1U << ((mmDMA5_CORE_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
4998 mask |= 1U << ((mmDMA5_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5000 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5004 mask = 1U << ((mmDMA5_CORE_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5005 mask |= 1U << ((mmDMA5_CORE_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5006 mask |= 1U << ((mmDMA5_CORE_NON_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5008 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5013 mask = 1U << ((mmDMA5_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5014 mask |= 1U << ((mmDMA5_CORE_RD_MAX_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5015 mask |= 1U << ((mmDMA5_CORE_RD_ARCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5016 mask |= 1U << ((mmDMA5_CORE_RD_ARUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5017 mask |= 1U << ((mmDMA5_CORE_RD_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5018 mask |= 1U << ((mmDMA5_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5019 mask |= 1U << ((mmDMA5_CORE_WR_MAX_AWID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5020 mask |= 1U << ((mmDMA5_CORE_WR_AWCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5021 mask |= 1U << ((mmDMA5_CORE_WR_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5022 mask |= 1U << ((mmDMA5_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5023 mask |= 1U << ((mmDMA5_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5024 mask |= 1U << ((mmDMA5_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5025 mask |= 1U << ((mmDMA5_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5026 mask |= 1U << ((mmDMA5_CORE_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5027 mask |= 1U << ((mmDMA5_CORE_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5028 mask |= 1U << ((mmDMA5_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5029 mask |= 1U << ((mmDMA5_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5030 mask |= 1U << ((mmDMA5_CORE_ERRMSG_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5032 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5036 mask = 1U << ((mmDMA5_CORE_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5037 mask |= 1U << ((mmDMA5_CORE_STS1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5039 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5043 mask = 1U << ((mmDMA5_CORE_RD_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5044 mask |= 1U << ((mmDMA5_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5045 mask |= 1U << ((mmDMA5_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5046 mask |= 1U << ((mmDMA5_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5047 mask |= 1U << ((mmDMA5_CORE_RD_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5048 mask |= 1U << ((mmDMA5_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5049 mask |= 1U << ((mmDMA5_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5050 mask |= 1U << ((mmDMA5_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5051 mask |= 1U << ((mmDMA5_CORE_DBG_DESC_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5052 mask |= 1U << ((mmDMA5_CORE_DBG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5053 mask |= 1U << ((mmDMA5_CORE_DBG_RD_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5054 mask |= 1U << ((mmDMA5_CORE_DBG_WR_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5056 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5060 mask = 1U << ((mmDMA6_CORE_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5061 mask |= 1U << ((mmDMA6_CORE_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5062 mask |= 1U << ((mmDMA6_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5064 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5068 mask = 1U << ((mmDMA6_CORE_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5069 mask |= 1U << ((mmDMA6_CORE_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5070 mask |= 1U << ((mmDMA6_CORE_NON_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5072 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5077 mask = 1U << ((mmDMA6_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5078 mask |= 1U << ((mmDMA6_CORE_RD_MAX_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5079 mask |= 1U << ((mmDMA6_CORE_RD_ARCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5080 mask |= 1U << ((mmDMA6_CORE_RD_ARUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5081 mask |= 1U << ((mmDMA6_CORE_RD_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5082 mask |= 1U << ((mmDMA6_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5083 mask |= 1U << ((mmDMA6_CORE_WR_MAX_AWID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5084 mask |= 1U << ((mmDMA6_CORE_WR_AWCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5085 mask |= 1U << ((mmDMA6_CORE_WR_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5086 mask |= 1U << ((mmDMA6_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5087 mask |= 1U << ((mmDMA6_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5088 mask |= 1U << ((mmDMA6_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5089 mask |= 1U << ((mmDMA6_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5090 mask |= 1U << ((mmDMA6_CORE_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5091 mask |= 1U << ((mmDMA6_CORE_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5092 mask |= 1U << ((mmDMA6_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5093 mask |= 1U << ((mmDMA6_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5094 mask |= 1U << ((mmDMA6_CORE_ERRMSG_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5096 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5100 mask = 1U << ((mmDMA6_CORE_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5101 mask |= 1U << ((mmDMA6_CORE_STS1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5103 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5107 mask = 1U << ((mmDMA6_CORE_RD_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5108 mask |= 1U << ((mmDMA6_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5109 mask |= 1U << ((mmDMA6_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5110 mask |= 1U << ((mmDMA6_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5111 mask |= 1U << ((mmDMA6_CORE_RD_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5112 mask |= 1U << ((mmDMA6_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5113 mask |= 1U << ((mmDMA6_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5114 mask |= 1U << ((mmDMA6_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5115 mask |= 1U << ((mmDMA6_CORE_DBG_DESC_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5116 mask |= 1U << ((mmDMA6_CORE_DBG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5117 mask |= 1U << ((mmDMA6_CORE_DBG_RD_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5118 mask |= 1U << ((mmDMA6_CORE_DBG_WR_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5120 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5124 mask = 1U << ((mmDMA7_CORE_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5125 mask |= 1U << ((mmDMA7_CORE_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5126 mask |= 1U << ((mmDMA7_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5128 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5132 mask = 1U << ((mmDMA7_CORE_PROT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5133 mask |= 1U << ((mmDMA7_CORE_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5134 mask |= 1U << ((mmDMA7_CORE_NON_SECURE_PROPS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5136 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5141 mask = 1U << ((mmDMA7_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5142 mask |= 1U << ((mmDMA7_CORE_RD_MAX_SIZE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5143 mask |= 1U << ((mmDMA7_CORE_RD_ARCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5144 mask |= 1U << ((mmDMA7_CORE_RD_ARUSER_31_11 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5145 mask |= 1U << ((mmDMA7_CORE_RD_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5146 mask |= 1U << ((mmDMA7_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5147 mask |= 1U << ((mmDMA7_CORE_WR_MAX_AWID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5148 mask |= 1U << ((mmDMA7_CORE_WR_AWCACHE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5149 mask |= 1U << ((mmDMA7_CORE_WR_INFLIGHTS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5150 mask |= 1U << ((mmDMA7_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5151 mask |= 1U << ((mmDMA7_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5152 mask |= 1U << ((mmDMA7_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5153 mask |= 1U << ((mmDMA7_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5154 mask |= 1U << ((mmDMA7_CORE_ERR_CFG & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5155 mask |= 1U << ((mmDMA7_CORE_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5156 mask |= 1U << ((mmDMA7_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5157 mask |= 1U << ((mmDMA7_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5158 mask |= 1U << ((mmDMA7_CORE_ERRMSG_WDATA & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5160 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5164 mask = 1U << ((mmDMA7_CORE_STS0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5165 mask |= 1U << ((mmDMA7_CORE_STS1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5167 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5171 mask = 1U << ((mmDMA7_CORE_RD_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5172 mask |= 1U << ((mmDMA7_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5173 mask |= 1U << ((mmDMA7_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5174 mask |= 1U << ((mmDMA7_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5175 mask |= 1U << ((mmDMA7_CORE_RD_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5176 mask |= 1U << ((mmDMA7_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5177 mask |= 1U << ((mmDMA7_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5178 mask |= 1U << ((mmDMA7_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5179 mask |= 1U << ((mmDMA7_CORE_DBG_DESC_CNT & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5180 mask |= 1U << ((mmDMA7_CORE_DBG_STS & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5181 mask |= 1U << ((mmDMA7_CORE_DBG_RD_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5182 mask |= 1U << ((mmDMA7_CORE_DBG_WR_DESC_ID & 0x7F) >> 2); in gaudi_init_dma_protection_bits()
5184 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_dma_protection_bits()
5189 u32 pb_addr, mask; in gaudi_init_nic_protection_bits() local
5197 mask = 1U << ((mmNIC0_QM0_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5198 mask |= 1U << ((mmNIC0_QM0_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5199 mask |= 1U << ((mmNIC0_QM0_GLBL_PROT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5200 mask |= 1U << ((mmNIC0_QM0_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5201 mask |= 1U << ((mmNIC0_QM0_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5202 mask |= 1U << ((mmNIC0_QM0_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5203 mask |= 1U << ((mmNIC0_QM0_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5204 mask |= 1U << ((mmNIC0_QM0_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5205 mask |= 1U << ((mmNIC0_QM0_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5206 mask |= 1U << ((mmNIC0_QM0_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5207 mask |= 1U << ((mmNIC0_QM0_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5208 mask |= 1U << ((mmNIC0_QM0_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5209 mask |= 1U << ((mmNIC0_QM0_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5210 mask |= 1U << ((mmNIC0_QM0_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5211 mask |= 1U << ((mmNIC0_QM0_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5212 mask |= 1U << ((mmNIC0_QM0_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5213 mask |= 1U << ((mmNIC0_QM0_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5214 mask |= 1U << ((mmNIC0_QM0_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5215 mask |= 1U << ((mmNIC0_QM0_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5216 mask |= 1U << ((mmNIC0_QM0_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5217 mask |= 1U << ((mmNIC0_QM0_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5218 mask |= 1U << ((mmNIC0_QM0_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5219 mask |= 1U << ((mmNIC0_QM0_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5220 mask |= 1U << ((mmNIC0_QM0_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5221 mask |= 1U << ((mmNIC0_QM0_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5222 mask |= 1U << ((mmNIC0_QM0_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5223 mask |= 1U << ((mmNIC0_QM0_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5224 mask |= 1U << ((mmNIC0_QM0_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5225 mask |= 1U << ((mmNIC0_QM0_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5227 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5231 mask = 1U << ((mmNIC0_QM0_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5232 mask |= 1U << ((mmNIC0_QM0_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5233 mask |= 1U << ((mmNIC0_QM0_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5234 mask |= 1U << ((mmNIC0_QM0_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5235 mask |= 1U << ((mmNIC0_QM0_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5236 mask |= 1U << ((mmNIC0_QM0_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5237 mask |= 1U << ((mmNIC0_QM0_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5238 mask |= 1U << ((mmNIC0_QM0_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5239 mask |= 1U << ((mmNIC0_QM0_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5240 mask |= 1U << ((mmNIC0_QM0_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5241 mask |= 1U << ((mmNIC0_QM0_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5242 mask |= 1U << ((mmNIC0_QM0_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5243 mask |= 1U << ((mmNIC0_QM0_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5244 mask |= 1U << ((mmNIC0_QM0_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5245 mask |= 1U << ((mmNIC0_QM0_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5246 mask |= 1U << ((mmNIC0_QM0_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5247 mask |= 1U << ((mmNIC0_QM0_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5248 mask |= 1U << ((mmNIC0_QM0_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5249 mask |= 1U << ((mmNIC0_QM0_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5250 mask |= 1U << ((mmNIC0_QM0_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5251 mask |= 1U << ((mmNIC0_QM0_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5252 mask |= 1U << ((mmNIC0_QM0_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5253 mask |= 1U << ((mmNIC0_QM0_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5254 mask |= 1U << ((mmNIC0_QM0_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5255 mask |= 1U << ((mmNIC0_QM0_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5256 mask |= 1U << ((mmNIC0_QM0_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5257 mask |= 1U << ((mmNIC0_QM0_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5258 mask |= 1U << ((mmNIC0_QM0_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5259 mask |= 1U << ((mmNIC0_QM0_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5260 mask |= 1U << ((mmNIC0_QM0_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5261 mask |= 1U << ((mmNIC0_QM0_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5262 mask |= 1U << ((mmNIC0_QM0_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5264 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5268 mask = 1U << ((mmNIC0_QM0_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5269 mask |= 1U << ((mmNIC0_QM0_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5270 mask |= 1U << ((mmNIC0_QM0_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5271 mask |= 1U << ((mmNIC0_QM0_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5272 mask |= 1U << ((mmNIC0_QM0_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5273 mask |= 1U << ((mmNIC0_QM0_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5274 mask |= 1U << ((mmNIC0_QM0_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5275 mask |= 1U << ((mmNIC0_QM0_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5276 mask |= 1U << ((mmNIC0_QM0_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5277 mask |= 1U << ((mmNIC0_QM0_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5278 mask |= 1U << ((mmNIC0_QM0_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5279 mask |= 1U << ((mmNIC0_QM0_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5280 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5281 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5282 mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5284 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5288 mask = 1U << ((mmNIC0_QM0_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5289 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5290 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5291 mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5292 mask |= 1U << ((mmNIC0_QM0_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5293 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5294 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5295 mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5296 mask |= 1U << ((mmNIC0_QM0_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5297 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5298 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5299 mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5300 mask |= 1U << ((mmNIC0_QM0_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5301 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5302 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5303 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5304 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5305 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5306 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5307 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5308 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5309 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5310 mask |= 1U << ((mmNIC0_QM0_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5311 mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5312 mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5313 mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5314 mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5315 mask |= 1U << ((mmNIC0_QM0_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5317 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5321 mask = 1U << ((mmNIC0_QM0_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5322 mask |= 1U << ((mmNIC0_QM0_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5323 mask |= 1U << ((mmNIC0_QM0_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5324 mask |= 1U << ((mmNIC0_QM0_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5325 mask |= 1U << ((mmNIC0_QM0_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5326 mask |= 1U << ((mmNIC0_QM0_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5327 mask |= 1U << ((mmNIC0_QM0_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5328 mask |= 1U << ((mmNIC0_QM0_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5329 mask |= 1U << ((mmNIC0_QM0_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5330 mask |= 1U << ((mmNIC0_QM0_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5331 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5332 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5333 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5334 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5335 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5336 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5337 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5338 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5339 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5340 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5341 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5342 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5343 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5344 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5345 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5346 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5347 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5348 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5349 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5350 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5351 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5352 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5354 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5359 mask = 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5360 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5361 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5362 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5363 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5364 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5365 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5366 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5367 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5368 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5369 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5370 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5371 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5372 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5373 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5374 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5375 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5376 mask |= 1U << ((mmNIC0_QM0_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5377 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5378 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5379 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5380 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5381 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5382 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5383 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5384 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5385 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5386 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5387 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5388 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5389 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5391 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5397 mask = 1U << ((mmNIC0_QM0_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5398 mask |= 1U << ((mmNIC0_QM0_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5400 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5404 mask = 1U << ((mmNIC0_QM0_CP_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5405 mask |= 1U << ((mmNIC0_QM0_CP_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5406 mask |= 1U << ((mmNIC0_QM0_CP_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5407 mask |= 1U << ((mmNIC0_QM0_CP_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5408 mask |= 1U << ((mmNIC0_QM0_CP_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5409 mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5410 mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5411 mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5412 mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5413 mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5414 mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5415 mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5416 mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5417 mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5418 mask |= 1U << ((mmNIC0_QM0_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5419 mask |= 1U << ((mmNIC0_QM0_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5420 mask |= 1U << ((mmNIC0_QM0_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5421 mask |= 1U << ((mmNIC0_QM0_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5423 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5428 mask = 1U << ((mmNIC0_QM0_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5429 mask |= 1U << ((mmNIC0_QM0_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5430 mask |= 1U << ((mmNIC0_QM0_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5431 mask |= 1U << ((mmNIC0_QM0_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5433 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5437 mask = 1U << ((mmNIC0_QM0_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5438 mask |= 1U << ((mmNIC0_QM0_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5439 mask |= 1U << ((mmNIC0_QM0_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5440 mask |= 1U << ((mmNIC0_QM0_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5441 mask |= 1U << ((mmNIC0_QM0_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5442 mask |= 1U << ((mmNIC0_QM0_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5443 mask |= 1U << ((mmNIC0_QM0_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5444 mask |= 1U << ((mmNIC0_QM0_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5445 mask |= 1U << ((mmNIC0_QM0_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5446 mask |= 1U << ((mmNIC0_QM0_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5447 mask |= 1U << ((mmNIC0_QM0_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5448 mask |= 1U << ((mmNIC0_QM0_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5449 mask |= 1U << ((mmNIC0_QM0_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5451 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5455 mask = 1U << ((mmNIC0_QM0_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5456 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5457 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5458 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5459 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5460 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5461 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5462 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5463 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5464 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5465 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5466 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5467 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5468 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5469 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5470 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5471 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5472 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5473 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5474 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5475 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5476 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5477 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5478 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5479 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5481 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5486 mask = 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5487 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5488 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5489 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5490 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5491 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5492 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5493 mask |= 1U << ((mmNIC0_QM0_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5495 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5501 mask = 1U << ((mmNIC0_QM0_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5502 mask |= 1U << ((mmNIC0_QM0_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5503 mask |= 1U << ((mmNIC0_QM0_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5504 mask |= 1U << ((mmNIC0_QM0_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5505 mask |= 1U << ((mmNIC0_QM0_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5507 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5511 mask = 1U << ((mmNIC0_QM0_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5512 mask |= 1U << ((mmNIC0_QM0_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5513 mask |= 1U << ((mmNIC0_QM0_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5514 mask |= 1U << ((mmNIC0_QM0_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5515 mask |= 1U << ((mmNIC0_QM0_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5516 mask |= 1U << ((mmNIC0_QM0_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5517 mask |= 1U << ((mmNIC0_QM0_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5518 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5519 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5520 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5521 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5522 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5523 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5524 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5525 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5526 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5527 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5528 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5529 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5530 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5531 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5532 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5533 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5534 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5535 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5536 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5537 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5539 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5544 mask = 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5545 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5546 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5547 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5548 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5549 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5550 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5551 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5552 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5553 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5554 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5555 mask |= 1U << ((mmNIC0_QM0_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5556 mask |= 1U << ((mmNIC0_QM0_CGM_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5557 mask |= 1U << ((mmNIC0_QM0_CGM_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5558 mask |= 1U << ((mmNIC0_QM0_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5560 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5565 mask = 1U << ((mmNIC0_QM0_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5566 mask |= 1U << ((mmNIC0_QM0_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5567 mask |= 1U << ((mmNIC0_QM0_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5568 mask |= 1U << ((mmNIC0_QM0_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5569 mask |= 1U << ((mmNIC0_QM0_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5570 mask |= 1U << ((mmNIC0_QM0_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5571 mask |= 1U << ((mmNIC0_QM0_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5572 mask |= 1U << ((mmNIC0_QM0_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5573 mask |= 1U << ((mmNIC0_QM0_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5574 mask |= 1U << ((mmNIC0_QM0_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5575 mask |= 1U << ((mmNIC0_QM0_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5576 mask |= 1U << ((mmNIC0_QM0_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5577 mask |= 1U << ((mmNIC0_QM0_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5578 mask |= 1U << ((mmNIC0_QM0_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5579 mask |= 1U << ((mmNIC0_QM0_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5581 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5586 mask = 1U << ((mmNIC0_QM0_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5588 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5592 mask = 1U << ((mmNIC0_QM1_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5593 mask |= 1U << ((mmNIC0_QM1_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5594 mask |= 1U << ((mmNIC0_QM1_GLBL_PROT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5595 mask |= 1U << ((mmNIC0_QM1_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5596 mask |= 1U << ((mmNIC0_QM1_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5597 mask |= 1U << ((mmNIC0_QM1_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5598 mask |= 1U << ((mmNIC0_QM1_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5599 mask |= 1U << ((mmNIC0_QM1_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5600 mask |= 1U << ((mmNIC0_QM1_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5601 mask |= 1U << ((mmNIC0_QM1_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5602 mask |= 1U << ((mmNIC0_QM1_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5603 mask |= 1U << ((mmNIC0_QM1_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5604 mask |= 1U << ((mmNIC0_QM1_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5605 mask |= 1U << ((mmNIC0_QM1_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5606 mask |= 1U << ((mmNIC0_QM1_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5607 mask |= 1U << ((mmNIC0_QM1_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5608 mask |= 1U << ((mmNIC0_QM1_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5609 mask |= 1U << ((mmNIC0_QM1_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5610 mask |= 1U << ((mmNIC0_QM1_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5611 mask |= 1U << ((mmNIC0_QM1_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5612 mask |= 1U << ((mmNIC0_QM1_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5613 mask |= 1U << ((mmNIC0_QM1_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5614 mask |= 1U << ((mmNIC0_QM1_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5615 mask |= 1U << ((mmNIC0_QM1_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5616 mask |= 1U << ((mmNIC0_QM1_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5617 mask |= 1U << ((mmNIC0_QM1_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5618 mask |= 1U << ((mmNIC0_QM1_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5619 mask |= 1U << ((mmNIC0_QM1_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5620 mask |= 1U << ((mmNIC0_QM1_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5622 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5626 mask = 1U << ((mmNIC0_QM1_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5627 mask |= 1U << ((mmNIC0_QM1_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5628 mask |= 1U << ((mmNIC0_QM1_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5629 mask |= 1U << ((mmNIC0_QM1_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5630 mask |= 1U << ((mmNIC0_QM1_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5631 mask |= 1U << ((mmNIC0_QM1_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5632 mask |= 1U << ((mmNIC0_QM1_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5633 mask |= 1U << ((mmNIC0_QM1_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5634 mask |= 1U << ((mmNIC0_QM1_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5635 mask |= 1U << ((mmNIC0_QM1_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5636 mask |= 1U << ((mmNIC0_QM1_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5637 mask |= 1U << ((mmNIC0_QM1_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5638 mask |= 1U << ((mmNIC0_QM1_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5639 mask |= 1U << ((mmNIC0_QM1_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5640 mask |= 1U << ((mmNIC0_QM1_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5641 mask |= 1U << ((mmNIC0_QM1_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5642 mask |= 1U << ((mmNIC0_QM1_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5643 mask |= 1U << ((mmNIC0_QM1_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5644 mask |= 1U << ((mmNIC0_QM1_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5645 mask |= 1U << ((mmNIC0_QM1_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5646 mask |= 1U << ((mmNIC0_QM1_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5647 mask |= 1U << ((mmNIC0_QM1_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5648 mask |= 1U << ((mmNIC0_QM1_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5649 mask |= 1U << ((mmNIC0_QM1_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5650 mask |= 1U << ((mmNIC0_QM1_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5651 mask |= 1U << ((mmNIC0_QM1_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5652 mask |= 1U << ((mmNIC0_QM1_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5653 mask |= 1U << ((mmNIC0_QM1_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5654 mask |= 1U << ((mmNIC0_QM1_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5655 mask |= 1U << ((mmNIC0_QM1_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5656 mask |= 1U << ((mmNIC0_QM1_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5657 mask |= 1U << ((mmNIC0_QM1_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5659 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5663 mask = 1U << ((mmNIC0_QM1_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5664 mask |= 1U << ((mmNIC0_QM1_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5665 mask |= 1U << ((mmNIC0_QM1_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5666 mask |= 1U << ((mmNIC0_QM1_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5667 mask |= 1U << ((mmNIC0_QM1_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5668 mask |= 1U << ((mmNIC0_QM1_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5669 mask |= 1U << ((mmNIC0_QM1_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5670 mask |= 1U << ((mmNIC0_QM1_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5671 mask |= 1U << ((mmNIC0_QM1_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5672 mask |= 1U << ((mmNIC0_QM1_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5673 mask |= 1U << ((mmNIC0_QM1_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5674 mask |= 1U << ((mmNIC0_QM1_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5675 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5676 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5677 mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5679 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5683 mask = 1U << ((mmNIC0_QM1_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5684 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5685 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5686 mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5687 mask |= 1U << ((mmNIC0_QM1_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5688 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5689 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5690 mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5691 mask |= 1U << ((mmNIC0_QM1_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5692 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5693 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5694 mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5695 mask |= 1U << ((mmNIC0_QM1_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5696 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5697 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5698 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5699 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5700 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5701 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5702 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5703 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5704 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5705 mask |= 1U << ((mmNIC0_QM1_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5706 mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5707 mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5708 mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5709 mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5710 mask |= 1U << ((mmNIC0_QM1_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5712 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5716 mask = 1U << ((mmNIC0_QM1_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5717 mask |= 1U << ((mmNIC0_QM1_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5718 mask |= 1U << ((mmNIC0_QM1_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5719 mask |= 1U << ((mmNIC0_QM1_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5720 mask |= 1U << ((mmNIC0_QM1_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5721 mask |= 1U << ((mmNIC0_QM1_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5722 mask |= 1U << ((mmNIC0_QM1_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5723 mask |= 1U << ((mmNIC0_QM1_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5724 mask |= 1U << ((mmNIC0_QM1_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5725 mask |= 1U << ((mmNIC0_QM1_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5726 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5727 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5728 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5729 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5730 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5731 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5732 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5733 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5734 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5735 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5736 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5737 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5738 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5739 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5740 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5741 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5742 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5743 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5744 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5745 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5746 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5747 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5749 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5754 mask = 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5755 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5756 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5757 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5758 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5759 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5760 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5761 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5762 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5763 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5764 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5765 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5766 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5767 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5768 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5769 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5770 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5771 mask |= 1U << ((mmNIC0_QM1_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5772 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5773 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5774 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5775 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5776 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5777 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5778 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5779 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5780 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5781 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5782 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5783 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5784 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5786 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5792 mask = 1U << ((mmNIC0_QM1_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5793 mask |= 1U << ((mmNIC0_QM1_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5795 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5799 mask = 1U << ((mmNIC0_QM1_CP_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5800 mask |= 1U << ((mmNIC0_QM1_CP_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5801 mask |= 1U << ((mmNIC0_QM1_CP_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5802 mask |= 1U << ((mmNIC0_QM1_CP_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5803 mask |= 1U << ((mmNIC0_QM1_CP_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5804 mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5805 mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5806 mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5807 mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5808 mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5809 mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5810 mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5811 mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5812 mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5813 mask |= 1U << ((mmNIC0_QM1_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5814 mask |= 1U << ((mmNIC0_QM1_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5815 mask |= 1U << ((mmNIC0_QM1_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5816 mask |= 1U << ((mmNIC0_QM1_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5818 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5823 mask = 1U << ((mmNIC0_QM1_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5824 mask |= 1U << ((mmNIC0_QM1_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5825 mask |= 1U << ((mmNIC0_QM1_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5826 mask |= 1U << ((mmNIC0_QM1_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5828 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5832 mask = 1U << ((mmNIC0_QM1_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5833 mask |= 1U << ((mmNIC0_QM1_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5834 mask |= 1U << ((mmNIC0_QM1_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5835 mask |= 1U << ((mmNIC0_QM1_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5836 mask |= 1U << ((mmNIC0_QM1_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5837 mask |= 1U << ((mmNIC0_QM1_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5838 mask |= 1U << ((mmNIC0_QM1_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5839 mask |= 1U << ((mmNIC0_QM1_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5840 mask |= 1U << ((mmNIC0_QM1_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5841 mask |= 1U << ((mmNIC0_QM1_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5842 mask |= 1U << ((mmNIC0_QM1_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5843 mask |= 1U << ((mmNIC0_QM1_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5844 mask |= 1U << ((mmNIC0_QM1_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5846 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5850 mask = 1U << ((mmNIC0_QM1_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5851 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5852 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5853 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5854 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5855 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5856 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5857 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5858 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5859 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5860 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5861 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5862 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5863 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5864 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5865 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5866 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5867 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5868 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5869 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5870 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5871 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5872 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5873 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5874 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5876 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5881 mask = 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5882 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5883 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5884 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5885 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5886 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5887 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5888 mask |= 1U << ((mmNIC0_QM1_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5890 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5896 mask = 1U << ((mmNIC0_QM1_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5897 mask |= 1U << ((mmNIC0_QM1_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5898 mask |= 1U << ((mmNIC0_QM1_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5899 mask |= 1U << ((mmNIC0_QM1_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5900 mask |= 1U << ((mmNIC0_QM1_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5902 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5906 mask = 1U << ((mmNIC0_QM1_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5907 mask |= 1U << ((mmNIC0_QM1_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5908 mask |= 1U << ((mmNIC0_QM1_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5909 mask |= 1U << ((mmNIC0_QM1_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5910 mask |= 1U << ((mmNIC0_QM1_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5911 mask |= 1U << ((mmNIC0_QM1_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5912 mask |= 1U << ((mmNIC0_QM1_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5913 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5914 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5915 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5916 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5917 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5918 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5919 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5920 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5921 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5922 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5923 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5924 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5925 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5926 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5927 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5928 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5929 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5930 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5931 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5932 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5934 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5939 mask = 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5940 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5941 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5942 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5943 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5944 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5945 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5946 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5947 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5948 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5949 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5950 mask |= 1U << ((mmNIC0_QM1_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5951 mask |= 1U << ((mmNIC0_QM1_CGM_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5952 mask |= 1U << ((mmNIC0_QM1_CGM_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5953 mask |= 1U << ((mmNIC0_QM1_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5955 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5960 mask = 1U << ((mmNIC0_QM1_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5961 mask |= 1U << ((mmNIC0_QM1_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5962 mask |= 1U << ((mmNIC0_QM1_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5963 mask |= 1U << ((mmNIC0_QM1_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5964 mask |= 1U << ((mmNIC0_QM1_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5965 mask |= 1U << ((mmNIC0_QM1_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5966 mask |= 1U << ((mmNIC0_QM1_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5967 mask |= 1U << ((mmNIC0_QM1_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5968 mask |= 1U << ((mmNIC0_QM1_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5969 mask |= 1U << ((mmNIC0_QM1_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5970 mask |= 1U << ((mmNIC0_QM1_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5971 mask |= 1U << ((mmNIC0_QM1_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5972 mask |= 1U << ((mmNIC0_QM1_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5973 mask |= 1U << ((mmNIC0_QM1_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5974 mask |= 1U << ((mmNIC0_QM1_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5976 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5981 mask = 1U << ((mmNIC0_QM1_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5983 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
5990 mask = 1U << ((mmNIC1_QM0_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5991 mask |= 1U << ((mmNIC1_QM0_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5992 mask |= 1U << ((mmNIC1_QM0_GLBL_PROT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5993 mask |= 1U << ((mmNIC1_QM0_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5994 mask |= 1U << ((mmNIC1_QM0_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5995 mask |= 1U << ((mmNIC1_QM0_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5996 mask |= 1U << ((mmNIC1_QM0_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5997 mask |= 1U << ((mmNIC1_QM0_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5998 mask |= 1U << ((mmNIC1_QM0_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
5999 mask |= 1U << ((mmNIC1_QM0_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6000 mask |= 1U << ((mmNIC1_QM0_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6001 mask |= 1U << ((mmNIC1_QM0_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6002 mask |= 1U << ((mmNIC1_QM0_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6003 mask |= 1U << ((mmNIC1_QM0_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6004 mask |= 1U << ((mmNIC1_QM0_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6005 mask |= 1U << ((mmNIC1_QM0_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6006 mask |= 1U << ((mmNIC1_QM0_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6007 mask |= 1U << ((mmNIC1_QM0_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6008 mask |= 1U << ((mmNIC1_QM0_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6009 mask |= 1U << ((mmNIC1_QM0_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6010 mask |= 1U << ((mmNIC1_QM0_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6011 mask |= 1U << ((mmNIC1_QM0_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6012 mask |= 1U << ((mmNIC1_QM0_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6013 mask |= 1U << ((mmNIC1_QM0_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6014 mask |= 1U << ((mmNIC1_QM0_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6015 mask |= 1U << ((mmNIC1_QM0_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6016 mask |= 1U << ((mmNIC1_QM0_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6017 mask |= 1U << ((mmNIC1_QM0_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6018 mask |= 1U << ((mmNIC1_QM0_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6020 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6024 mask = 1U << ((mmNIC1_QM0_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6025 mask |= 1U << ((mmNIC1_QM0_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6026 mask |= 1U << ((mmNIC1_QM0_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6027 mask |= 1U << ((mmNIC1_QM0_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6028 mask |= 1U << ((mmNIC1_QM0_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6029 mask |= 1U << ((mmNIC1_QM0_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6030 mask |= 1U << ((mmNIC1_QM0_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6031 mask |= 1U << ((mmNIC1_QM0_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6032 mask |= 1U << ((mmNIC1_QM0_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6033 mask |= 1U << ((mmNIC1_QM0_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6034 mask |= 1U << ((mmNIC1_QM0_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6035 mask |= 1U << ((mmNIC1_QM0_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6036 mask |= 1U << ((mmNIC1_QM0_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6037 mask |= 1U << ((mmNIC1_QM0_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6038 mask |= 1U << ((mmNIC1_QM0_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6039 mask |= 1U << ((mmNIC1_QM0_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6040 mask |= 1U << ((mmNIC1_QM0_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6041 mask |= 1U << ((mmNIC1_QM0_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6042 mask |= 1U << ((mmNIC1_QM0_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6043 mask |= 1U << ((mmNIC1_QM0_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6044 mask |= 1U << ((mmNIC1_QM0_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6045 mask |= 1U << ((mmNIC1_QM0_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6046 mask |= 1U << ((mmNIC1_QM0_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6047 mask |= 1U << ((mmNIC1_QM0_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6048 mask |= 1U << ((mmNIC1_QM0_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6049 mask |= 1U << ((mmNIC1_QM0_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6050 mask |= 1U << ((mmNIC1_QM0_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6051 mask |= 1U << ((mmNIC1_QM0_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6052 mask |= 1U << ((mmNIC1_QM0_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6053 mask |= 1U << ((mmNIC1_QM0_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6054 mask |= 1U << ((mmNIC1_QM0_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6055 mask |= 1U << ((mmNIC1_QM0_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6057 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6061 mask = 1U << ((mmNIC1_QM0_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6062 mask |= 1U << ((mmNIC1_QM0_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6063 mask |= 1U << ((mmNIC1_QM0_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6064 mask |= 1U << ((mmNIC1_QM0_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6065 mask |= 1U << ((mmNIC1_QM0_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6066 mask |= 1U << ((mmNIC1_QM0_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6067 mask |= 1U << ((mmNIC1_QM0_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6068 mask |= 1U << ((mmNIC1_QM0_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6069 mask |= 1U << ((mmNIC1_QM0_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6070 mask |= 1U << ((mmNIC1_QM0_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6071 mask |= 1U << ((mmNIC1_QM0_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6072 mask |= 1U << ((mmNIC1_QM0_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6073 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6074 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6075 mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6077 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6081 mask = 1U << ((mmNIC1_QM0_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6082 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6083 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6084 mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6085 mask |= 1U << ((mmNIC1_QM0_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6086 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6087 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6088 mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6089 mask |= 1U << ((mmNIC1_QM0_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6090 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6091 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6092 mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6093 mask |= 1U << ((mmNIC1_QM0_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6094 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6095 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6096 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6097 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6098 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6099 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6100 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6101 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6102 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6103 mask |= 1U << ((mmNIC1_QM0_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6104 mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6105 mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6106 mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6107 mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6108 mask |= 1U << ((mmNIC1_QM0_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6110 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6114 mask = 1U << ((mmNIC1_QM0_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6115 mask |= 1U << ((mmNIC1_QM0_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6116 mask |= 1U << ((mmNIC1_QM0_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6117 mask |= 1U << ((mmNIC1_QM0_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6118 mask |= 1U << ((mmNIC1_QM0_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6119 mask |= 1U << ((mmNIC1_QM0_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6120 mask |= 1U << ((mmNIC1_QM0_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6121 mask |= 1U << ((mmNIC1_QM0_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6122 mask |= 1U << ((mmNIC1_QM0_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6123 mask |= 1U << ((mmNIC1_QM0_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6124 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6125 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6126 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6127 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6128 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6129 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6130 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6131 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6132 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6133 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6134 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6135 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6136 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6137 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6138 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6139 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6140 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6141 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6142 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6143 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6144 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6145 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6147 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6152 mask = 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6153 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6154 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6155 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6156 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6157 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6158 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6159 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6160 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6161 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6162 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6163 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6164 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6165 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6166 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6167 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6168 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6169 mask |= 1U << ((mmNIC1_QM0_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6170 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6171 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6172 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6173 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6174 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6175 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6176 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6177 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6178 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6179 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6180 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6181 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6182 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6184 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6190 mask = 1U << ((mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6191 mask |= 1U << ((mmNIC1_QM0_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6193 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6197 mask = 1U << ((mmNIC1_QM0_CP_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6198 mask |= 1U << ((mmNIC1_QM0_CP_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6199 mask |= 1U << ((mmNIC1_QM0_CP_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6200 mask |= 1U << ((mmNIC1_QM0_CP_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6201 mask |= 1U << ((mmNIC1_QM0_CP_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6202 mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6203 mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6204 mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6205 mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6206 mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6207 mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6208 mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6209 mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6210 mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6211 mask |= 1U << ((mmNIC1_QM0_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6212 mask |= 1U << ((mmNIC1_QM0_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6213 mask |= 1U << ((mmNIC1_QM0_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6214 mask |= 1U << ((mmNIC1_QM0_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6216 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6221 mask = 1U << ((mmNIC1_QM0_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6222 mask |= 1U << ((mmNIC1_QM0_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6223 mask |= 1U << ((mmNIC1_QM0_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6224 mask |= 1U << ((mmNIC1_QM0_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6226 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6230 mask = 1U << ((mmNIC1_QM0_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6231 mask |= 1U << ((mmNIC1_QM0_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6232 mask |= 1U << ((mmNIC1_QM0_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6233 mask |= 1U << ((mmNIC1_QM0_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6234 mask |= 1U << ((mmNIC1_QM0_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6235 mask |= 1U << ((mmNIC1_QM0_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6236 mask |= 1U << ((mmNIC1_QM0_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6237 mask |= 1U << ((mmNIC1_QM0_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6238 mask |= 1U << ((mmNIC1_QM0_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6239 mask |= 1U << ((mmNIC1_QM0_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6240 mask |= 1U << ((mmNIC1_QM0_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6241 mask |= 1U << ((mmNIC1_QM0_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6242 mask |= 1U << ((mmNIC1_QM0_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6244 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6248 mask = 1U << ((mmNIC1_QM0_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6249 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6250 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6251 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6252 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6253 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6254 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6255 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6256 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6257 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6258 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6259 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6260 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6261 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6262 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6263 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6264 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6265 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6266 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6267 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6268 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6269 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6270 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6271 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6272 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6274 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6279 mask = 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6280 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6281 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6282 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6283 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6284 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6285 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6286 mask |= 1U << ((mmNIC1_QM0_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6288 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6294 mask = 1U << ((mmNIC1_QM0_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6295 mask |= 1U << ((mmNIC1_QM0_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6296 mask |= 1U << ((mmNIC1_QM0_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6297 mask |= 1U << ((mmNIC1_QM0_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6298 mask |= 1U << ((mmNIC1_QM0_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6299 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6303 mask = 1U << ((mmNIC1_QM0_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6304 mask |= 1U << ((mmNIC1_QM0_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6305 mask |= 1U << ((mmNIC1_QM0_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6306 mask |= 1U << ((mmNIC1_QM0_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6307 mask |= 1U << ((mmNIC1_QM0_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6308 mask |= 1U << ((mmNIC1_QM0_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6309 mask |= 1U << ((mmNIC1_QM0_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6310 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6311 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6312 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6313 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6314 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6315 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6316 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6317 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6318 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6319 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6320 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6321 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6322 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6323 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6324 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6325 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6326 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6327 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6328 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6329 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6331 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6336 mask = 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6337 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6338 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6339 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6340 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6341 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6342 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6343 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6344 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6345 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6346 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6347 mask |= 1U << ((mmNIC1_QM0_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6348 mask |= 1U << ((mmNIC1_QM0_CGM_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6349 mask |= 1U << ((mmNIC1_QM0_CGM_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6350 mask |= 1U << ((mmNIC1_QM0_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6352 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6357 mask = 1U << ((mmNIC1_QM0_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6358 mask |= 1U << ((mmNIC1_QM0_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6359 mask |= 1U << ((mmNIC1_QM0_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6360 mask |= 1U << ((mmNIC1_QM0_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6361 mask |= 1U << ((mmNIC1_QM0_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6362 mask |= 1U << ((mmNIC1_QM0_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6363 mask |= 1U << ((mmNIC1_QM0_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6364 mask |= 1U << ((mmNIC1_QM0_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6365 mask |= 1U << ((mmNIC1_QM0_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6366 mask |= 1U << ((mmNIC1_QM0_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6367 mask |= 1U << ((mmNIC1_QM0_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6368 mask |= 1U << ((mmNIC1_QM0_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6369 mask |= 1U << ((mmNIC1_QM0_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6370 mask |= 1U << ((mmNIC1_QM0_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6371 mask |= 1U << ((mmNIC1_QM0_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6373 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6378 mask = 1U << ((mmNIC1_QM0_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6380 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6384 mask = 1U << ((mmNIC1_QM1_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6385 mask |= 1U << ((mmNIC1_QM1_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6386 mask |= 1U << ((mmNIC1_QM1_GLBL_PROT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6387 mask |= 1U << ((mmNIC1_QM1_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6388 mask |= 1U << ((mmNIC1_QM1_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6389 mask |= 1U << ((mmNIC1_QM1_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6390 mask |= 1U << ((mmNIC1_QM1_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6391 mask |= 1U << ((mmNIC1_QM1_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6392 mask |= 1U << ((mmNIC1_QM1_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6393 mask |= 1U << ((mmNIC1_QM1_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6394 mask |= 1U << ((mmNIC1_QM1_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6395 mask |= 1U << ((mmNIC1_QM1_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6396 mask |= 1U << ((mmNIC1_QM1_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6397 mask |= 1U << ((mmNIC1_QM1_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6398 mask |= 1U << ((mmNIC1_QM1_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6399 mask |= 1U << ((mmNIC1_QM1_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6400 mask |= 1U << ((mmNIC1_QM1_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6401 mask |= 1U << ((mmNIC1_QM1_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6402 mask |= 1U << ((mmNIC1_QM1_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6403 mask |= 1U << ((mmNIC1_QM1_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6404 mask |= 1U << ((mmNIC1_QM1_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6405 mask |= 1U << ((mmNIC1_QM1_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6406 mask |= 1U << ((mmNIC1_QM1_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6407 mask |= 1U << ((mmNIC1_QM1_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6408 mask |= 1U << ((mmNIC1_QM1_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6409 mask |= 1U << ((mmNIC1_QM1_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6410 mask |= 1U << ((mmNIC1_QM1_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6411 mask |= 1U << ((mmNIC1_QM1_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6412 mask |= 1U << ((mmNIC1_QM1_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6414 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6418 mask = 1U << ((mmNIC1_QM1_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6419 mask |= 1U << ((mmNIC1_QM1_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6420 mask |= 1U << ((mmNIC1_QM1_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6421 mask |= 1U << ((mmNIC1_QM1_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6422 mask |= 1U << ((mmNIC1_QM1_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6423 mask |= 1U << ((mmNIC1_QM1_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6424 mask |= 1U << ((mmNIC1_QM1_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6425 mask |= 1U << ((mmNIC1_QM1_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6426 mask |= 1U << ((mmNIC1_QM1_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6427 mask |= 1U << ((mmNIC1_QM1_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6428 mask |= 1U << ((mmNIC1_QM1_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6429 mask |= 1U << ((mmNIC1_QM1_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6430 mask |= 1U << ((mmNIC1_QM1_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6431 mask |= 1U << ((mmNIC1_QM1_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6432 mask |= 1U << ((mmNIC1_QM1_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6433 mask |= 1U << ((mmNIC1_QM1_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6434 mask |= 1U << ((mmNIC1_QM1_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6435 mask |= 1U << ((mmNIC1_QM1_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6436 mask |= 1U << ((mmNIC1_QM1_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6437 mask |= 1U << ((mmNIC1_QM1_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6438 mask |= 1U << ((mmNIC1_QM1_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6439 mask |= 1U << ((mmNIC1_QM1_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6440 mask |= 1U << ((mmNIC1_QM1_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6441 mask |= 1U << ((mmNIC1_QM1_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6442 mask |= 1U << ((mmNIC1_QM1_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6443 mask |= 1U << ((mmNIC1_QM1_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6444 mask |= 1U << ((mmNIC1_QM1_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6445 mask |= 1U << ((mmNIC1_QM1_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6446 mask |= 1U << ((mmNIC1_QM1_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6447 mask |= 1U << ((mmNIC1_QM1_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6448 mask |= 1U << ((mmNIC1_QM1_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6449 mask |= 1U << ((mmNIC1_QM1_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6451 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6455 mask = 1U << ((mmNIC1_QM1_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6456 mask |= 1U << ((mmNIC1_QM1_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6457 mask |= 1U << ((mmNIC1_QM1_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6458 mask |= 1U << ((mmNIC1_QM1_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6459 mask |= 1U << ((mmNIC1_QM1_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6460 mask |= 1U << ((mmNIC1_QM1_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6461 mask |= 1U << ((mmNIC1_QM1_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6462 mask |= 1U << ((mmNIC1_QM1_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6463 mask |= 1U << ((mmNIC1_QM1_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6464 mask |= 1U << ((mmNIC1_QM1_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6465 mask |= 1U << ((mmNIC1_QM1_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6466 mask |= 1U << ((mmNIC1_QM1_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6467 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6468 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6469 mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6471 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6475 mask = 1U << ((mmNIC1_QM1_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6476 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6477 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6478 mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6479 mask |= 1U << ((mmNIC1_QM1_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6480 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6481 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6482 mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6483 mask |= 1U << ((mmNIC1_QM1_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6484 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6485 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6486 mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6487 mask |= 1U << ((mmNIC1_QM1_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6488 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6489 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6490 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6491 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6492 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6493 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6494 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6495 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6496 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6497 mask |= 1U << ((mmNIC1_QM1_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6498 mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6499 mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6500 mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6501 mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6502 mask |= 1U << ((mmNIC1_QM1_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6504 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6508 mask = 1U << ((mmNIC1_QM1_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6509 mask |= 1U << ((mmNIC1_QM1_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6510 mask |= 1U << ((mmNIC1_QM1_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6511 mask |= 1U << ((mmNIC1_QM1_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6512 mask |= 1U << ((mmNIC1_QM1_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6513 mask |= 1U << ((mmNIC1_QM1_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6514 mask |= 1U << ((mmNIC1_QM1_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6515 mask |= 1U << ((mmNIC1_QM1_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6516 mask |= 1U << ((mmNIC1_QM1_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6517 mask |= 1U << ((mmNIC1_QM1_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6518 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6519 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6520 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6521 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6522 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6523 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6524 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6525 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6526 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6527 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6528 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6529 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6530 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6531 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6532 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6533 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6534 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6535 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6536 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6537 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6538 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6539 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6541 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6546 mask = 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6547 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6548 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6549 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6550 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6551 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6552 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6553 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6554 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6555 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6556 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6557 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6558 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6559 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6560 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6561 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6562 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6563 mask |= 1U << ((mmNIC1_QM1_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6564 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6565 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6566 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6567 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6568 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6569 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6570 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6571 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6572 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6573 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6574 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6575 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6576 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6578 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6584 mask = 1U << ((mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6585 mask |= 1U << ((mmNIC1_QM1_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6587 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6591 mask = 1U << ((mmNIC1_QM1_CP_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6592 mask |= 1U << ((mmNIC1_QM1_CP_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6593 mask |= 1U << ((mmNIC1_QM1_CP_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6594 mask |= 1U << ((mmNIC1_QM1_CP_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6595 mask |= 1U << ((mmNIC1_QM1_CP_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6596 mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6597 mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6598 mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6599 mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6600 mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6601 mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6602 mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6603 mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6604 mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6605 mask |= 1U << ((mmNIC1_QM1_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6606 mask |= 1U << ((mmNIC1_QM1_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6607 mask |= 1U << ((mmNIC1_QM1_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6608 mask |= 1U << ((mmNIC1_QM1_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6610 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6615 mask = 1U << ((mmNIC1_QM1_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6616 mask |= 1U << ((mmNIC1_QM1_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6617 mask |= 1U << ((mmNIC1_QM1_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6618 mask |= 1U << ((mmNIC1_QM1_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6620 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6624 mask = 1U << ((mmNIC1_QM1_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6625 mask |= 1U << ((mmNIC1_QM1_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6626 mask |= 1U << ((mmNIC1_QM1_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6627 mask |= 1U << ((mmNIC1_QM1_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6628 mask |= 1U << ((mmNIC1_QM1_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6629 mask |= 1U << ((mmNIC1_QM1_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6630 mask |= 1U << ((mmNIC1_QM1_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6631 mask |= 1U << ((mmNIC1_QM1_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6632 mask |= 1U << ((mmNIC1_QM1_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6633 mask |= 1U << ((mmNIC1_QM1_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6634 mask |= 1U << ((mmNIC1_QM1_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6635 mask |= 1U << ((mmNIC1_QM1_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6636 mask |= 1U << ((mmNIC1_QM1_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6638 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6642 mask = 1U << ((mmNIC1_QM1_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6643 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6644 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6645 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6646 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6647 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6648 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6649 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6650 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6651 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6652 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6653 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6654 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6655 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6656 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6657 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6658 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6659 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6660 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6661 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6662 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6663 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6664 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6665 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6666 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6668 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6673 mask = 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6674 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6675 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6676 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6677 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6678 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6679 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6680 mask |= 1U << ((mmNIC1_QM1_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6682 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6688 mask = 1U << ((mmNIC1_QM1_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6689 mask |= 1U << ((mmNIC1_QM1_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6690 mask |= 1U << ((mmNIC1_QM1_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6691 mask |= 1U << ((mmNIC1_QM1_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6692 mask |= 1U << ((mmNIC1_QM1_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6694 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6698 mask = 1U << ((mmNIC1_QM1_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6699 mask |= 1U << ((mmNIC1_QM1_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6700 mask |= 1U << ((mmNIC1_QM1_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6701 mask |= 1U << ((mmNIC1_QM1_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6702 mask |= 1U << ((mmNIC1_QM1_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6703 mask |= 1U << ((mmNIC1_QM1_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6704 mask |= 1U << ((mmNIC1_QM1_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6705 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6706 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6707 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6708 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6709 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6710 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6711 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6712 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6713 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6714 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6715 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6716 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6717 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6718 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6719 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6720 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6721 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6722 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6723 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6724 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6726 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6731 mask = 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6732 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6733 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6734 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6735 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6736 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6737 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6738 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6739 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6740 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6741 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6742 mask |= 1U << ((mmNIC1_QM1_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6743 mask |= 1U << ((mmNIC1_QM1_CGM_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6744 mask |= 1U << ((mmNIC1_QM1_CGM_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6745 mask |= 1U << ((mmNIC1_QM1_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6747 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6752 mask = 1U << ((mmNIC1_QM1_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6753 mask |= 1U << ((mmNIC1_QM1_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6754 mask |= 1U << ((mmNIC1_QM1_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6755 mask |= 1U << ((mmNIC1_QM1_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6756 mask |= 1U << ((mmNIC1_QM1_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6757 mask |= 1U << ((mmNIC1_QM1_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6758 mask |= 1U << ((mmNIC1_QM1_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6759 mask |= 1U << ((mmNIC1_QM1_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6760 mask |= 1U << ((mmNIC1_QM1_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6761 mask |= 1U << ((mmNIC1_QM1_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6762 mask |= 1U << ((mmNIC1_QM1_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6763 mask |= 1U << ((mmNIC1_QM1_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6764 mask |= 1U << ((mmNIC1_QM1_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6765 mask |= 1U << ((mmNIC1_QM1_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6766 mask |= 1U << ((mmNIC1_QM1_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6768 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6773 mask = 1U << ((mmNIC1_QM1_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6775 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6782 mask = 1U << ((mmNIC2_QM0_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6783 mask |= 1U << ((mmNIC2_QM0_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6784 mask |= 1U << ((mmNIC2_QM0_GLBL_PROT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6785 mask |= 1U << ((mmNIC2_QM0_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6786 mask |= 1U << ((mmNIC2_QM0_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6787 mask |= 1U << ((mmNIC2_QM0_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6788 mask |= 1U << ((mmNIC2_QM0_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6789 mask |= 1U << ((mmNIC2_QM0_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6790 mask |= 1U << ((mmNIC2_QM0_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6791 mask |= 1U << ((mmNIC2_QM0_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6792 mask |= 1U << ((mmNIC2_QM0_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6793 mask |= 1U << ((mmNIC2_QM0_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6794 mask |= 1U << ((mmNIC2_QM0_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6795 mask |= 1U << ((mmNIC2_QM0_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6796 mask |= 1U << ((mmNIC2_QM0_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6797 mask |= 1U << ((mmNIC2_QM0_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6798 mask |= 1U << ((mmNIC2_QM0_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6799 mask |= 1U << ((mmNIC2_QM0_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6800 mask |= 1U << ((mmNIC2_QM0_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6801 mask |= 1U << ((mmNIC2_QM0_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6802 mask |= 1U << ((mmNIC2_QM0_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6803 mask |= 1U << ((mmNIC2_QM0_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6804 mask |= 1U << ((mmNIC2_QM0_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6805 mask |= 1U << ((mmNIC2_QM0_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6806 mask |= 1U << ((mmNIC2_QM0_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6807 mask |= 1U << ((mmNIC2_QM0_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6808 mask |= 1U << ((mmNIC2_QM0_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6809 mask |= 1U << ((mmNIC2_QM0_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6810 mask |= 1U << ((mmNIC2_QM0_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6812 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6816 mask = 1U << ((mmNIC2_QM0_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6817 mask |= 1U << ((mmNIC2_QM0_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6818 mask |= 1U << ((mmNIC2_QM0_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6819 mask |= 1U << ((mmNIC2_QM0_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6820 mask |= 1U << ((mmNIC2_QM0_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6821 mask |= 1U << ((mmNIC2_QM0_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6822 mask |= 1U << ((mmNIC2_QM0_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6823 mask |= 1U << ((mmNIC2_QM0_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6824 mask |= 1U << ((mmNIC2_QM0_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6825 mask |= 1U << ((mmNIC2_QM0_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6826 mask |= 1U << ((mmNIC2_QM0_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6827 mask |= 1U << ((mmNIC2_QM0_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6828 mask |= 1U << ((mmNIC2_QM0_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6829 mask |= 1U << ((mmNIC2_QM0_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6830 mask |= 1U << ((mmNIC2_QM0_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6831 mask |= 1U << ((mmNIC2_QM0_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6832 mask |= 1U << ((mmNIC2_QM0_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6833 mask |= 1U << ((mmNIC2_QM0_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6834 mask |= 1U << ((mmNIC2_QM0_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6835 mask |= 1U << ((mmNIC2_QM0_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6836 mask |= 1U << ((mmNIC2_QM0_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6837 mask |= 1U << ((mmNIC2_QM0_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6838 mask |= 1U << ((mmNIC2_QM0_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6839 mask |= 1U << ((mmNIC2_QM0_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6840 mask |= 1U << ((mmNIC2_QM0_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6841 mask |= 1U << ((mmNIC2_QM0_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6842 mask |= 1U << ((mmNIC2_QM0_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6843 mask |= 1U << ((mmNIC2_QM0_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6844 mask |= 1U << ((mmNIC2_QM0_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6845 mask |= 1U << ((mmNIC2_QM0_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6846 mask |= 1U << ((mmNIC2_QM0_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6847 mask |= 1U << ((mmNIC2_QM0_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6849 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6853 mask = 1U << ((mmNIC2_QM0_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6854 mask |= 1U << ((mmNIC2_QM0_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6855 mask |= 1U << ((mmNIC2_QM0_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6856 mask |= 1U << ((mmNIC2_QM0_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6857 mask |= 1U << ((mmNIC2_QM0_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6858 mask |= 1U << ((mmNIC2_QM0_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6859 mask |= 1U << ((mmNIC2_QM0_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6860 mask |= 1U << ((mmNIC2_QM0_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6861 mask |= 1U << ((mmNIC2_QM0_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6862 mask |= 1U << ((mmNIC2_QM0_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6863 mask |= 1U << ((mmNIC2_QM0_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6864 mask |= 1U << ((mmNIC2_QM0_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6865 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6866 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6867 mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6869 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6873 mask = 1U << ((mmNIC2_QM0_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6874 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6875 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6876 mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6877 mask |= 1U << ((mmNIC2_QM0_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6878 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6879 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6880 mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6881 mask |= 1U << ((mmNIC2_QM0_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6882 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6883 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6884 mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6885 mask |= 1U << ((mmNIC2_QM0_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6886 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6887 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6888 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6889 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6890 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6891 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6892 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6893 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6894 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6895 mask |= 1U << ((mmNIC2_QM0_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6896 mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6897 mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6898 mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6899 mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6900 mask |= 1U << ((mmNIC2_QM0_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6902 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6906 mask = 1U << ((mmNIC2_QM0_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6907 mask |= 1U << ((mmNIC2_QM0_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6908 mask |= 1U << ((mmNIC2_QM0_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6909 mask |= 1U << ((mmNIC2_QM0_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6910 mask |= 1U << ((mmNIC2_QM0_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6911 mask |= 1U << ((mmNIC2_QM0_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6912 mask |= 1U << ((mmNIC2_QM0_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6913 mask |= 1U << ((mmNIC2_QM0_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6914 mask |= 1U << ((mmNIC2_QM0_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6915 mask |= 1U << ((mmNIC2_QM0_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6916 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6917 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6918 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6919 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6920 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6921 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6922 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6923 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6924 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6925 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6926 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6927 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6928 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6929 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6930 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6931 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6932 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6933 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6934 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6935 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6936 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6937 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6939 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6945 mask = 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6946 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6947 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6948 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6949 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6950 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6951 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6952 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6953 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6954 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6955 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6956 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6957 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6958 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6959 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6960 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6961 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6962 mask |= 1U << ((mmNIC2_QM0_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6963 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6964 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6965 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6966 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6967 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6968 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6969 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6970 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6971 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6972 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6973 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6974 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6975 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6977 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6983 mask = 1U << ((mmNIC2_QM0_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6984 mask |= 1U << ((mmNIC2_QM0_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6986 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
6990 mask = 1U << ((mmNIC2_QM0_CP_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6991 mask |= 1U << ((mmNIC2_QM0_CP_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6992 mask |= 1U << ((mmNIC2_QM0_CP_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6993 mask |= 1U << ((mmNIC2_QM0_CP_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6994 mask |= 1U << ((mmNIC2_QM0_CP_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6995 mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6996 mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6997 mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6998 mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
6999 mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7000 mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7001 mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7002 mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7003 mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7004 mask |= 1U << ((mmNIC2_QM0_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7005 mask |= 1U << ((mmNIC2_QM0_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7006 mask |= 1U << ((mmNIC2_QM0_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7007 mask |= 1U << ((mmNIC2_QM0_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7009 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7014 mask = 1U << ((mmNIC2_QM0_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7015 mask |= 1U << ((mmNIC2_QM0_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7016 mask |= 1U << ((mmNIC2_QM0_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7017 mask |= 1U << ((mmNIC2_QM0_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7019 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7023 mask = 1U << ((mmNIC2_QM0_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7024 mask |= 1U << ((mmNIC2_QM0_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7025 mask |= 1U << ((mmNIC2_QM0_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7026 mask |= 1U << ((mmNIC2_QM0_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7027 mask |= 1U << ((mmNIC2_QM0_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7028 mask |= 1U << ((mmNIC2_QM0_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7029 mask |= 1U << ((mmNIC2_QM0_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7030 mask |= 1U << ((mmNIC2_QM0_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7031 mask |= 1U << ((mmNIC2_QM0_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7032 mask |= 1U << ((mmNIC2_QM0_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7033 mask |= 1U << ((mmNIC2_QM0_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7034 mask |= 1U << ((mmNIC2_QM0_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7035 mask |= 1U << ((mmNIC2_QM0_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7037 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7041 mask = 1U << ((mmNIC2_QM0_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7042 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7043 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7044 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7045 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7046 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7047 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7048 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7049 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7050 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7051 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7052 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7053 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7054 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7055 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7056 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7057 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7058 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7059 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7060 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7061 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7062 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7063 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7064 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7065 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7067 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7072 mask = 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7073 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7074 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7075 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7076 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7077 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7078 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7079 mask |= 1U << ((mmNIC2_QM0_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7081 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7087 mask = 1U << ((mmNIC2_QM0_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7088 mask |= 1U << ((mmNIC2_QM0_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7089 mask |= 1U << ((mmNIC2_QM0_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7090 mask |= 1U << ((mmNIC2_QM0_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7091 mask |= 1U << ((mmNIC2_QM0_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7093 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7097 mask = 1U << ((mmNIC2_QM0_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7098 mask |= 1U << ((mmNIC2_QM0_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7099 mask |= 1U << ((mmNIC2_QM0_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7100 mask |= 1U << ((mmNIC2_QM0_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7101 mask |= 1U << ((mmNIC2_QM0_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7102 mask |= 1U << ((mmNIC2_QM0_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7103 mask |= 1U << ((mmNIC2_QM0_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7104 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7105 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7106 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7107 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7108 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7109 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7110 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7111 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7112 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7113 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7114 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7115 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7116 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7117 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7118 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7119 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7120 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7121 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7122 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7123 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7125 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7130 mask = 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7131 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7132 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7133 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7134 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7135 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7136 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7137 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7138 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7139 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7140 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7141 mask |= 1U << ((mmNIC2_QM0_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7142 mask |= 1U << ((mmNIC2_QM0_CGM_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7143 mask |= 1U << ((mmNIC2_QM0_CGM_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7144 mask |= 1U << ((mmNIC2_QM0_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7146 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7151 mask = 1U << ((mmNIC2_QM0_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7152 mask |= 1U << ((mmNIC2_QM0_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7153 mask |= 1U << ((mmNIC2_QM0_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7154 mask |= 1U << ((mmNIC2_QM0_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7155 mask |= 1U << ((mmNIC2_QM0_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7156 mask |= 1U << ((mmNIC2_QM0_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7157 mask |= 1U << ((mmNIC2_QM0_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7158 mask |= 1U << ((mmNIC2_QM0_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7159 mask |= 1U << ((mmNIC2_QM0_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7160 mask |= 1U << ((mmNIC2_QM0_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7161 mask |= 1U << ((mmNIC2_QM0_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7162 mask |= 1U << ((mmNIC2_QM0_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7163 mask |= 1U << ((mmNIC2_QM0_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7164 mask |= 1U << ((mmNIC2_QM0_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7165 mask |= 1U << ((mmNIC2_QM0_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7167 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7172 mask = 1U << ((mmNIC2_QM0_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7174 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7178 mask = 1U << ((mmNIC2_QM1_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7179 mask |= 1U << ((mmNIC2_QM1_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7180 mask |= 1U << ((mmNIC2_QM1_GLBL_PROT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7181 mask |= 1U << ((mmNIC2_QM1_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7182 mask |= 1U << ((mmNIC2_QM1_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7183 mask |= 1U << ((mmNIC2_QM1_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7184 mask |= 1U << ((mmNIC2_QM1_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7185 mask |= 1U << ((mmNIC2_QM1_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7186 mask |= 1U << ((mmNIC2_QM1_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7187 mask |= 1U << ((mmNIC2_QM1_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7188 mask |= 1U << ((mmNIC2_QM1_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7189 mask |= 1U << ((mmNIC2_QM1_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7190 mask |= 1U << ((mmNIC2_QM1_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7191 mask |= 1U << ((mmNIC2_QM1_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7192 mask |= 1U << ((mmNIC2_QM1_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7193 mask |= 1U << ((mmNIC2_QM1_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7194 mask |= 1U << ((mmNIC2_QM1_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7195 mask |= 1U << ((mmNIC2_QM1_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7196 mask |= 1U << ((mmNIC2_QM1_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7197 mask |= 1U << ((mmNIC2_QM1_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7198 mask |= 1U << ((mmNIC2_QM1_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7199 mask |= 1U << ((mmNIC2_QM1_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7200 mask |= 1U << ((mmNIC2_QM1_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7201 mask |= 1U << ((mmNIC2_QM1_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7202 mask |= 1U << ((mmNIC2_QM1_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7203 mask |= 1U << ((mmNIC2_QM1_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7204 mask |= 1U << ((mmNIC2_QM1_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7205 mask |= 1U << ((mmNIC2_QM1_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7206 mask |= 1U << ((mmNIC2_QM1_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7208 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7212 mask = 1U << ((mmNIC2_QM1_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7213 mask |= 1U << ((mmNIC2_QM1_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7214 mask |= 1U << ((mmNIC2_QM1_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7215 mask |= 1U << ((mmNIC2_QM1_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7216 mask |= 1U << ((mmNIC2_QM1_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7217 mask |= 1U << ((mmNIC2_QM1_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7218 mask |= 1U << ((mmNIC2_QM1_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7219 mask |= 1U << ((mmNIC2_QM1_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7220 mask |= 1U << ((mmNIC2_QM1_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7221 mask |= 1U << ((mmNIC2_QM1_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7222 mask |= 1U << ((mmNIC2_QM1_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7223 mask |= 1U << ((mmNIC2_QM1_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7224 mask |= 1U << ((mmNIC2_QM1_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7225 mask |= 1U << ((mmNIC2_QM1_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7226 mask |= 1U << ((mmNIC2_QM1_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7227 mask |= 1U << ((mmNIC2_QM1_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7228 mask |= 1U << ((mmNIC2_QM1_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7229 mask |= 1U << ((mmNIC2_QM1_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7230 mask |= 1U << ((mmNIC2_QM1_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7231 mask |= 1U << ((mmNIC2_QM1_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7232 mask |= 1U << ((mmNIC2_QM1_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7233 mask |= 1U << ((mmNIC2_QM1_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7234 mask |= 1U << ((mmNIC2_QM1_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7235 mask |= 1U << ((mmNIC2_QM1_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7236 mask |= 1U << ((mmNIC2_QM1_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7237 mask |= 1U << ((mmNIC2_QM1_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7238 mask |= 1U << ((mmNIC2_QM1_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7239 mask |= 1U << ((mmNIC2_QM1_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7240 mask |= 1U << ((mmNIC2_QM1_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7241 mask |= 1U << ((mmNIC2_QM1_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7242 mask |= 1U << ((mmNIC2_QM1_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7243 mask |= 1U << ((mmNIC2_QM1_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7245 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7249 mask = 1U << ((mmNIC2_QM1_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7250 mask |= 1U << ((mmNIC2_QM1_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7251 mask |= 1U << ((mmNIC2_QM1_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7252 mask |= 1U << ((mmNIC2_QM1_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7253 mask |= 1U << ((mmNIC2_QM1_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7254 mask |= 1U << ((mmNIC2_QM1_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7255 mask |= 1U << ((mmNIC2_QM1_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7256 mask |= 1U << ((mmNIC2_QM1_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7257 mask |= 1U << ((mmNIC2_QM1_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7258 mask |= 1U << ((mmNIC2_QM1_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7259 mask |= 1U << ((mmNIC2_QM1_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7260 mask |= 1U << ((mmNIC2_QM1_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7261 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7262 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7263 mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7265 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7269 mask = 1U << ((mmNIC2_QM1_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7270 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7271 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7272 mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7273 mask |= 1U << ((mmNIC2_QM1_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7274 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7275 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7276 mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7277 mask |= 1U << ((mmNIC2_QM1_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7278 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7279 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7280 mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7281 mask |= 1U << ((mmNIC2_QM1_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7282 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7283 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7284 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7285 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7286 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7287 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7288 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7289 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7290 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7291 mask |= 1U << ((mmNIC2_QM1_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7292 mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7293 mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7294 mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7295 mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7296 mask |= 1U << ((mmNIC2_QM1_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7298 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7302 mask = 1U << ((mmNIC2_QM1_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7303 mask |= 1U << ((mmNIC2_QM1_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7304 mask |= 1U << ((mmNIC2_QM1_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7305 mask |= 1U << ((mmNIC2_QM1_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7306 mask |= 1U << ((mmNIC2_QM1_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7307 mask |= 1U << ((mmNIC2_QM1_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7308 mask |= 1U << ((mmNIC2_QM1_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7309 mask |= 1U << ((mmNIC2_QM1_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7310 mask |= 1U << ((mmNIC2_QM1_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7311 mask |= 1U << ((mmNIC2_QM1_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7312 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7313 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7314 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7315 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7316 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7317 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7318 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7319 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7320 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7321 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7322 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7323 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7324 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7325 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7326 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7327 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7328 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7329 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7330 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7331 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7332 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7333 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7335 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7340 mask = 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7341 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7342 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7343 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7344 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7345 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7346 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7347 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7348 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7349 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7350 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7351 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7352 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7353 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7354 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7355 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7356 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7357 mask |= 1U << ((mmNIC2_QM1_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7358 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7359 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7360 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7361 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7362 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7363 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7364 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7365 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7366 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7367 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7368 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7369 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7370 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7372 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7378 mask = 1U << ((mmNIC2_QM1_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7379 mask |= 1U << ((mmNIC2_QM1_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7381 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7385 mask = 1U << ((mmNIC2_QM1_CP_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7386 mask |= 1U << ((mmNIC2_QM1_CP_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7387 mask |= 1U << ((mmNIC2_QM1_CP_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7388 mask |= 1U << ((mmNIC2_QM1_CP_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7389 mask |= 1U << ((mmNIC2_QM1_CP_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7390 mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7391 mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7392 mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7393 mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7394 mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7395 mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7396 mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7397 mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7398 mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7399 mask |= 1U << ((mmNIC2_QM1_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7400 mask |= 1U << ((mmNIC2_QM1_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7401 mask |= 1U << ((mmNIC2_QM1_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7402 mask |= 1U << ((mmNIC2_QM1_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7404 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7409 mask = 1U << ((mmNIC2_QM1_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7410 mask |= 1U << ((mmNIC2_QM1_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7411 mask |= 1U << ((mmNIC2_QM1_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7412 mask |= 1U << ((mmNIC2_QM1_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7414 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7418 mask = 1U << ((mmNIC2_QM1_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7419 mask |= 1U << ((mmNIC2_QM1_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7420 mask |= 1U << ((mmNIC2_QM1_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7421 mask |= 1U << ((mmNIC2_QM1_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7422 mask |= 1U << ((mmNIC2_QM1_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7423 mask |= 1U << ((mmNIC2_QM1_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7424 mask |= 1U << ((mmNIC2_QM1_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7425 mask |= 1U << ((mmNIC2_QM1_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7426 mask |= 1U << ((mmNIC2_QM1_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7427 mask |= 1U << ((mmNIC2_QM1_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7428 mask |= 1U << ((mmNIC2_QM1_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7429 mask |= 1U << ((mmNIC2_QM1_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7430 mask |= 1U << ((mmNIC2_QM1_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7432 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7436 mask = 1U << ((mmNIC2_QM1_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7437 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7438 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7439 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7440 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7441 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7442 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7443 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7444 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7445 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7446 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7447 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7448 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7449 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7450 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7451 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7452 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7453 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7454 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7455 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7456 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7457 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7458 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7459 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7460 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7462 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7467 mask = 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7468 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7469 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7470 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7471 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7472 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7473 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7474 mask |= 1U << ((mmNIC2_QM1_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7476 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7482 mask = 1U << ((mmNIC2_QM1_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7483 mask |= 1U << ((mmNIC2_QM1_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7484 mask |= 1U << ((mmNIC2_QM1_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7485 mask |= 1U << ((mmNIC2_QM1_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7486 mask |= 1U << ((mmNIC2_QM1_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7488 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7492 mask = 1U << ((mmNIC2_QM1_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7493 mask |= 1U << ((mmNIC2_QM1_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7494 mask |= 1U << ((mmNIC2_QM1_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7495 mask |= 1U << ((mmNIC2_QM1_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7496 mask |= 1U << ((mmNIC2_QM1_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7497 mask |= 1U << ((mmNIC2_QM1_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7498 mask |= 1U << ((mmNIC2_QM1_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7499 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7500 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7501 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7502 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7503 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7504 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7505 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7506 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7507 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7508 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7509 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7510 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7511 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7512 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7513 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7514 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7515 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7516 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7517 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7518 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7520 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7525 mask = 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7526 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7527 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7528 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7529 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7530 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7531 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7532 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7533 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7534 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7535 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7536 mask |= 1U << ((mmNIC2_QM1_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7537 mask |= 1U << ((mmNIC2_QM1_CGM_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7538 mask |= 1U << ((mmNIC2_QM1_CGM_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7539 mask |= 1U << ((mmNIC2_QM1_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7541 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7546 mask = 1U << ((mmNIC2_QM1_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7547 mask |= 1U << ((mmNIC2_QM1_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7548 mask |= 1U << ((mmNIC2_QM1_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7549 mask |= 1U << ((mmNIC2_QM1_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7550 mask |= 1U << ((mmNIC2_QM1_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7551 mask |= 1U << ((mmNIC2_QM1_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7552 mask |= 1U << ((mmNIC2_QM1_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7553 mask |= 1U << ((mmNIC2_QM1_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7554 mask |= 1U << ((mmNIC2_QM1_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7555 mask |= 1U << ((mmNIC2_QM1_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7556 mask |= 1U << ((mmNIC2_QM1_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7557 mask |= 1U << ((mmNIC2_QM1_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7558 mask |= 1U << ((mmNIC2_QM1_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7559 mask |= 1U << ((mmNIC2_QM1_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7560 mask |= 1U << ((mmNIC2_QM1_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7562 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7567 mask = 1U << ((mmNIC2_QM1_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7569 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7576 mask = 1U << ((mmNIC3_QM0_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7577 mask |= 1U << ((mmNIC3_QM0_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7578 mask |= 1U << ((mmNIC3_QM0_GLBL_PROT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7579 mask |= 1U << ((mmNIC3_QM0_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7580 mask |= 1U << ((mmNIC3_QM0_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7581 mask |= 1U << ((mmNIC3_QM0_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7582 mask |= 1U << ((mmNIC3_QM0_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7583 mask |= 1U << ((mmNIC3_QM0_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7584 mask |= 1U << ((mmNIC3_QM0_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7585 mask |= 1U << ((mmNIC3_QM0_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7586 mask |= 1U << ((mmNIC3_QM0_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7587 mask |= 1U << ((mmNIC3_QM0_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7588 mask |= 1U << ((mmNIC3_QM0_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7589 mask |= 1U << ((mmNIC3_QM0_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7590 mask |= 1U << ((mmNIC3_QM0_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7591 mask |= 1U << ((mmNIC3_QM0_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7592 mask |= 1U << ((mmNIC3_QM0_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7593 mask |= 1U << ((mmNIC3_QM0_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7594 mask |= 1U << ((mmNIC3_QM0_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7595 mask |= 1U << ((mmNIC3_QM0_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7596 mask |= 1U << ((mmNIC3_QM0_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7597 mask |= 1U << ((mmNIC3_QM0_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7598 mask |= 1U << ((mmNIC3_QM0_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7599 mask |= 1U << ((mmNIC3_QM0_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7600 mask |= 1U << ((mmNIC3_QM0_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7601 mask |= 1U << ((mmNIC3_QM0_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7602 mask |= 1U << ((mmNIC3_QM0_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7603 mask |= 1U << ((mmNIC3_QM0_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7604 mask |= 1U << ((mmNIC3_QM0_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7606 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7610 mask = 1U << ((mmNIC3_QM0_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7611 mask |= 1U << ((mmNIC3_QM0_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7612 mask |= 1U << ((mmNIC3_QM0_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7613 mask |= 1U << ((mmNIC3_QM0_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7614 mask |= 1U << ((mmNIC3_QM0_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7615 mask |= 1U << ((mmNIC3_QM0_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7616 mask |= 1U << ((mmNIC3_QM0_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7617 mask |= 1U << ((mmNIC3_QM0_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7618 mask |= 1U << ((mmNIC3_QM0_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7619 mask |= 1U << ((mmNIC3_QM0_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7620 mask |= 1U << ((mmNIC3_QM0_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7621 mask |= 1U << ((mmNIC3_QM0_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7622 mask |= 1U << ((mmNIC3_QM0_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7623 mask |= 1U << ((mmNIC3_QM0_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7624 mask |= 1U << ((mmNIC3_QM0_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7625 mask |= 1U << ((mmNIC3_QM0_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7626 mask |= 1U << ((mmNIC3_QM0_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7627 mask |= 1U << ((mmNIC3_QM0_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7628 mask |= 1U << ((mmNIC3_QM0_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7629 mask |= 1U << ((mmNIC3_QM0_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7630 mask |= 1U << ((mmNIC3_QM0_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7631 mask |= 1U << ((mmNIC3_QM0_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7632 mask |= 1U << ((mmNIC3_QM0_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7633 mask |= 1U << ((mmNIC3_QM0_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7634 mask |= 1U << ((mmNIC3_QM0_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7635 mask |= 1U << ((mmNIC3_QM0_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7636 mask |= 1U << ((mmNIC3_QM0_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7637 mask |= 1U << ((mmNIC3_QM0_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7638 mask |= 1U << ((mmNIC3_QM0_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7639 mask |= 1U << ((mmNIC3_QM0_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7640 mask |= 1U << ((mmNIC3_QM0_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7641 mask |= 1U << ((mmNIC3_QM0_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7643 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7647 mask = 1U << ((mmNIC3_QM0_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7648 mask |= 1U << ((mmNIC3_QM0_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7649 mask |= 1U << ((mmNIC3_QM0_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7650 mask |= 1U << ((mmNIC3_QM0_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7651 mask |= 1U << ((mmNIC3_QM0_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7652 mask |= 1U << ((mmNIC3_QM0_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7653 mask |= 1U << ((mmNIC3_QM0_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7654 mask |= 1U << ((mmNIC3_QM0_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7655 mask |= 1U << ((mmNIC3_QM0_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7656 mask |= 1U << ((mmNIC3_QM0_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7657 mask |= 1U << ((mmNIC3_QM0_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7658 mask |= 1U << ((mmNIC3_QM0_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7659 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7660 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7661 mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7663 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7667 mask = 1U << ((mmNIC3_QM0_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7668 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7669 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7670 mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7671 mask |= 1U << ((mmNIC3_QM0_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7672 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7673 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7674 mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7675 mask |= 1U << ((mmNIC3_QM0_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7676 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7677 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7678 mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7679 mask |= 1U << ((mmNIC3_QM0_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7680 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7681 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7682 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7683 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7684 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7685 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7686 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7687 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7688 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7689 mask |= 1U << ((mmNIC3_QM0_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7690 mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7691 mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7692 mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7693 mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7694 mask |= 1U << ((mmNIC3_QM0_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7696 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7700 mask = 1U << ((mmNIC3_QM0_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7701 mask |= 1U << ((mmNIC3_QM0_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7702 mask |= 1U << ((mmNIC3_QM0_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7703 mask |= 1U << ((mmNIC3_QM0_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7704 mask |= 1U << ((mmNIC3_QM0_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7705 mask |= 1U << ((mmNIC3_QM0_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7706 mask |= 1U << ((mmNIC3_QM0_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7707 mask |= 1U << ((mmNIC3_QM0_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7708 mask |= 1U << ((mmNIC3_QM0_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7709 mask |= 1U << ((mmNIC3_QM0_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7710 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7711 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7712 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7713 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7714 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7715 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7716 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7717 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7718 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7719 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7720 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7721 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7722 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7723 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7724 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7725 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7726 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7727 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7728 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7729 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7730 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7731 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7733 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7738 mask = 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7739 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7740 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7741 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7742 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7743 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7744 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7745 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7746 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7747 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7748 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7749 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7750 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7751 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7752 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7753 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7754 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7755 mask |= 1U << ((mmNIC3_QM0_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7756 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7757 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7758 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7759 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7760 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7761 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7762 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7763 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7764 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7765 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7766 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7767 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7768 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7770 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7776 mask = 1U << ((mmNIC3_QM0_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7777 mask |= 1U << ((mmNIC3_QM0_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7779 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7783 mask = 1U << ((mmNIC3_QM0_CP_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7784 mask |= 1U << ((mmNIC3_QM0_CP_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7785 mask |= 1U << ((mmNIC3_QM0_CP_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7786 mask |= 1U << ((mmNIC3_QM0_CP_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7787 mask |= 1U << ((mmNIC3_QM0_CP_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7788 mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7789 mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7790 mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7791 mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7792 mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7793 mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7794 mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7795 mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7796 mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7797 mask |= 1U << ((mmNIC3_QM0_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7798 mask |= 1U << ((mmNIC3_QM0_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7799 mask |= 1U << ((mmNIC3_QM0_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7800 mask |= 1U << ((mmNIC3_QM0_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7802 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7807 mask = 1U << ((mmNIC3_QM0_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7808 mask |= 1U << ((mmNIC3_QM0_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7809 mask |= 1U << ((mmNIC3_QM0_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7810 mask |= 1U << ((mmNIC3_QM0_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7812 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7816 mask = 1U << ((mmNIC3_QM0_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7817 mask |= 1U << ((mmNIC3_QM0_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7818 mask |= 1U << ((mmNIC3_QM0_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7819 mask |= 1U << ((mmNIC3_QM0_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7820 mask |= 1U << ((mmNIC3_QM0_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7821 mask |= 1U << ((mmNIC3_QM0_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7822 mask |= 1U << ((mmNIC3_QM0_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7823 mask |= 1U << ((mmNIC3_QM0_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7824 mask |= 1U << ((mmNIC3_QM0_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7825 mask |= 1U << ((mmNIC3_QM0_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7826 mask |= 1U << ((mmNIC3_QM0_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7827 mask |= 1U << ((mmNIC3_QM0_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7828 mask |= 1U << ((mmNIC3_QM0_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7830 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7834 mask = 1U << ((mmNIC3_QM0_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7835 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7836 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7837 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7838 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7839 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7840 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7841 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7842 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7843 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7844 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7845 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7846 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7847 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7848 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7849 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7850 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7851 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7852 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7853 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7854 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7855 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7856 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7857 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7858 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7860 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7865 mask = 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7866 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7867 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7868 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7869 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7870 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7871 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7872 mask |= 1U << ((mmNIC3_QM0_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7874 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7880 mask = 1U << ((mmNIC3_QM0_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7881 mask |= 1U << ((mmNIC3_QM0_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7882 mask |= 1U << ((mmNIC3_QM0_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7883 mask |= 1U << ((mmNIC3_QM0_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7884 mask |= 1U << ((mmNIC3_QM0_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7886 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7890 mask = 1U << ((mmNIC3_QM0_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7891 mask |= 1U << ((mmNIC3_QM0_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7892 mask |= 1U << ((mmNIC3_QM0_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7893 mask |= 1U << ((mmNIC3_QM0_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7894 mask |= 1U << ((mmNIC3_QM0_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7895 mask |= 1U << ((mmNIC3_QM0_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7896 mask |= 1U << ((mmNIC3_QM0_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7897 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7898 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7899 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7900 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7901 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7902 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7903 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7904 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7905 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7906 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7907 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7908 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7909 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7910 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7911 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7912 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7913 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7914 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7915 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7916 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7918 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7923 mask = 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7924 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7925 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7926 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7927 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7928 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7929 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7930 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7931 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7932 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7933 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7934 mask |= 1U << ((mmNIC3_QM0_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7935 mask |= 1U << ((mmNIC3_QM0_CGM_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7936 mask |= 1U << ((mmNIC3_QM0_CGM_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7937 mask |= 1U << ((mmNIC3_QM0_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7939 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7944 mask = 1U << ((mmNIC3_QM0_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7945 mask |= 1U << ((mmNIC3_QM0_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7946 mask |= 1U << ((mmNIC3_QM0_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7947 mask |= 1U << ((mmNIC3_QM0_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7948 mask |= 1U << ((mmNIC3_QM0_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7949 mask |= 1U << ((mmNIC3_QM0_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7950 mask |= 1U << ((mmNIC3_QM0_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7951 mask |= 1U << ((mmNIC3_QM0_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7952 mask |= 1U << ((mmNIC3_QM0_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7953 mask |= 1U << ((mmNIC3_QM0_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7954 mask |= 1U << ((mmNIC3_QM0_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7955 mask |= 1U << ((mmNIC3_QM0_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7956 mask |= 1U << ((mmNIC3_QM0_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7957 mask |= 1U << ((mmNIC3_QM0_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7958 mask |= 1U << ((mmNIC3_QM0_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7960 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7965 mask = 1U << ((mmNIC3_QM0_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7967 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
7971 mask = 1U << ((mmNIC3_QM1_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7972 mask |= 1U << ((mmNIC3_QM1_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7973 mask |= 1U << ((mmNIC3_QM1_GLBL_PROT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7974 mask |= 1U << ((mmNIC3_QM1_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7975 mask |= 1U << ((mmNIC3_QM1_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7976 mask |= 1U << ((mmNIC3_QM1_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7977 mask |= 1U << ((mmNIC3_QM1_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7978 mask |= 1U << ((mmNIC3_QM1_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7979 mask |= 1U << ((mmNIC3_QM1_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7980 mask |= 1U << ((mmNIC3_QM1_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7981 mask |= 1U << ((mmNIC3_QM1_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7982 mask |= 1U << ((mmNIC3_QM1_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7983 mask |= 1U << ((mmNIC3_QM1_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7984 mask |= 1U << ((mmNIC3_QM1_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7985 mask |= 1U << ((mmNIC3_QM1_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7986 mask |= 1U << ((mmNIC3_QM1_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7987 mask |= 1U << ((mmNIC3_QM1_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7988 mask |= 1U << ((mmNIC3_QM1_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7989 mask |= 1U << ((mmNIC3_QM1_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7990 mask |= 1U << ((mmNIC3_QM1_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7991 mask |= 1U << ((mmNIC3_QM1_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7992 mask |= 1U << ((mmNIC3_QM1_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7993 mask |= 1U << ((mmNIC3_QM1_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7994 mask |= 1U << ((mmNIC3_QM1_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7995 mask |= 1U << ((mmNIC3_QM1_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7996 mask |= 1U << ((mmNIC3_QM1_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7997 mask |= 1U << ((mmNIC3_QM1_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7998 mask |= 1U << ((mmNIC3_QM1_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
7999 mask |= 1U << ((mmNIC3_QM1_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8001 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8005 mask = 1U << ((mmNIC3_QM1_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8006 mask |= 1U << ((mmNIC3_QM1_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8007 mask |= 1U << ((mmNIC3_QM1_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8008 mask |= 1U << ((mmNIC3_QM1_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8009 mask |= 1U << ((mmNIC3_QM1_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8010 mask |= 1U << ((mmNIC3_QM1_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8011 mask |= 1U << ((mmNIC3_QM1_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8012 mask |= 1U << ((mmNIC3_QM1_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8013 mask |= 1U << ((mmNIC3_QM1_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8014 mask |= 1U << ((mmNIC3_QM1_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8015 mask |= 1U << ((mmNIC3_QM1_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8016 mask |= 1U << ((mmNIC3_QM1_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8017 mask |= 1U << ((mmNIC3_QM1_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8018 mask |= 1U << ((mmNIC3_QM1_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8019 mask |= 1U << ((mmNIC3_QM1_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8020 mask |= 1U << ((mmNIC3_QM1_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8021 mask |= 1U << ((mmNIC3_QM1_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8022 mask |= 1U << ((mmNIC3_QM1_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8023 mask |= 1U << ((mmNIC3_QM1_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8024 mask |= 1U << ((mmNIC3_QM1_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8025 mask |= 1U << ((mmNIC3_QM1_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8026 mask |= 1U << ((mmNIC3_QM1_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8027 mask |= 1U << ((mmNIC3_QM1_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8028 mask |= 1U << ((mmNIC3_QM1_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8029 mask |= 1U << ((mmNIC3_QM1_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8030 mask |= 1U << ((mmNIC3_QM1_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8031 mask |= 1U << ((mmNIC3_QM1_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8032 mask |= 1U << ((mmNIC3_QM1_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8033 mask |= 1U << ((mmNIC3_QM1_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8034 mask |= 1U << ((mmNIC3_QM1_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8035 mask |= 1U << ((mmNIC3_QM1_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8036 mask |= 1U << ((mmNIC3_QM1_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8038 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8042 mask = 1U << ((mmNIC3_QM1_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8043 mask |= 1U << ((mmNIC3_QM1_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8044 mask |= 1U << ((mmNIC3_QM1_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8045 mask |= 1U << ((mmNIC3_QM1_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8046 mask |= 1U << ((mmNIC3_QM1_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8047 mask |= 1U << ((mmNIC3_QM1_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8048 mask |= 1U << ((mmNIC3_QM1_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8049 mask |= 1U << ((mmNIC3_QM1_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8050 mask |= 1U << ((mmNIC3_QM1_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8051 mask |= 1U << ((mmNIC3_QM1_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8052 mask |= 1U << ((mmNIC3_QM1_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8053 mask |= 1U << ((mmNIC3_QM1_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8054 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8055 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8056 mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8058 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8062 mask = 1U << ((mmNIC3_QM1_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8063 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8064 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8065 mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8066 mask |= 1U << ((mmNIC3_QM1_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8067 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8068 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8069 mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8070 mask |= 1U << ((mmNIC3_QM1_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8071 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8072 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8073 mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8074 mask |= 1U << ((mmNIC3_QM1_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8075 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8076 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8077 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8078 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8079 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8080 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8081 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8082 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8083 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8084 mask |= 1U << ((mmNIC3_QM1_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8085 mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8086 mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8087 mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8088 mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8089 mask |= 1U << ((mmNIC3_QM1_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8091 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8095 mask = 1U << ((mmNIC3_QM1_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8096 mask |= 1U << ((mmNIC3_QM1_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8097 mask |= 1U << ((mmNIC3_QM1_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8098 mask |= 1U << ((mmNIC3_QM1_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8099 mask |= 1U << ((mmNIC3_QM1_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8100 mask |= 1U << ((mmNIC3_QM1_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8101 mask |= 1U << ((mmNIC3_QM1_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8102 mask |= 1U << ((mmNIC3_QM1_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8103 mask |= 1U << ((mmNIC3_QM1_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8104 mask |= 1U << ((mmNIC3_QM1_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8105 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8106 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8107 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8108 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8109 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8110 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8111 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8112 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8113 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8114 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8115 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8116 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8117 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8118 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8119 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8120 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8121 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8122 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8123 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8124 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8125 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8126 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8128 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8133 mask = 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8134 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8135 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8136 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8137 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8138 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8139 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8140 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8141 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8142 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8143 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8144 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8145 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8146 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8147 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8148 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8149 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8150 mask |= 1U << ((mmNIC3_QM1_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8151 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8152 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8153 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8154 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8155 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8156 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8157 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8158 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8159 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8160 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8161 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8162 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8163 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8165 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8171 mask = 1U << ((mmNIC3_QM1_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8172 mask |= 1U << ((mmNIC3_QM1_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8174 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8178 mask = 1U << ((mmNIC3_QM1_CP_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8179 mask |= 1U << ((mmNIC3_QM1_CP_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8180 mask |= 1U << ((mmNIC3_QM1_CP_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8181 mask |= 1U << ((mmNIC3_QM1_CP_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8182 mask |= 1U << ((mmNIC3_QM1_CP_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8183 mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8184 mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8185 mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8186 mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8187 mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8188 mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8189 mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8190 mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8191 mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8192 mask |= 1U << ((mmNIC3_QM1_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8193 mask |= 1U << ((mmNIC3_QM1_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8194 mask |= 1U << ((mmNIC3_QM1_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8195 mask |= 1U << ((mmNIC3_QM1_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8197 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8202 mask = 1U << ((mmNIC3_QM1_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8203 mask |= 1U << ((mmNIC3_QM1_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8204 mask |= 1U << ((mmNIC3_QM1_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8205 mask |= 1U << ((mmNIC3_QM1_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8207 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8211 mask = 1U << ((mmNIC3_QM1_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8212 mask |= 1U << ((mmNIC3_QM1_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8213 mask |= 1U << ((mmNIC3_QM1_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8214 mask |= 1U << ((mmNIC3_QM1_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8215 mask |= 1U << ((mmNIC3_QM1_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8216 mask |= 1U << ((mmNIC3_QM1_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8217 mask |= 1U << ((mmNIC3_QM1_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8218 mask |= 1U << ((mmNIC3_QM1_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8219 mask |= 1U << ((mmNIC3_QM1_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8220 mask |= 1U << ((mmNIC3_QM1_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8221 mask |= 1U << ((mmNIC3_QM1_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8222 mask |= 1U << ((mmNIC3_QM1_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8223 mask |= 1U << ((mmNIC3_QM1_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8225 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8229 mask = 1U << ((mmNIC3_QM1_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8230 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8231 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8232 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8233 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8234 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8235 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8236 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8237 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8238 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8239 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8240 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8241 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8242 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8243 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8244 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8245 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8246 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8247 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8248 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8249 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8250 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8251 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8252 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8253 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8255 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8260 mask = 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8261 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8262 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8263 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8264 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8265 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8266 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8267 mask |= 1U << ((mmNIC3_QM1_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8269 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8275 mask = 1U << ((mmNIC3_QM1_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8276 mask |= 1U << ((mmNIC3_QM1_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8277 mask |= 1U << ((mmNIC3_QM1_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8278 mask |= 1U << ((mmNIC3_QM1_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8279 mask |= 1U << ((mmNIC3_QM1_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8281 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8285 mask = 1U << ((mmNIC3_QM1_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8286 mask |= 1U << ((mmNIC3_QM1_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8287 mask |= 1U << ((mmNIC3_QM1_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8288 mask |= 1U << ((mmNIC3_QM1_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8289 mask |= 1U << ((mmNIC3_QM1_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8290 mask |= 1U << ((mmNIC3_QM1_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8291 mask |= 1U << ((mmNIC3_QM1_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8292 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8293 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8294 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8295 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8296 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8297 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8298 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8299 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8300 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8301 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8302 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8303 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8304 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8305 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8306 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8307 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8308 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8309 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8310 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8311 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8313 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8318 mask = 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8319 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8320 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8321 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8322 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8323 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8324 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8325 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8326 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8327 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8328 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8329 mask |= 1U << ((mmNIC3_QM1_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8330 mask |= 1U << ((mmNIC3_QM1_CGM_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8331 mask |= 1U << ((mmNIC3_QM1_CGM_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8332 mask |= 1U << ((mmNIC3_QM1_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8334 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8339 mask = 1U << ((mmNIC3_QM1_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8340 mask |= 1U << ((mmNIC3_QM1_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8341 mask |= 1U << ((mmNIC3_QM1_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8342 mask |= 1U << ((mmNIC3_QM1_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8343 mask |= 1U << ((mmNIC3_QM1_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8344 mask |= 1U << ((mmNIC3_QM1_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8345 mask |= 1U << ((mmNIC3_QM1_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8346 mask |= 1U << ((mmNIC3_QM1_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8347 mask |= 1U << ((mmNIC3_QM1_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8348 mask |= 1U << ((mmNIC3_QM1_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8349 mask |= 1U << ((mmNIC3_QM1_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8350 mask |= 1U << ((mmNIC3_QM1_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8351 mask |= 1U << ((mmNIC3_QM1_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8352 mask |= 1U << ((mmNIC3_QM1_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8353 mask |= 1U << ((mmNIC3_QM1_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8355 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8360 mask = 1U << ((mmNIC3_QM1_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8362 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8369 mask = 1U << ((mmNIC4_QM0_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8370 mask |= 1U << ((mmNIC4_QM0_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8371 mask |= 1U << ((mmNIC4_QM0_GLBL_PROT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8372 mask |= 1U << ((mmNIC4_QM0_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8373 mask |= 1U << ((mmNIC4_QM0_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8374 mask |= 1U << ((mmNIC4_QM0_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8375 mask |= 1U << ((mmNIC4_QM0_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8376 mask |= 1U << ((mmNIC4_QM0_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8377 mask |= 1U << ((mmNIC4_QM0_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8378 mask |= 1U << ((mmNIC4_QM0_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8379 mask |= 1U << ((mmNIC4_QM0_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8380 mask |= 1U << ((mmNIC4_QM0_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8381 mask |= 1U << ((mmNIC4_QM0_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8382 mask |= 1U << ((mmNIC4_QM0_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8383 mask |= 1U << ((mmNIC4_QM0_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8384 mask |= 1U << ((mmNIC4_QM0_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8385 mask |= 1U << ((mmNIC4_QM0_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8386 mask |= 1U << ((mmNIC4_QM0_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8387 mask |= 1U << ((mmNIC4_QM0_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8388 mask |= 1U << ((mmNIC4_QM0_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8389 mask |= 1U << ((mmNIC4_QM0_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8390 mask |= 1U << ((mmNIC4_QM0_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8391 mask |= 1U << ((mmNIC4_QM0_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8392 mask |= 1U << ((mmNIC4_QM0_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8393 mask |= 1U << ((mmNIC4_QM0_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8394 mask |= 1U << ((mmNIC4_QM0_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8395 mask |= 1U << ((mmNIC4_QM0_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8396 mask |= 1U << ((mmNIC4_QM0_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8397 mask |= 1U << ((mmNIC4_QM0_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8399 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8403 mask = 1U << ((mmNIC4_QM0_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8404 mask |= 1U << ((mmNIC4_QM0_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8405 mask |= 1U << ((mmNIC4_QM0_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8406 mask |= 1U << ((mmNIC4_QM0_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8407 mask |= 1U << ((mmNIC4_QM0_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8408 mask |= 1U << ((mmNIC4_QM0_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8409 mask |= 1U << ((mmNIC4_QM0_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8410 mask |= 1U << ((mmNIC4_QM0_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8411 mask |= 1U << ((mmNIC4_QM0_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8412 mask |= 1U << ((mmNIC4_QM0_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8413 mask |= 1U << ((mmNIC4_QM0_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8414 mask |= 1U << ((mmNIC4_QM0_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8415 mask |= 1U << ((mmNIC4_QM0_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8416 mask |= 1U << ((mmNIC4_QM0_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8417 mask |= 1U << ((mmNIC4_QM0_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8418 mask |= 1U << ((mmNIC4_QM0_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8419 mask |= 1U << ((mmNIC4_QM0_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8420 mask |= 1U << ((mmNIC4_QM0_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8421 mask |= 1U << ((mmNIC4_QM0_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8422 mask |= 1U << ((mmNIC4_QM0_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8423 mask |= 1U << ((mmNIC4_QM0_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8424 mask |= 1U << ((mmNIC4_QM0_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8425 mask |= 1U << ((mmNIC4_QM0_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8426 mask |= 1U << ((mmNIC4_QM0_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8427 mask |= 1U << ((mmNIC4_QM0_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8428 mask |= 1U << ((mmNIC4_QM0_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8429 mask |= 1U << ((mmNIC4_QM0_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8430 mask |= 1U << ((mmNIC4_QM0_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8431 mask |= 1U << ((mmNIC4_QM0_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8432 mask |= 1U << ((mmNIC4_QM0_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8433 mask |= 1U << ((mmNIC4_QM0_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8434 mask |= 1U << ((mmNIC4_QM0_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8436 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8440 mask = 1U << ((mmNIC4_QM0_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8441 mask |= 1U << ((mmNIC4_QM0_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8442 mask |= 1U << ((mmNIC4_QM0_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8443 mask |= 1U << ((mmNIC4_QM0_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8444 mask |= 1U << ((mmNIC4_QM0_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8445 mask |= 1U << ((mmNIC4_QM0_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8446 mask |= 1U << ((mmNIC4_QM0_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8447 mask |= 1U << ((mmNIC4_QM0_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8448 mask |= 1U << ((mmNIC4_QM0_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8449 mask |= 1U << ((mmNIC4_QM0_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8450 mask |= 1U << ((mmNIC4_QM0_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8451 mask |= 1U << ((mmNIC4_QM0_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8452 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8453 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8454 mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8456 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8460 mask = 1U << ((mmNIC4_QM0_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8461 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8462 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8463 mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8464 mask |= 1U << ((mmNIC4_QM0_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8465 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8466 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8467 mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8468 mask |= 1U << ((mmNIC4_QM0_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8469 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8470 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8471 mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8472 mask |= 1U << ((mmNIC4_QM0_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8473 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8474 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8475 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8476 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8477 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8478 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8479 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8480 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8481 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8482 mask |= 1U << ((mmNIC4_QM0_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8483 mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8484 mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8485 mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8486 mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8487 mask |= 1U << ((mmNIC4_QM0_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8489 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8493 mask = 1U << ((mmNIC4_QM0_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8494 mask |= 1U << ((mmNIC4_QM0_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8495 mask |= 1U << ((mmNIC4_QM0_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8496 mask |= 1U << ((mmNIC4_QM0_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8497 mask |= 1U << ((mmNIC4_QM0_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8498 mask |= 1U << ((mmNIC4_QM0_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8499 mask |= 1U << ((mmNIC4_QM0_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8500 mask |= 1U << ((mmNIC4_QM0_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8501 mask |= 1U << ((mmNIC4_QM0_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8502 mask |= 1U << ((mmNIC4_QM0_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8503 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8504 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8505 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8506 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8507 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8508 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8509 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8510 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8511 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8512 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8513 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8514 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8515 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8516 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8517 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8518 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8519 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8520 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8521 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8522 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8523 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8524 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8526 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8531 mask = 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8532 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8533 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8534 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8535 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8536 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8537 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8538 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8539 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8540 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8541 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8542 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8543 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8544 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8545 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8546 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8547 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8548 mask |= 1U << ((mmNIC4_QM0_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8549 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8550 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8551 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8552 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8553 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8554 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8555 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8556 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8557 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8558 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8559 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8560 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8561 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8563 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8569 mask = 1U << ((mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8570 mask |= 1U << ((mmNIC4_QM0_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8572 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8576 mask = 1U << ((mmNIC4_QM0_CP_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8577 mask |= 1U << ((mmNIC4_QM0_CP_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8578 mask |= 1U << ((mmNIC4_QM0_CP_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8579 mask |= 1U << ((mmNIC4_QM0_CP_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8580 mask |= 1U << ((mmNIC4_QM0_CP_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8581 mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8582 mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8583 mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8584 mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8585 mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8586 mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8587 mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8588 mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8589 mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8590 mask |= 1U << ((mmNIC4_QM0_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8591 mask |= 1U << ((mmNIC4_QM0_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8592 mask |= 1U << ((mmNIC4_QM0_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8593 mask |= 1U << ((mmNIC4_QM0_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8595 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8600 mask = 1U << ((mmNIC4_QM0_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8601 mask |= 1U << ((mmNIC4_QM0_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8602 mask |= 1U << ((mmNIC4_QM0_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8603 mask |= 1U << ((mmNIC4_QM0_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8605 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8609 mask = 1U << ((mmNIC4_QM0_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8610 mask |= 1U << ((mmNIC4_QM0_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8611 mask |= 1U << ((mmNIC4_QM0_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8612 mask |= 1U << ((mmNIC4_QM0_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8613 mask |= 1U << ((mmNIC4_QM0_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8614 mask |= 1U << ((mmNIC4_QM0_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8615 mask |= 1U << ((mmNIC4_QM0_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8616 mask |= 1U << ((mmNIC4_QM0_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8617 mask |= 1U << ((mmNIC4_QM0_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8618 mask |= 1U << ((mmNIC4_QM0_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8619 mask |= 1U << ((mmNIC4_QM0_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8620 mask |= 1U << ((mmNIC4_QM0_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8621 mask |= 1U << ((mmNIC4_QM0_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8623 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8627 mask = 1U << ((mmNIC4_QM0_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8628 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8629 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8630 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8631 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8632 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8633 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8634 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8635 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8636 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8637 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8638 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8639 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8640 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8641 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8642 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8643 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8644 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8645 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8646 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8647 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8648 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8649 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8650 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8651 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8653 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8658 mask = 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8659 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8660 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8661 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8662 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8663 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8664 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8665 mask |= 1U << ((mmNIC4_QM0_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8667 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8673 mask = 1U << ((mmNIC4_QM0_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8674 mask |= 1U << ((mmNIC4_QM0_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8675 mask |= 1U << ((mmNIC4_QM0_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8676 mask |= 1U << ((mmNIC4_QM0_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8677 mask |= 1U << ((mmNIC4_QM0_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8679 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8683 mask = 1U << ((mmNIC4_QM0_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8684 mask |= 1U << ((mmNIC4_QM0_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8685 mask |= 1U << ((mmNIC4_QM0_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8686 mask |= 1U << ((mmNIC4_QM0_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8687 mask |= 1U << ((mmNIC4_QM0_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8688 mask |= 1U << ((mmNIC4_QM0_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8689 mask |= 1U << ((mmNIC4_QM0_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8690 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8691 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8692 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8693 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8694 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8695 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8696 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8697 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8698 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8699 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8700 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8701 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8702 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8703 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8704 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8705 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8706 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8707 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8708 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8709 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8711 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8716 mask = 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8717 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8718 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8719 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8720 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8721 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8722 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8723 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8724 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8725 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8726 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8727 mask |= 1U << ((mmNIC4_QM0_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8728 mask |= 1U << ((mmNIC4_QM0_CGM_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8729 mask |= 1U << ((mmNIC4_QM0_CGM_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8730 mask |= 1U << ((mmNIC4_QM0_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8732 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8737 mask = 1U << ((mmNIC4_QM0_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8738 mask |= 1U << ((mmNIC4_QM0_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8739 mask |= 1U << ((mmNIC4_QM0_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8740 mask |= 1U << ((mmNIC4_QM0_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8741 mask |= 1U << ((mmNIC4_QM0_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8742 mask |= 1U << ((mmNIC4_QM0_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8743 mask |= 1U << ((mmNIC4_QM0_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8744 mask |= 1U << ((mmNIC4_QM0_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8745 mask |= 1U << ((mmNIC4_QM0_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8746 mask |= 1U << ((mmNIC4_QM0_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8747 mask |= 1U << ((mmNIC4_QM0_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8748 mask |= 1U << ((mmNIC4_QM0_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8749 mask |= 1U << ((mmNIC4_QM0_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8750 mask |= 1U << ((mmNIC4_QM0_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8751 mask |= 1U << ((mmNIC4_QM0_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8753 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8758 mask = 1U << ((mmNIC4_QM0_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8760 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8764 mask = 1U << ((mmNIC4_QM1_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8765 mask |= 1U << ((mmNIC4_QM1_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8766 mask |= 1U << ((mmNIC4_QM1_GLBL_PROT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8767 mask |= 1U << ((mmNIC4_QM1_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8768 mask |= 1U << ((mmNIC4_QM1_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8769 mask |= 1U << ((mmNIC4_QM1_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8770 mask |= 1U << ((mmNIC4_QM1_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8771 mask |= 1U << ((mmNIC4_QM1_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8772 mask |= 1U << ((mmNIC4_QM1_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8773 mask |= 1U << ((mmNIC4_QM1_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8774 mask |= 1U << ((mmNIC4_QM1_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8775 mask |= 1U << ((mmNIC4_QM1_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8776 mask |= 1U << ((mmNIC4_QM1_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8777 mask |= 1U << ((mmNIC4_QM1_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8778 mask |= 1U << ((mmNIC4_QM1_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8779 mask |= 1U << ((mmNIC4_QM1_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8780 mask |= 1U << ((mmNIC4_QM1_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8781 mask |= 1U << ((mmNIC4_QM1_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8782 mask |= 1U << ((mmNIC4_QM1_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8783 mask |= 1U << ((mmNIC4_QM1_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8784 mask |= 1U << ((mmNIC4_QM1_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8785 mask |= 1U << ((mmNIC4_QM1_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8786 mask |= 1U << ((mmNIC4_QM1_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8787 mask |= 1U << ((mmNIC4_QM1_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8788 mask |= 1U << ((mmNIC4_QM1_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8789 mask |= 1U << ((mmNIC4_QM1_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8790 mask |= 1U << ((mmNIC4_QM1_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8791 mask |= 1U << ((mmNIC4_QM1_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8792 mask |= 1U << ((mmNIC4_QM1_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8794 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8798 mask = 1U << ((mmNIC4_QM1_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8799 mask |= 1U << ((mmNIC4_QM1_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8800 mask |= 1U << ((mmNIC4_QM1_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8801 mask |= 1U << ((mmNIC4_QM1_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8802 mask |= 1U << ((mmNIC4_QM1_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8803 mask |= 1U << ((mmNIC4_QM1_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8804 mask |= 1U << ((mmNIC4_QM1_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8805 mask |= 1U << ((mmNIC4_QM1_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8806 mask |= 1U << ((mmNIC4_QM1_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8807 mask |= 1U << ((mmNIC4_QM1_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8808 mask |= 1U << ((mmNIC4_QM1_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8809 mask |= 1U << ((mmNIC4_QM1_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8810 mask |= 1U << ((mmNIC4_QM1_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8811 mask |= 1U << ((mmNIC4_QM1_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8812 mask |= 1U << ((mmNIC4_QM1_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8813 mask |= 1U << ((mmNIC4_QM1_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8814 mask |= 1U << ((mmNIC4_QM1_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8815 mask |= 1U << ((mmNIC4_QM1_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8816 mask |= 1U << ((mmNIC4_QM1_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8817 mask |= 1U << ((mmNIC4_QM1_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8818 mask |= 1U << ((mmNIC4_QM1_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8819 mask |= 1U << ((mmNIC4_QM1_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8820 mask |= 1U << ((mmNIC4_QM1_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8821 mask |= 1U << ((mmNIC4_QM1_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8822 mask |= 1U << ((mmNIC4_QM1_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8823 mask |= 1U << ((mmNIC4_QM1_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8824 mask |= 1U << ((mmNIC4_QM1_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8825 mask |= 1U << ((mmNIC4_QM1_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8826 mask |= 1U << ((mmNIC4_QM1_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8827 mask |= 1U << ((mmNIC4_QM1_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8828 mask |= 1U << ((mmNIC4_QM1_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8829 mask |= 1U << ((mmNIC4_QM1_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8831 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8835 mask = 1U << ((mmNIC4_QM1_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8836 mask |= 1U << ((mmNIC4_QM1_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8837 mask |= 1U << ((mmNIC4_QM1_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8838 mask |= 1U << ((mmNIC4_QM1_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8839 mask |= 1U << ((mmNIC4_QM1_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8840 mask |= 1U << ((mmNIC4_QM1_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8841 mask |= 1U << ((mmNIC4_QM1_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8842 mask |= 1U << ((mmNIC4_QM1_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8843 mask |= 1U << ((mmNIC4_QM1_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8844 mask |= 1U << ((mmNIC4_QM1_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8845 mask |= 1U << ((mmNIC4_QM1_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8846 mask |= 1U << ((mmNIC4_QM1_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8847 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8848 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8849 mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8851 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8855 mask = 1U << ((mmNIC4_QM1_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8856 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8857 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8858 mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8859 mask |= 1U << ((mmNIC4_QM1_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8860 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8861 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8862 mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8863 mask |= 1U << ((mmNIC4_QM1_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8864 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8865 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8866 mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8867 mask |= 1U << ((mmNIC4_QM1_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8868 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8869 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8870 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8871 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8872 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8873 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8874 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8875 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8876 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8877 mask |= 1U << ((mmNIC4_QM1_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8878 mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8879 mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8880 mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8881 mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8882 mask |= 1U << ((mmNIC4_QM1_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8884 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8888 mask = 1U << ((mmNIC4_QM1_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8889 mask |= 1U << ((mmNIC4_QM1_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8890 mask |= 1U << ((mmNIC4_QM1_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8891 mask |= 1U << ((mmNIC4_QM1_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8892 mask |= 1U << ((mmNIC4_QM1_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8893 mask |= 1U << ((mmNIC4_QM1_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8894 mask |= 1U << ((mmNIC4_QM1_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8895 mask |= 1U << ((mmNIC4_QM1_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8896 mask |= 1U << ((mmNIC4_QM1_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8897 mask |= 1U << ((mmNIC4_QM1_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8898 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8899 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8900 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8901 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8902 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8903 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8904 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8905 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8906 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8907 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8908 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8909 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8910 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8911 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8912 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8913 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8914 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8915 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8916 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8917 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8918 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8919 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8921 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8926 mask = 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8927 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8928 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8929 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8930 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8931 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8932 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8933 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8934 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8935 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8936 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8937 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8938 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8939 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8940 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8941 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8942 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8943 mask |= 1U << ((mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8944 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8945 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8946 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8947 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8948 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8949 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8950 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8951 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8952 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8953 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8954 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8955 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8956 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8958 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8964 mask = 1U << ((mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8965 mask |= 1U << ((mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8967 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8971 mask = 1U << ((mmNIC4_QM1_CP_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8972 mask |= 1U << ((mmNIC4_QM1_CP_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8973 mask |= 1U << ((mmNIC4_QM1_CP_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8974 mask |= 1U << ((mmNIC4_QM1_CP_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8975 mask |= 1U << ((mmNIC4_QM1_CP_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8976 mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8977 mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8978 mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8979 mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8980 mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8981 mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8982 mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8983 mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8984 mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8985 mask |= 1U << ((mmNIC4_QM1_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8986 mask |= 1U << ((mmNIC4_QM1_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8987 mask |= 1U << ((mmNIC4_QM1_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8988 mask |= 1U << ((mmNIC4_QM1_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8990 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
8995 mask = 1U << ((mmNIC4_QM1_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8996 mask |= 1U << ((mmNIC4_QM1_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8997 mask |= 1U << ((mmNIC4_QM1_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
8998 mask |= 1U << ((mmNIC4_QM1_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9000 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
9004 mask = 1U << ((mmNIC4_QM1_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9005 mask |= 1U << ((mmNIC4_QM1_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9006 mask |= 1U << ((mmNIC4_QM1_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9007 mask |= 1U << ((mmNIC4_QM1_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9008 mask |= 1U << ((mmNIC4_QM1_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9009 mask |= 1U << ((mmNIC4_QM1_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9010 mask |= 1U << ((mmNIC4_QM1_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9011 mask |= 1U << ((mmNIC4_QM1_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9012 mask |= 1U << ((mmNIC4_QM1_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9013 mask |= 1U << ((mmNIC4_QM1_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9014 mask |= 1U << ((mmNIC4_QM1_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9015 mask |= 1U << ((mmNIC4_QM1_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9016 mask |= 1U << ((mmNIC4_QM1_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9018 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
9022 mask = 1U << ((mmNIC4_QM1_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9023 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9024 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9025 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9026 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9027 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9028 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9029 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9030 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9031 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9032 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9033 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9034 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9035 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9036 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9037 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9038 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9039 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9040 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9041 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9042 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9043 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9044 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9045 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9046 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9048 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
9053 mask = 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9054 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9055 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9056 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9057 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9058 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9059 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9060 mask |= 1U << ((mmNIC4_QM1_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9062 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
9068 mask = 1U << ((mmNIC4_QM1_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9069 mask |= 1U << ((mmNIC4_QM1_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9070 mask |= 1U << ((mmNIC4_QM1_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9071 mask |= 1U << ((mmNIC4_QM1_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9072 mask |= 1U << ((mmNIC4_QM1_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9074 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
9078 mask = 1U << ((mmNIC4_QM1_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9079 mask |= 1U << ((mmNIC4_QM1_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9080 mask |= 1U << ((mmNIC4_QM1_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9081 mask |= 1U << ((mmNIC4_QM1_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9082 mask |= 1U << ((mmNIC4_QM1_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9083 mask |= 1U << ((mmNIC4_QM1_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9084 mask |= 1U << ((mmNIC4_QM1_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9085 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9086 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9087 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9088 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9089 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9090 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9091 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9092 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9093 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9094 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9095 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9096 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9097 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9098 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9099 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9100 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9101 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9102 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9103 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9104 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9106 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
9111 mask = 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9112 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9113 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9114 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9115 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9116 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9117 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9118 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9119 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9120 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9121 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9122 mask |= 1U << ((mmNIC4_QM1_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9123 mask |= 1U << ((mmNIC4_QM1_CGM_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9124 mask |= 1U << ((mmNIC4_QM1_CGM_STS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9125 mask |= 1U << ((mmNIC4_QM1_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9127 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
9132 mask = 1U << ((mmNIC4_QM1_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9133 mask |= 1U << ((mmNIC4_QM1_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9134 mask |= 1U << ((mmNIC4_QM1_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9135 mask |= 1U << ((mmNIC4_QM1_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9136 mask |= 1U << ((mmNIC4_QM1_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9137 mask |= 1U << ((mmNIC4_QM1_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9138 mask |= 1U << ((mmNIC4_QM1_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9139 mask |= 1U << ((mmNIC4_QM1_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9140 mask |= 1U << ((mmNIC4_QM1_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9141 mask |= 1U << ((mmNIC4_QM1_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9142 mask |= 1U << ((mmNIC4_QM1_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9143 mask |= 1U << ((mmNIC4_QM1_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9144 mask |= 1U << ((mmNIC4_QM1_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9145 mask |= 1U << ((mmNIC4_QM1_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9146 mask |= 1U << ((mmNIC4_QM1_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9148 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
9153 mask = 1U << ((mmNIC4_QM1_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_nic_protection_bits()
9155 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_nic_protection_bits()
9160 u32 pb_addr, mask; in gaudi_init_tpc_protection_bits() local
9179 mask = 1U << ((mmTPC0_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9180 mask |= 1U << ((mmTPC0_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9181 mask |= 1U << ((mmTPC0_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9182 mask |= 1U << ((mmTPC0_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9183 mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9184 mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9185 mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9186 mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9187 mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9188 mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9189 mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9190 mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9191 mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9192 mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9193 mask |= 1U << ((mmTPC0_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9194 mask |= 1U << ((mmTPC0_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9195 mask |= 1U << ((mmTPC0_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9196 mask |= 1U << ((mmTPC0_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9197 mask |= 1U << ((mmTPC0_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9198 mask |= 1U << ((mmTPC0_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9199 mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9200 mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9201 mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9202 mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9203 mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9204 mask |= 1U << ((mmTPC0_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9205 mask |= 1U << ((mmTPC0_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9206 mask |= 1U << ((mmTPC0_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9207 mask |= 1U << ((mmTPC0_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9209 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9213 mask = 1U << ((mmTPC0_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9214 mask |= 1U << ((mmTPC0_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9215 mask |= 1U << ((mmTPC0_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9216 mask |= 1U << ((mmTPC0_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9217 mask |= 1U << ((mmTPC0_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9218 mask |= 1U << ((mmTPC0_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9219 mask |= 1U << ((mmTPC0_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9220 mask |= 1U << ((mmTPC0_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9221 mask |= 1U << ((mmTPC0_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9222 mask |= 1U << ((mmTPC0_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9223 mask |= 1U << ((mmTPC0_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9224 mask |= 1U << ((mmTPC0_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9225 mask |= 1U << ((mmTPC0_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9226 mask |= 1U << ((mmTPC0_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9227 mask |= 1U << ((mmTPC0_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9228 mask |= 1U << ((mmTPC0_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9229 mask |= 1U << ((mmTPC0_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9230 mask |= 1U << ((mmTPC0_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9231 mask |= 1U << ((mmTPC0_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9232 mask |= 1U << ((mmTPC0_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9233 mask |= 1U << ((mmTPC0_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9234 mask |= 1U << ((mmTPC0_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9235 mask |= 1U << ((mmTPC0_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9236 mask |= 1U << ((mmTPC0_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9237 mask |= 1U << ((mmTPC0_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9238 mask |= 1U << ((mmTPC0_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9239 mask |= 1U << ((mmTPC0_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9240 mask |= 1U << ((mmTPC0_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9241 mask |= 1U << ((mmTPC0_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9242 mask |= 1U << ((mmTPC0_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9243 mask |= 1U << ((mmTPC0_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9244 mask |= 1U << ((mmTPC0_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9246 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9250 mask = 1U << ((mmTPC0_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9251 mask |= 1U << ((mmTPC0_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9252 mask |= 1U << ((mmTPC0_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9253 mask |= 1U << ((mmTPC0_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9254 mask |= 1U << ((mmTPC0_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9255 mask |= 1U << ((mmTPC0_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9256 mask |= 1U << ((mmTPC0_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9257 mask |= 1U << ((mmTPC0_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9258 mask |= 1U << ((mmTPC0_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9259 mask |= 1U << ((mmTPC0_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9260 mask |= 1U << ((mmTPC0_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9261 mask |= 1U << ((mmTPC0_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9262 mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9263 mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9264 mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9266 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9270 mask = 1U << ((mmTPC0_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9271 mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9272 mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9273 mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9274 mask |= 1U << ((mmTPC0_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9275 mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9276 mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9277 mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9278 mask |= 1U << ((mmTPC0_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9279 mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9280 mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9281 mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9282 mask |= 1U << ((mmTPC0_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9283 mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9284 mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9285 mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9286 mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9287 mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9288 mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9289 mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9290 mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9291 mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9292 mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9293 mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9294 mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9295 mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9296 mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9297 mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9299 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9303 mask = 1U << ((mmTPC0_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9304 mask |= 1U << ((mmTPC0_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9305 mask |= 1U << ((mmTPC0_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9306 mask |= 1U << ((mmTPC0_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9307 mask |= 1U << ((mmTPC0_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9308 mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9309 mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9310 mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9311 mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9312 mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9313 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9314 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9315 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9316 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9317 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9318 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9319 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9320 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9321 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9322 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9323 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9324 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9325 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9326 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9327 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9328 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9329 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9330 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9331 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9332 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9333 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9334 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9336 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9341 mask = 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9342 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9343 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9344 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9345 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9346 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9347 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9348 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9349 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9350 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9351 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9352 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9353 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9354 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9355 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9356 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9357 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9358 mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9359 mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9360 mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9361 mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9362 mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9363 mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9364 mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9365 mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9366 mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9367 mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9368 mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9369 mask |= 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9370 mask |= 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9371 mask |= 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9373 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9381 mask = 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9382 mask |= 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9384 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9388 mask = 1U << ((mmTPC0_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9389 mask |= 1U << ((mmTPC0_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9390 mask |= 1U << ((mmTPC0_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9391 mask |= 1U << ((mmTPC0_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9392 mask |= 1U << ((mmTPC0_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9393 mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9394 mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9395 mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9396 mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9397 mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9398 mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9399 mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9400 mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9401 mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9402 mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9403 mask |= 1U << ((mmTPC0_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9404 mask |= 1U << ((mmTPC0_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9405 mask |= 1U << ((mmTPC0_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9407 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9411 mask = 1U << ((mmTPC0_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9412 mask |= 1U << ((mmTPC0_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9413 mask |= 1U << ((mmTPC0_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9414 mask |= 1U << ((mmTPC0_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9416 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9420 mask = 1U << ((mmTPC0_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9421 mask |= 1U << ((mmTPC0_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9422 mask |= 1U << ((mmTPC0_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9423 mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9424 mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9425 mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9426 mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9427 mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9428 mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9429 mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9430 mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9431 mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9432 mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9434 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9438 mask = 1U << ((mmTPC0_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9439 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9440 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9441 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9442 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9443 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9444 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9445 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9446 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9447 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9448 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9449 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9450 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9451 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9452 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9453 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9454 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9455 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9456 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9457 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9458 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9459 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9460 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9461 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9462 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9464 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9469 mask = 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9470 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9471 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9472 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9473 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9474 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9475 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9476 mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9478 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9485 mask = 1U << ((mmTPC0_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9486 mask |= 1U << ((mmTPC0_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9487 mask |= 1U << ((mmTPC0_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9488 mask |= 1U << ((mmTPC0_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9489 mask |= 1U << ((mmTPC0_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9491 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9495 mask = 1U << ((mmTPC0_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9496 mask |= 1U << ((mmTPC0_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9497 mask |= 1U << ((mmTPC0_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9498 mask |= 1U << ((mmTPC0_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9499 mask |= 1U << ((mmTPC0_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9500 mask |= 1U << ((mmTPC0_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9501 mask |= 1U << ((mmTPC0_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9502 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9503 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9504 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9505 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9506 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9507 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9508 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9509 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9510 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9511 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9512 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9513 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9514 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9515 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9516 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9517 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9518 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9519 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9520 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9521 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9523 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9528 mask = 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9529 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9530 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9531 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9532 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9533 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9534 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9535 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9536 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9537 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9538 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9539 mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9540 mask |= 1U << ((mmTPC0_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9541 mask |= 1U << ((mmTPC0_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9542 mask |= 1U << ((mmTPC0_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9544 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9548 mask = 1U << ((mmTPC0_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9549 mask |= 1U << ((mmTPC0_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9550 mask |= 1U << ((mmTPC0_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9551 mask |= 1U << ((mmTPC0_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9552 mask |= 1U << ((mmTPC0_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9553 mask |= 1U << ((mmTPC0_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9554 mask |= 1U << ((mmTPC0_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9555 mask |= 1U << ((mmTPC0_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9556 mask |= 1U << ((mmTPC0_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9557 mask |= 1U << ((mmTPC0_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9558 mask |= 1U << ((mmTPC0_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9559 mask |= 1U << ((mmTPC0_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9560 mask |= 1U << ((mmTPC0_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9561 mask |= 1U << ((mmTPC0_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9562 mask |= 1U << ((mmTPC0_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9564 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9569 mask = 1U << ((mmTPC0_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9571 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9575 mask = 1U << ((mmTPC0_CFG_ROUND_CSR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9577 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9581 mask = 1U << ((mmTPC0_CFG_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9582 mask |= 1U << ((mmTPC0_CFG_VFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9583 mask |= 1U << ((mmTPC0_CFG_SFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9584 mask |= 1U << ((mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9585 mask |= 1U << ((mmTPC0_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9586 mask |= 1U << ((mmTPC0_CFG_TPC_STALL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9587 mask |= 1U << ((mmTPC0_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9588 mask |= 1U << ((mmTPC0_CFG_RD_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9589 mask |= 1U << ((mmTPC0_CFG_WR_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9590 mask |= 1U << ((mmTPC0_CFG_MSS_CONFIG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9591 mask |= 1U << ((mmTPC0_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9592 mask |= 1U << ((mmTPC0_CFG_TPC_INTR_MASK & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9593 mask |= 1U << ((mmTPC0_CFG_WQ_CREDITS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9594 mask |= 1U << ((mmTPC0_CFG_ARUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9595 mask |= 1U << ((mmTPC0_CFG_ARUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9596 mask |= 1U << ((mmTPC0_CFG_AWUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9597 mask |= 1U << ((mmTPC0_CFG_AWUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9598 mask |= 1U << ((mmTPC0_CFG_OPCODE_EXEC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9600 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9605 mask = 1U << ((mmTPC0_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9606 mask |= 1U << ((mmTPC0_CFG_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9607 mask |= 1U << ((mmTPC0_CFG_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9608 mask |= 1U << ((mmTPC0_CFG_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9609 mask |= 1U << ((mmTPC0_CFG_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9610 mask |= 1U << ((mmTPC0_CFG_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9611 mask |= 1U << ((mmTPC0_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9612 mask |= 1U << ((mmTPC0_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9613 mask |= 1U << ((mmTPC0_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9614 mask |= 1U << ((mmTPC0_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9615 mask |= 1U << ((mmTPC0_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9616 mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9617 mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9618 mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9619 mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9620 mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9621 mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9622 mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9623 mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9624 mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9625 mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9626 mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9627 mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9629 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9636 mask = 1U << ((mmTPC1_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9637 mask |= 1U << ((mmTPC1_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9638 mask |= 1U << ((mmTPC1_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9639 mask |= 1U << ((mmTPC1_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9640 mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9641 mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9642 mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9643 mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9644 mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9645 mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9646 mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9647 mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9648 mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9649 mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9650 mask |= 1U << ((mmTPC1_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9651 mask |= 1U << ((mmTPC1_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9652 mask |= 1U << ((mmTPC1_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9653 mask |= 1U << ((mmTPC1_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9654 mask |= 1U << ((mmTPC1_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9655 mask |= 1U << ((mmTPC1_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9656 mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9657 mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9658 mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9659 mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9660 mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9661 mask |= 1U << ((mmTPC1_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9662 mask |= 1U << ((mmTPC1_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9663 mask |= 1U << ((mmTPC1_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9664 mask |= 1U << ((mmTPC1_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9666 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9670 mask = 1U << ((mmTPC1_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9671 mask |= 1U << ((mmTPC1_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9672 mask |= 1U << ((mmTPC1_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9673 mask |= 1U << ((mmTPC1_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9674 mask |= 1U << ((mmTPC1_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9675 mask |= 1U << ((mmTPC1_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9676 mask |= 1U << ((mmTPC1_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9677 mask |= 1U << ((mmTPC1_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9678 mask |= 1U << ((mmTPC1_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9679 mask |= 1U << ((mmTPC1_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9680 mask |= 1U << ((mmTPC1_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9681 mask |= 1U << ((mmTPC1_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9682 mask |= 1U << ((mmTPC1_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9683 mask |= 1U << ((mmTPC1_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9684 mask |= 1U << ((mmTPC1_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9685 mask |= 1U << ((mmTPC1_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9686 mask |= 1U << ((mmTPC1_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9687 mask |= 1U << ((mmTPC1_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9688 mask |= 1U << ((mmTPC1_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9689 mask |= 1U << ((mmTPC1_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9690 mask |= 1U << ((mmTPC1_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9691 mask |= 1U << ((mmTPC1_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9692 mask |= 1U << ((mmTPC1_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9693 mask |= 1U << ((mmTPC1_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9694 mask |= 1U << ((mmTPC1_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9695 mask |= 1U << ((mmTPC1_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9696 mask |= 1U << ((mmTPC1_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9697 mask |= 1U << ((mmTPC1_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9698 mask |= 1U << ((mmTPC1_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9699 mask |= 1U << ((mmTPC1_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9700 mask |= 1U << ((mmTPC1_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9701 mask |= 1U << ((mmTPC1_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9703 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9707 mask = 1U << ((mmTPC1_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9708 mask |= 1U << ((mmTPC1_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9709 mask |= 1U << ((mmTPC1_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9710 mask |= 1U << ((mmTPC1_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9711 mask |= 1U << ((mmTPC1_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9712 mask |= 1U << ((mmTPC1_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9713 mask |= 1U << ((mmTPC1_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9714 mask |= 1U << ((mmTPC1_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9715 mask |= 1U << ((mmTPC1_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9716 mask |= 1U << ((mmTPC1_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9717 mask |= 1U << ((mmTPC1_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9718 mask |= 1U << ((mmTPC1_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9719 mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9720 mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9721 mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9723 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9727 mask = 1U << ((mmTPC1_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9728 mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9729 mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9730 mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9731 mask |= 1U << ((mmTPC1_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9732 mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9733 mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9734 mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9735 mask |= 1U << ((mmTPC1_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9736 mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9737 mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9738 mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9739 mask |= 1U << ((mmTPC1_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9740 mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9741 mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9742 mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9743 mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9744 mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9745 mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9746 mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9747 mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9748 mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9749 mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9750 mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9751 mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9752 mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9753 mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9754 mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9756 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9760 mask = 1U << ((mmTPC1_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9761 mask |= 1U << ((mmTPC1_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9762 mask |= 1U << ((mmTPC1_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9763 mask |= 1U << ((mmTPC1_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9764 mask |= 1U << ((mmTPC1_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9765 mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9766 mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9767 mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9768 mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9769 mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9770 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9771 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9772 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9773 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9774 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9775 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9776 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9777 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9778 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9779 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9780 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9781 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9782 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9783 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9784 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9785 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9786 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9787 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9788 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9789 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9790 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9791 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9793 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9798 mask = 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9799 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9800 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9801 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9802 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9803 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9804 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9805 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9806 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9807 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9808 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9809 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9810 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9811 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9812 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9813 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9814 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9815 mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9816 mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9817 mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9818 mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9819 mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9820 mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9821 mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9822 mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9823 mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9824 mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9825 mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9826 mask |= 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9827 mask |= 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9828 mask |= 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9830 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9836 mask = 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9837 mask |= 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9839 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9843 mask = 1U << ((mmTPC1_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9844 mask |= 1U << ((mmTPC1_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9845 mask |= 1U << ((mmTPC1_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9846 mask |= 1U << ((mmTPC1_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9847 mask |= 1U << ((mmTPC1_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9848 mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9849 mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9850 mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9851 mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9852 mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9853 mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9854 mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9855 mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9856 mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9857 mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9858 mask |= 1U << ((mmTPC1_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9859 mask |= 1U << ((mmTPC1_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9860 mask |= 1U << ((mmTPC1_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9862 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9866 mask = 1U << ((mmTPC1_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9867 mask |= 1U << ((mmTPC1_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9868 mask |= 1U << ((mmTPC1_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9869 mask |= 1U << ((mmTPC1_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9871 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9875 mask = 1U << ((mmTPC1_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9876 mask |= 1U << ((mmTPC1_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9877 mask |= 1U << ((mmTPC1_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9878 mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9879 mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9880 mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9881 mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9882 mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9883 mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9884 mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9885 mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9886 mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9887 mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9889 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9893 mask = 1U << ((mmTPC1_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9894 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9895 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9896 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9897 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9898 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9899 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9900 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9901 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9902 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9903 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9904 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9905 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9906 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9907 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9908 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9909 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9910 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9911 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9912 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9913 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9914 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9915 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9916 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9917 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9919 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9924 mask = 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9925 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9926 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9927 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9928 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9929 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9930 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9931 mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9933 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9940 mask = 1U << ((mmTPC1_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9941 mask |= 1U << ((mmTPC1_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9942 mask |= 1U << ((mmTPC1_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9943 mask |= 1U << ((mmTPC1_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9944 mask |= 1U << ((mmTPC1_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9946 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9950 mask = 1U << ((mmTPC1_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9951 mask |= 1U << ((mmTPC1_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9952 mask |= 1U << ((mmTPC1_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9953 mask |= 1U << ((mmTPC1_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9954 mask |= 1U << ((mmTPC1_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9955 mask |= 1U << ((mmTPC1_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9956 mask |= 1U << ((mmTPC1_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9957 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9958 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9959 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9960 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9961 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9962 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9963 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9964 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9965 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9966 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9967 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9968 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9969 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9970 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9971 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9972 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9973 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9974 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9975 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9976 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9978 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
9983 mask = 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9984 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9985 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9986 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9987 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9988 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9989 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9990 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9991 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9992 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9993 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9994 mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9995 mask |= 1U << ((mmTPC1_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9996 mask |= 1U << ((mmTPC1_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9997 mask |= 1U << ((mmTPC1_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
9999 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10003 mask = 1U << ((mmTPC1_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10004 mask |= 1U << ((mmTPC1_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10005 mask |= 1U << ((mmTPC1_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10006 mask |= 1U << ((mmTPC1_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10007 mask |= 1U << ((mmTPC1_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10008 mask |= 1U << ((mmTPC1_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10009 mask |= 1U << ((mmTPC1_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10010 mask |= 1U << ((mmTPC1_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10011 mask |= 1U << ((mmTPC1_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10012 mask |= 1U << ((mmTPC1_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10013 mask |= 1U << ((mmTPC1_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10014 mask |= 1U << ((mmTPC1_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10015 mask |= 1U << ((mmTPC1_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10016 mask |= 1U << ((mmTPC1_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10017 mask |= 1U << ((mmTPC1_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10019 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10024 mask = 1U << ((mmTPC1_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10026 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10030 mask = 1U << ((mmTPC1_CFG_ROUND_CSR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10032 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10036 mask = 1U << ((mmTPC1_CFG_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10037 mask |= 1U << ((mmTPC1_CFG_VFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10038 mask |= 1U << ((mmTPC1_CFG_SFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10039 mask |= 1U << ((mmTPC1_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10040 mask |= 1U << ((mmTPC1_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10041 mask |= 1U << ((mmTPC1_CFG_TPC_STALL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10042 mask |= 1U << ((mmTPC1_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10043 mask |= 1U << ((mmTPC1_CFG_RD_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10044 mask |= 1U << ((mmTPC1_CFG_WR_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10045 mask |= 1U << ((mmTPC1_CFG_MSS_CONFIG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10046 mask |= 1U << ((mmTPC1_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10047 mask |= 1U << ((mmTPC1_CFG_TPC_INTR_MASK & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10048 mask |= 1U << ((mmTPC1_CFG_WQ_CREDITS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10049 mask |= 1U << ((mmTPC1_CFG_ARUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10050 mask |= 1U << ((mmTPC1_CFG_ARUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10051 mask |= 1U << ((mmTPC1_CFG_AWUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10052 mask |= 1U << ((mmTPC1_CFG_AWUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10053 mask |= 1U << ((mmTPC1_CFG_OPCODE_EXEC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10055 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10060 mask = 1U << ((mmTPC1_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10061 mask |= 1U << ((mmTPC1_CFG_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10062 mask |= 1U << ((mmTPC1_CFG_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10063 mask |= 1U << ((mmTPC1_CFG_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10064 mask |= 1U << ((mmTPC1_CFG_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10065 mask |= 1U << ((mmTPC1_CFG_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10066 mask |= 1U << ((mmTPC1_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10067 mask |= 1U << ((mmTPC1_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10068 mask |= 1U << ((mmTPC1_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10069 mask |= 1U << ((mmTPC1_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10070 mask |= 1U << ((mmTPC1_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10071 mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10072 mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10073 mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10074 mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10075 mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10076 mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10077 mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10078 mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10079 mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10080 mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10081 mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10082 mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10084 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10091 mask = 1U << ((mmTPC2_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10092 mask |= 1U << ((mmTPC2_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10093 mask |= 1U << ((mmTPC2_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10094 mask |= 1U << ((mmTPC2_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10095 mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10096 mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10097 mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10098 mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10099 mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10100 mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10101 mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10102 mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10103 mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10104 mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10105 mask |= 1U << ((mmTPC2_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10106 mask |= 1U << ((mmTPC2_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10107 mask |= 1U << ((mmTPC2_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10108 mask |= 1U << ((mmTPC2_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10109 mask |= 1U << ((mmTPC2_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10110 mask |= 1U << ((mmTPC2_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10111 mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10112 mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10113 mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10114 mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10115 mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10116 mask |= 1U << ((mmTPC2_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10117 mask |= 1U << ((mmTPC2_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10118 mask |= 1U << ((mmTPC2_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10119 mask |= 1U << ((mmTPC2_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10121 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10125 mask = 1U << ((mmTPC2_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10126 mask |= 1U << ((mmTPC2_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10127 mask |= 1U << ((mmTPC2_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10128 mask |= 1U << ((mmTPC2_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10129 mask |= 1U << ((mmTPC2_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10130 mask |= 1U << ((mmTPC2_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10131 mask |= 1U << ((mmTPC2_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10132 mask |= 1U << ((mmTPC2_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10133 mask |= 1U << ((mmTPC2_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10134 mask |= 1U << ((mmTPC2_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10135 mask |= 1U << ((mmTPC2_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10136 mask |= 1U << ((mmTPC2_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10137 mask |= 1U << ((mmTPC2_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10138 mask |= 1U << ((mmTPC2_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10139 mask |= 1U << ((mmTPC2_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10140 mask |= 1U << ((mmTPC2_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10141 mask |= 1U << ((mmTPC2_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10142 mask |= 1U << ((mmTPC2_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10143 mask |= 1U << ((mmTPC2_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10144 mask |= 1U << ((mmTPC2_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10145 mask |= 1U << ((mmTPC2_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10146 mask |= 1U << ((mmTPC2_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10147 mask |= 1U << ((mmTPC2_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10148 mask |= 1U << ((mmTPC2_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10149 mask |= 1U << ((mmTPC2_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10150 mask |= 1U << ((mmTPC2_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10151 mask |= 1U << ((mmTPC2_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10152 mask |= 1U << ((mmTPC2_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10153 mask |= 1U << ((mmTPC2_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10154 mask |= 1U << ((mmTPC2_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10155 mask |= 1U << ((mmTPC2_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10156 mask |= 1U << ((mmTPC2_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10158 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10162 mask = 1U << ((mmTPC2_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10163 mask |= 1U << ((mmTPC2_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10164 mask |= 1U << ((mmTPC2_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10165 mask |= 1U << ((mmTPC2_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10166 mask |= 1U << ((mmTPC2_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10167 mask |= 1U << ((mmTPC2_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10168 mask |= 1U << ((mmTPC2_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10169 mask |= 1U << ((mmTPC2_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10170 mask |= 1U << ((mmTPC2_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10171 mask |= 1U << ((mmTPC2_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10172 mask |= 1U << ((mmTPC2_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10173 mask |= 1U << ((mmTPC2_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10174 mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10175 mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10176 mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10178 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10182 mask = 1U << ((mmTPC2_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10183 mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10184 mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10185 mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10186 mask |= 1U << ((mmTPC2_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10187 mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10188 mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10189 mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10190 mask |= 1U << ((mmTPC2_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10191 mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10192 mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10193 mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10194 mask |= 1U << ((mmTPC2_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10195 mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10196 mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10197 mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10198 mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10199 mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10200 mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10201 mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10202 mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10203 mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10204 mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10205 mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10206 mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10207 mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10208 mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10209 mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10211 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10215 mask = 1U << ((mmTPC2_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10216 mask |= 1U << ((mmTPC2_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10217 mask |= 1U << ((mmTPC2_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10218 mask |= 1U << ((mmTPC2_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10219 mask |= 1U << ((mmTPC2_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10220 mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10221 mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10222 mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10223 mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10224 mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10225 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10226 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10227 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10228 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10229 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10230 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10231 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10232 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10233 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10234 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10235 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10236 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10237 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10238 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10239 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10240 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10241 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10242 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10243 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10244 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10245 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10246 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10248 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10253 mask = 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10254 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10255 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10256 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10257 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10258 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10259 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10260 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10261 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10262 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10263 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10264 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10265 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10266 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10267 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10268 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10269 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10270 mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10271 mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10272 mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10273 mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10274 mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10275 mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10276 mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10277 mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10278 mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10279 mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10280 mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10281 mask |= 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10282 mask |= 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10283 mask |= 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10285 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10291 mask = 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10292 mask |= 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10294 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10298 mask = 1U << ((mmTPC2_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10299 mask |= 1U << ((mmTPC2_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10300 mask |= 1U << ((mmTPC2_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10301 mask |= 1U << ((mmTPC2_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10302 mask |= 1U << ((mmTPC2_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10303 mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10304 mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10305 mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10306 mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10307 mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10308 mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10309 mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10310 mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10311 mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10312 mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10313 mask |= 1U << ((mmTPC2_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10314 mask |= 1U << ((mmTPC2_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10315 mask |= 1U << ((mmTPC2_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10317 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10321 mask = 1U << ((mmTPC2_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10322 mask |= 1U << ((mmTPC2_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10323 mask |= 1U << ((mmTPC2_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10324 mask |= 1U << ((mmTPC2_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10326 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10330 mask = 1U << ((mmTPC2_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10331 mask |= 1U << ((mmTPC2_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10332 mask |= 1U << ((mmTPC2_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10333 mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10334 mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10335 mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10336 mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10337 mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10338 mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10339 mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10340 mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10341 mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10342 mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10344 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10348 mask = 1U << ((mmTPC2_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10349 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10350 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10351 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10352 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10353 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10354 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10355 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10356 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10357 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10358 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10359 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10360 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10361 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10362 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10363 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10364 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10365 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10366 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10367 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10368 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10369 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10370 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10371 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10372 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10374 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10379 mask = 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10380 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10381 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10382 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10383 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10384 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10385 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10386 mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10388 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10394 mask = 1U << ((mmTPC2_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10395 mask |= 1U << ((mmTPC2_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10396 mask |= 1U << ((mmTPC2_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10397 mask |= 1U << ((mmTPC2_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10398 mask |= 1U << ((mmTPC2_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10400 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10404 mask = 1U << ((mmTPC2_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10405 mask |= 1U << ((mmTPC2_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10406 mask |= 1U << ((mmTPC2_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10407 mask |= 1U << ((mmTPC2_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10408 mask |= 1U << ((mmTPC2_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10409 mask |= 1U << ((mmTPC2_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10410 mask |= 1U << ((mmTPC2_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10411 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10412 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10413 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10414 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10415 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10416 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10417 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10418 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10419 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10420 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10421 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10422 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10423 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10424 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10425 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10426 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10427 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10428 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10429 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10430 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10432 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10437 mask = 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10438 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10439 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10440 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10441 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10442 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10443 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10444 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10445 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10446 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10447 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10448 mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10449 mask |= 1U << ((mmTPC2_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10450 mask |= 1U << ((mmTPC2_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10451 mask |= 1U << ((mmTPC2_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10453 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10457 mask = 1U << ((mmTPC2_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10458 mask |= 1U << ((mmTPC2_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10459 mask |= 1U << ((mmTPC2_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10460 mask |= 1U << ((mmTPC2_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10461 mask |= 1U << ((mmTPC2_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10462 mask |= 1U << ((mmTPC2_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10463 mask |= 1U << ((mmTPC2_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10464 mask |= 1U << ((mmTPC2_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10465 mask |= 1U << ((mmTPC2_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10466 mask |= 1U << ((mmTPC2_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10467 mask |= 1U << ((mmTPC2_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10468 mask |= 1U << ((mmTPC2_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10469 mask |= 1U << ((mmTPC2_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10470 mask |= 1U << ((mmTPC2_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10471 mask |= 1U << ((mmTPC2_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10473 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10478 mask = 1U << ((mmTPC2_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10480 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10484 mask = 1U << ((mmTPC2_CFG_ROUND_CSR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10486 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10490 mask = 1U << ((mmTPC2_CFG_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10491 mask |= 1U << ((mmTPC2_CFG_VFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10492 mask |= 1U << ((mmTPC2_CFG_SFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10493 mask |= 1U << ((mmTPC2_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10494 mask |= 1U << ((mmTPC2_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10495 mask |= 1U << ((mmTPC2_CFG_TPC_STALL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10496 mask |= 1U << ((mmTPC2_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10497 mask |= 1U << ((mmTPC2_CFG_RD_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10498 mask |= 1U << ((mmTPC2_CFG_WR_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10499 mask |= 1U << ((mmTPC2_CFG_MSS_CONFIG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10500 mask |= 1U << ((mmTPC2_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10501 mask |= 1U << ((mmTPC2_CFG_TPC_INTR_MASK & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10502 mask |= 1U << ((mmTPC2_CFG_WQ_CREDITS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10503 mask |= 1U << ((mmTPC2_CFG_ARUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10504 mask |= 1U << ((mmTPC2_CFG_ARUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10505 mask |= 1U << ((mmTPC2_CFG_AWUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10506 mask |= 1U << ((mmTPC2_CFG_AWUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10507 mask |= 1U << ((mmTPC2_CFG_OPCODE_EXEC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10509 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10514 mask = 1U << ((mmTPC2_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10515 mask |= 1U << ((mmTPC2_CFG_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10516 mask |= 1U << ((mmTPC2_CFG_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10517 mask |= 1U << ((mmTPC2_CFG_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10518 mask |= 1U << ((mmTPC2_CFG_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10519 mask |= 1U << ((mmTPC2_CFG_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10520 mask |= 1U << ((mmTPC2_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10521 mask |= 1U << ((mmTPC2_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10522 mask |= 1U << ((mmTPC2_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10523 mask |= 1U << ((mmTPC2_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10524 mask |= 1U << ((mmTPC2_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10525 mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10526 mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10527 mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10528 mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10529 mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10530 mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10531 mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10532 mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10533 mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10534 mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10535 mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10536 mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10538 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10545 mask = 1U << ((mmTPC3_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10546 mask |= 1U << ((mmTPC3_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10547 mask |= 1U << ((mmTPC3_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10548 mask |= 1U << ((mmTPC3_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10549 mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10550 mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10551 mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10552 mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10553 mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10554 mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10555 mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10556 mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10557 mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10558 mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10559 mask |= 1U << ((mmTPC3_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10560 mask |= 1U << ((mmTPC3_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10561 mask |= 1U << ((mmTPC3_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10562 mask |= 1U << ((mmTPC3_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10563 mask |= 1U << ((mmTPC3_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10564 mask |= 1U << ((mmTPC3_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10565 mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10566 mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10567 mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10568 mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10569 mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10570 mask |= 1U << ((mmTPC3_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10571 mask |= 1U << ((mmTPC3_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10572 mask |= 1U << ((mmTPC3_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10573 mask |= 1U << ((mmTPC3_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10575 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10579 mask = 1U << ((mmTPC3_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10580 mask |= 1U << ((mmTPC3_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10581 mask |= 1U << ((mmTPC3_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10582 mask |= 1U << ((mmTPC3_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10583 mask |= 1U << ((mmTPC3_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10584 mask |= 1U << ((mmTPC3_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10585 mask |= 1U << ((mmTPC3_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10586 mask |= 1U << ((mmTPC3_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10587 mask |= 1U << ((mmTPC3_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10588 mask |= 1U << ((mmTPC3_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10589 mask |= 1U << ((mmTPC3_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10590 mask |= 1U << ((mmTPC3_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10591 mask |= 1U << ((mmTPC3_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10592 mask |= 1U << ((mmTPC3_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10593 mask |= 1U << ((mmTPC3_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10594 mask |= 1U << ((mmTPC3_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10595 mask |= 1U << ((mmTPC3_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10596 mask |= 1U << ((mmTPC3_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10597 mask |= 1U << ((mmTPC3_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10598 mask |= 1U << ((mmTPC3_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10599 mask |= 1U << ((mmTPC3_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10600 mask |= 1U << ((mmTPC3_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10601 mask |= 1U << ((mmTPC3_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10602 mask |= 1U << ((mmTPC3_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10603 mask |= 1U << ((mmTPC3_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10604 mask |= 1U << ((mmTPC3_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10605 mask |= 1U << ((mmTPC3_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10606 mask |= 1U << ((mmTPC3_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10607 mask |= 1U << ((mmTPC3_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10608 mask |= 1U << ((mmTPC3_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10609 mask |= 1U << ((mmTPC3_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10610 mask |= 1U << ((mmTPC3_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10612 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10616 mask = 1U << ((mmTPC3_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10617 mask |= 1U << ((mmTPC3_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10618 mask |= 1U << ((mmTPC3_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10619 mask |= 1U << ((mmTPC3_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10620 mask |= 1U << ((mmTPC3_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10621 mask |= 1U << ((mmTPC3_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10622 mask |= 1U << ((mmTPC3_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10623 mask |= 1U << ((mmTPC3_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10624 mask |= 1U << ((mmTPC3_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10625 mask |= 1U << ((mmTPC3_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10626 mask |= 1U << ((mmTPC3_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10627 mask |= 1U << ((mmTPC3_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10628 mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10629 mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10630 mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10632 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10636 mask = 1U << ((mmTPC3_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10637 mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10638 mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10639 mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10640 mask |= 1U << ((mmTPC3_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10641 mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10642 mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10643 mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10644 mask |= 1U << ((mmTPC3_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10645 mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10646 mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10647 mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10648 mask |= 1U << ((mmTPC3_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10649 mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10650 mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10651 mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10652 mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10653 mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10654 mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10655 mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10656 mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10657 mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10658 mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10659 mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10660 mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10661 mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10662 mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10663 mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10665 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10669 mask = 1U << ((mmTPC3_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10670 mask |= 1U << ((mmTPC3_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10671 mask |= 1U << ((mmTPC3_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10672 mask |= 1U << ((mmTPC3_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10673 mask |= 1U << ((mmTPC3_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10674 mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10675 mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10676 mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10677 mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10678 mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10679 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10680 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10681 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10682 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10683 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10684 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10685 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10686 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10687 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10688 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10689 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10690 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10691 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10692 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10693 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10694 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10695 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10696 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10697 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10698 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10699 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10700 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10702 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10707 mask = 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10708 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10709 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10710 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10711 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10712 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10713 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10714 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10715 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10716 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10717 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10718 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10719 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10720 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10721 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10722 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10723 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10724 mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10725 mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10726 mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10727 mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10728 mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10729 mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10730 mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10731 mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10732 mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10733 mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10734 mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10735 mask |= 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10736 mask |= 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10737 mask |= 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10739 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10745 mask = 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10746 mask |= 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10748 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10752 mask = 1U << ((mmTPC3_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10753 mask |= 1U << ((mmTPC3_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10754 mask |= 1U << ((mmTPC3_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10755 mask |= 1U << ((mmTPC3_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10756 mask |= 1U << ((mmTPC3_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10757 mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10758 mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10759 mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10760 mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10761 mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10762 mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10763 mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10764 mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10765 mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10766 mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10767 mask |= 1U << ((mmTPC3_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10768 mask |= 1U << ((mmTPC3_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10769 mask |= 1U << ((mmTPC3_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10771 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10775 mask = 1U << ((mmTPC3_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10776 mask |= 1U << ((mmTPC3_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10777 mask |= 1U << ((mmTPC3_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10778 mask |= 1U << ((mmTPC3_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10780 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10784 mask = 1U << ((mmTPC3_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10785 mask |= 1U << ((mmTPC3_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10786 mask |= 1U << ((mmTPC3_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10787 mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10788 mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10789 mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10790 mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10791 mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10792 mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10793 mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10794 mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10795 mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10796 mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10798 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10802 mask = 1U << ((mmTPC3_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10803 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10804 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10805 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10806 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10807 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10808 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10809 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10810 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10811 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10812 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10813 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10814 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10815 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10816 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10817 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10818 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10819 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10820 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10821 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10822 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10823 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10824 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10825 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10826 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10828 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10833 mask = 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10834 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10835 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10836 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10837 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10838 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10839 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10840 mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10842 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10848 mask = 1U << ((mmTPC3_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10849 mask |= 1U << ((mmTPC3_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10850 mask |= 1U << ((mmTPC3_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10851 mask |= 1U << ((mmTPC3_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10852 mask |= 1U << ((mmTPC3_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10854 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10858 mask = 1U << ((mmTPC3_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10859 mask |= 1U << ((mmTPC3_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10860 mask |= 1U << ((mmTPC3_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10861 mask |= 1U << ((mmTPC3_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10862 mask |= 1U << ((mmTPC3_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10863 mask |= 1U << ((mmTPC3_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10864 mask |= 1U << ((mmTPC3_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10865 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10866 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10867 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10868 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10869 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10870 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10871 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10872 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10873 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10874 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10875 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10876 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10877 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10878 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10879 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10880 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10881 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10882 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10883 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10884 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10886 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10891 mask = 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10892 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10893 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10894 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10895 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10896 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10897 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10898 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10899 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10900 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10901 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10902 mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10903 mask |= 1U << ((mmTPC3_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10904 mask |= 1U << ((mmTPC3_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10905 mask |= 1U << ((mmTPC3_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10907 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10911 mask = 1U << ((mmTPC3_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10912 mask |= 1U << ((mmTPC3_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10913 mask |= 1U << ((mmTPC3_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10914 mask |= 1U << ((mmTPC3_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10915 mask |= 1U << ((mmTPC3_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10916 mask |= 1U << ((mmTPC3_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10917 mask |= 1U << ((mmTPC3_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10918 mask |= 1U << ((mmTPC3_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10919 mask |= 1U << ((mmTPC3_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10920 mask |= 1U << ((mmTPC3_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10921 mask |= 1U << ((mmTPC3_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10922 mask |= 1U << ((mmTPC3_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10923 mask |= 1U << ((mmTPC3_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10924 mask |= 1U << ((mmTPC3_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10925 mask |= 1U << ((mmTPC3_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10927 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10932 mask = 1U << ((mmTPC3_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10934 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10938 mask = 1U << ((mmTPC3_CFG_ROUND_CSR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10940 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10944 mask = 1U << ((mmTPC3_CFG_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10945 mask |= 1U << ((mmTPC3_CFG_VFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10946 mask |= 1U << ((mmTPC3_CFG_SFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10947 mask |= 1U << ((mmTPC3_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10948 mask |= 1U << ((mmTPC3_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10949 mask |= 1U << ((mmTPC3_CFG_TPC_STALL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10950 mask |= 1U << ((mmTPC3_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10951 mask |= 1U << ((mmTPC3_CFG_RD_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10952 mask |= 1U << ((mmTPC3_CFG_WR_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10953 mask |= 1U << ((mmTPC3_CFG_MSS_CONFIG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10954 mask |= 1U << ((mmTPC3_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10955 mask |= 1U << ((mmTPC3_CFG_TPC_INTR_MASK & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10956 mask |= 1U << ((mmTPC3_CFG_WQ_CREDITS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10957 mask |= 1U << ((mmTPC3_CFG_ARUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10958 mask |= 1U << ((mmTPC3_CFG_ARUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10959 mask |= 1U << ((mmTPC3_CFG_AWUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10960 mask |= 1U << ((mmTPC3_CFG_AWUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10961 mask |= 1U << ((mmTPC3_CFG_OPCODE_EXEC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10963 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10968 mask = 1U << ((mmTPC3_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10969 mask |= 1U << ((mmTPC3_CFG_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10970 mask |= 1U << ((mmTPC3_CFG_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10971 mask |= 1U << ((mmTPC3_CFG_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10972 mask |= 1U << ((mmTPC3_CFG_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10973 mask |= 1U << ((mmTPC3_CFG_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10974 mask |= 1U << ((mmTPC3_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10975 mask |= 1U << ((mmTPC3_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10976 mask |= 1U << ((mmTPC3_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10977 mask |= 1U << ((mmTPC3_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10978 mask |= 1U << ((mmTPC3_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10979 mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10980 mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10981 mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10982 mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10983 mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10984 mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10985 mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10986 mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10987 mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10988 mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10989 mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10990 mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
10992 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
10999 mask = 1U << ((mmTPC4_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11000 mask |= 1U << ((mmTPC4_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11001 mask |= 1U << ((mmTPC4_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11002 mask |= 1U << ((mmTPC4_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11003 mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11004 mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11005 mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11006 mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11007 mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11008 mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11009 mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11010 mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11011 mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11012 mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11013 mask |= 1U << ((mmTPC4_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11014 mask |= 1U << ((mmTPC4_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11015 mask |= 1U << ((mmTPC4_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11016 mask |= 1U << ((mmTPC4_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11017 mask |= 1U << ((mmTPC4_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11018 mask |= 1U << ((mmTPC4_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11019 mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11020 mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11021 mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11022 mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11023 mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11024 mask |= 1U << ((mmTPC4_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11025 mask |= 1U << ((mmTPC4_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11026 mask |= 1U << ((mmTPC4_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11027 mask |= 1U << ((mmTPC4_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11029 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11033 mask = 1U << ((mmTPC4_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11034 mask |= 1U << ((mmTPC4_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11035 mask |= 1U << ((mmTPC4_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11036 mask |= 1U << ((mmTPC4_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11037 mask |= 1U << ((mmTPC4_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11038 mask |= 1U << ((mmTPC4_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11039 mask |= 1U << ((mmTPC4_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11040 mask |= 1U << ((mmTPC4_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11041 mask |= 1U << ((mmTPC4_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11042 mask |= 1U << ((mmTPC4_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11043 mask |= 1U << ((mmTPC4_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11044 mask |= 1U << ((mmTPC4_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11045 mask |= 1U << ((mmTPC4_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11046 mask |= 1U << ((mmTPC4_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11047 mask |= 1U << ((mmTPC4_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11048 mask |= 1U << ((mmTPC4_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11049 mask |= 1U << ((mmTPC4_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11050 mask |= 1U << ((mmTPC4_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11051 mask |= 1U << ((mmTPC4_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11052 mask |= 1U << ((mmTPC4_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11053 mask |= 1U << ((mmTPC4_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11054 mask |= 1U << ((mmTPC4_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11055 mask |= 1U << ((mmTPC4_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11056 mask |= 1U << ((mmTPC4_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11057 mask |= 1U << ((mmTPC4_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11058 mask |= 1U << ((mmTPC4_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11059 mask |= 1U << ((mmTPC4_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11060 mask |= 1U << ((mmTPC4_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11061 mask |= 1U << ((mmTPC4_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11062 mask |= 1U << ((mmTPC4_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11063 mask |= 1U << ((mmTPC4_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11064 mask |= 1U << ((mmTPC4_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11066 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11070 mask = 1U << ((mmTPC4_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11071 mask |= 1U << ((mmTPC4_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11072 mask |= 1U << ((mmTPC4_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11073 mask |= 1U << ((mmTPC4_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11074 mask |= 1U << ((mmTPC4_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11075 mask |= 1U << ((mmTPC4_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11076 mask |= 1U << ((mmTPC4_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11077 mask |= 1U << ((mmTPC4_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11078 mask |= 1U << ((mmTPC4_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11079 mask |= 1U << ((mmTPC4_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11080 mask |= 1U << ((mmTPC4_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11081 mask |= 1U << ((mmTPC4_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11082 mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11083 mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11084 mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11086 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11090 mask = 1U << ((mmTPC4_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11091 mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11092 mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11093 mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11094 mask |= 1U << ((mmTPC4_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11095 mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11096 mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11097 mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11098 mask |= 1U << ((mmTPC4_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11099 mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11100 mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11101 mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11102 mask |= 1U << ((mmTPC4_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11103 mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11104 mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11105 mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11106 mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11107 mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11108 mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11109 mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11110 mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11111 mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11112 mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11113 mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11114 mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11115 mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11116 mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11117 mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11119 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11123 mask = 1U << ((mmTPC4_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11124 mask |= 1U << ((mmTPC4_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11125 mask |= 1U << ((mmTPC4_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11126 mask |= 1U << ((mmTPC4_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11127 mask |= 1U << ((mmTPC4_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11128 mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11129 mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11130 mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11131 mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11132 mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11133 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11134 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11135 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11136 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11137 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11138 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11139 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11140 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11141 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11142 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11143 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11144 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11145 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11146 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11147 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11148 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11149 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11150 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11151 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11152 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11153 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11154 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11156 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11161 mask = 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11162 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11163 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11164 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11165 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11166 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11167 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11168 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11169 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11170 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11171 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11172 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11173 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11174 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11175 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11176 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11177 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11178 mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11179 mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11180 mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11181 mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11182 mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11183 mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11184 mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11185 mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11186 mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11187 mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11188 mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11189 mask |= 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11190 mask |= 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11191 mask |= 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11193 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11199 mask = 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11200 mask |= 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11202 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11206 mask = 1U << ((mmTPC4_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11207 mask |= 1U << ((mmTPC4_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11208 mask |= 1U << ((mmTPC4_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11209 mask |= 1U << ((mmTPC4_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11210 mask |= 1U << ((mmTPC4_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11211 mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11212 mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11213 mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11214 mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11215 mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11216 mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11217 mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11218 mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11219 mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11220 mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11221 mask |= 1U << ((mmTPC4_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11222 mask |= 1U << ((mmTPC4_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11223 mask |= 1U << ((mmTPC4_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11225 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11229 mask = 1U << ((mmTPC4_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11230 mask |= 1U << ((mmTPC4_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11231 mask |= 1U << ((mmTPC4_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11232 mask |= 1U << ((mmTPC4_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11234 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11238 mask = 1U << ((mmTPC4_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11239 mask |= 1U << ((mmTPC4_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11240 mask |= 1U << ((mmTPC4_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11241 mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11242 mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11243 mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11244 mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11245 mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11246 mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11247 mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11248 mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11249 mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11250 mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11252 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11256 mask = 1U << ((mmTPC4_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11257 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11258 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11259 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11260 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11261 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11262 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11263 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11264 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11265 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11266 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11267 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11268 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11269 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11270 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11271 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11272 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11273 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11274 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11275 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11276 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11277 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11278 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11279 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11280 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11282 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11287 mask = 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11288 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11289 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11290 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11291 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11292 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11293 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11294 mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11296 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11302 mask = 1U << ((mmTPC4_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11303 mask |= 1U << ((mmTPC4_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11304 mask |= 1U << ((mmTPC4_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11305 mask |= 1U << ((mmTPC4_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11306 mask |= 1U << ((mmTPC4_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11308 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11312 mask = 1U << ((mmTPC4_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11313 mask |= 1U << ((mmTPC4_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11314 mask |= 1U << ((mmTPC4_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11315 mask |= 1U << ((mmTPC4_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11316 mask |= 1U << ((mmTPC4_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11317 mask |= 1U << ((mmTPC4_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11318 mask |= 1U << ((mmTPC4_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11319 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11320 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11321 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11322 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11323 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11324 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11325 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11326 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11327 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11328 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11329 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11330 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11331 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11332 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11333 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11334 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11335 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11336 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11337 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11338 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11340 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11345 mask = 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11346 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11347 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11348 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11349 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11350 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11351 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11352 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11353 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11354 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11355 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11356 mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11357 mask |= 1U << ((mmTPC4_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11358 mask |= 1U << ((mmTPC4_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11359 mask |= 1U << ((mmTPC4_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11361 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11365 mask = 1U << ((mmTPC4_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11366 mask |= 1U << ((mmTPC4_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11367 mask |= 1U << ((mmTPC4_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11368 mask |= 1U << ((mmTPC4_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11369 mask |= 1U << ((mmTPC4_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11370 mask |= 1U << ((mmTPC4_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11371 mask |= 1U << ((mmTPC4_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11372 mask |= 1U << ((mmTPC4_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11373 mask |= 1U << ((mmTPC4_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11374 mask |= 1U << ((mmTPC4_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11375 mask |= 1U << ((mmTPC4_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11376 mask |= 1U << ((mmTPC4_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11377 mask |= 1U << ((mmTPC4_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11378 mask |= 1U << ((mmTPC4_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11379 mask |= 1U << ((mmTPC4_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11381 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11386 mask = 1U << ((mmTPC4_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11388 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11392 mask = 1U << ((mmTPC4_CFG_ROUND_CSR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11394 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11398 mask = 1U << ((mmTPC4_CFG_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11399 mask |= 1U << ((mmTPC4_CFG_VFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11400 mask |= 1U << ((mmTPC4_CFG_SFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11401 mask |= 1U << ((mmTPC4_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11402 mask |= 1U << ((mmTPC4_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11403 mask |= 1U << ((mmTPC4_CFG_TPC_STALL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11404 mask |= 1U << ((mmTPC4_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11405 mask |= 1U << ((mmTPC4_CFG_RD_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11406 mask |= 1U << ((mmTPC4_CFG_WR_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11407 mask |= 1U << ((mmTPC4_CFG_MSS_CONFIG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11408 mask |= 1U << ((mmTPC4_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11409 mask |= 1U << ((mmTPC4_CFG_TPC_INTR_MASK & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11410 mask |= 1U << ((mmTPC4_CFG_WQ_CREDITS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11411 mask |= 1U << ((mmTPC4_CFG_ARUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11412 mask |= 1U << ((mmTPC4_CFG_ARUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11413 mask |= 1U << ((mmTPC4_CFG_AWUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11414 mask |= 1U << ((mmTPC4_CFG_AWUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11415 mask |= 1U << ((mmTPC4_CFG_OPCODE_EXEC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11417 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11422 mask = 1U << ((mmTPC4_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11423 mask |= 1U << ((mmTPC4_CFG_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11424 mask |= 1U << ((mmTPC4_CFG_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11425 mask |= 1U << ((mmTPC4_CFG_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11426 mask |= 1U << ((mmTPC4_CFG_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11427 mask |= 1U << ((mmTPC4_CFG_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11428 mask |= 1U << ((mmTPC4_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11429 mask |= 1U << ((mmTPC4_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11430 mask |= 1U << ((mmTPC4_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11431 mask |= 1U << ((mmTPC4_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11432 mask |= 1U << ((mmTPC4_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11433 mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11434 mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11435 mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11436 mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11437 mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11438 mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11439 mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11440 mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11441 mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11442 mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11443 mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11444 mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11446 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11453 mask = 1U << ((mmTPC5_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11454 mask |= 1U << ((mmTPC5_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11455 mask |= 1U << ((mmTPC5_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11456 mask |= 1U << ((mmTPC5_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11457 mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11458 mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11459 mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11460 mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11461 mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11462 mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11463 mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11464 mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11465 mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11466 mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11467 mask |= 1U << ((mmTPC5_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11468 mask |= 1U << ((mmTPC5_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11469 mask |= 1U << ((mmTPC5_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11470 mask |= 1U << ((mmTPC5_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11471 mask |= 1U << ((mmTPC5_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11472 mask |= 1U << ((mmTPC5_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11473 mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11474 mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11475 mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11476 mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11477 mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11478 mask |= 1U << ((mmTPC5_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11479 mask |= 1U << ((mmTPC5_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11480 mask |= 1U << ((mmTPC5_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11481 mask |= 1U << ((mmTPC5_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11483 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11487 mask = 1U << ((mmTPC5_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11488 mask |= 1U << ((mmTPC5_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11489 mask |= 1U << ((mmTPC5_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11490 mask |= 1U << ((mmTPC5_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11491 mask |= 1U << ((mmTPC5_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11492 mask |= 1U << ((mmTPC5_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11493 mask |= 1U << ((mmTPC5_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11494 mask |= 1U << ((mmTPC5_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11495 mask |= 1U << ((mmTPC5_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11496 mask |= 1U << ((mmTPC5_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11497 mask |= 1U << ((mmTPC5_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11498 mask |= 1U << ((mmTPC5_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11499 mask |= 1U << ((mmTPC5_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11500 mask |= 1U << ((mmTPC5_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11501 mask |= 1U << ((mmTPC5_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11502 mask |= 1U << ((mmTPC5_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11503 mask |= 1U << ((mmTPC5_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11504 mask |= 1U << ((mmTPC5_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11505 mask |= 1U << ((mmTPC5_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11506 mask |= 1U << ((mmTPC5_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11507 mask |= 1U << ((mmTPC5_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11508 mask |= 1U << ((mmTPC5_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11509 mask |= 1U << ((mmTPC5_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11510 mask |= 1U << ((mmTPC5_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11511 mask |= 1U << ((mmTPC5_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11512 mask |= 1U << ((mmTPC5_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11513 mask |= 1U << ((mmTPC5_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11514 mask |= 1U << ((mmTPC5_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11515 mask |= 1U << ((mmTPC5_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11516 mask |= 1U << ((mmTPC5_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11517 mask |= 1U << ((mmTPC5_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11518 mask |= 1U << ((mmTPC5_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11520 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11524 mask = 1U << ((mmTPC5_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11525 mask |= 1U << ((mmTPC5_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11526 mask |= 1U << ((mmTPC5_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11527 mask |= 1U << ((mmTPC5_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11528 mask |= 1U << ((mmTPC5_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11529 mask |= 1U << ((mmTPC5_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11530 mask |= 1U << ((mmTPC5_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11531 mask |= 1U << ((mmTPC5_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11532 mask |= 1U << ((mmTPC5_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11533 mask |= 1U << ((mmTPC5_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11534 mask |= 1U << ((mmTPC5_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11535 mask |= 1U << ((mmTPC5_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11536 mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11537 mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11538 mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11540 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11544 mask = 1U << ((mmTPC5_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11545 mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11546 mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11547 mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11548 mask |= 1U << ((mmTPC5_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11549 mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11550 mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11551 mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11552 mask |= 1U << ((mmTPC5_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11553 mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11554 mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11555 mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11556 mask |= 1U << ((mmTPC5_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11557 mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11558 mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11559 mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11560 mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11561 mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11562 mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11563 mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11564 mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11565 mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11566 mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11567 mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11568 mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11569 mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11570 mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11571 mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11573 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11577 mask = 1U << ((mmTPC5_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11578 mask |= 1U << ((mmTPC5_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11579 mask |= 1U << ((mmTPC5_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11580 mask |= 1U << ((mmTPC5_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11581 mask |= 1U << ((mmTPC5_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11582 mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11583 mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11584 mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11585 mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11586 mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11587 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11588 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11589 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11590 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11591 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11592 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11593 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11594 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11595 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11596 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11597 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11598 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11599 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11600 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11601 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11602 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11603 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11604 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11605 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11606 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11607 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11608 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11610 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11615 mask = 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11616 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11617 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11618 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11619 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11620 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11621 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11622 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11623 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11624 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11625 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11626 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11627 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11628 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11629 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11630 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11631 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11632 mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11633 mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11634 mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11635 mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11636 mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11637 mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11638 mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11639 mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11640 mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11641 mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11642 mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11643 mask |= 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11644 mask |= 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11645 mask |= 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11647 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11653 mask = 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11654 mask |= 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11656 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11660 mask = 1U << ((mmTPC5_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11661 mask |= 1U << ((mmTPC5_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11662 mask |= 1U << ((mmTPC5_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11663 mask |= 1U << ((mmTPC5_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11664 mask |= 1U << ((mmTPC5_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11665 mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11666 mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11667 mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11668 mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11669 mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11670 mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11671 mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11672 mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11673 mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11674 mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11675 mask |= 1U << ((mmTPC5_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11676 mask |= 1U << ((mmTPC5_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11677 mask |= 1U << ((mmTPC5_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11679 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11683 mask = 1U << ((mmTPC5_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11684 mask |= 1U << ((mmTPC5_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11685 mask |= 1U << ((mmTPC5_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11686 mask |= 1U << ((mmTPC5_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11688 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11692 mask = 1U << ((mmTPC5_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11693 mask |= 1U << ((mmTPC5_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11694 mask |= 1U << ((mmTPC5_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11695 mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11696 mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11697 mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11698 mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11699 mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11700 mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11701 mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11702 mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11703 mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11704 mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11706 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11710 mask = 1U << ((mmTPC5_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11711 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11712 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11713 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11714 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11715 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11716 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11717 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11718 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11719 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11720 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11721 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11722 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11723 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11724 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11725 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11726 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11727 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11728 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11729 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11730 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11731 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11732 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11733 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11734 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11736 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11741 mask = 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11742 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11743 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11744 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11745 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11746 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11747 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11748 mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11750 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11756 mask = 1U << ((mmTPC5_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11757 mask |= 1U << ((mmTPC5_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11758 mask |= 1U << ((mmTPC5_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11759 mask |= 1U << ((mmTPC5_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11760 mask |= 1U << ((mmTPC5_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11762 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11766 mask = 1U << ((mmTPC5_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11767 mask |= 1U << ((mmTPC5_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11768 mask |= 1U << ((mmTPC5_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11769 mask |= 1U << ((mmTPC5_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11770 mask |= 1U << ((mmTPC5_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11771 mask |= 1U << ((mmTPC5_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11772 mask |= 1U << ((mmTPC5_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11773 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11774 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11775 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11776 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11777 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11778 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11779 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11780 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11781 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11782 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11783 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11784 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11785 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11786 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11787 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11788 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11789 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11790 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11791 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11792 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11794 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11799 mask = 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11800 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11801 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11802 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11803 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11804 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11805 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11806 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11807 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11808 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11809 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11810 mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11811 mask |= 1U << ((mmTPC5_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11812 mask |= 1U << ((mmTPC5_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11813 mask |= 1U << ((mmTPC5_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11815 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11819 mask = 1U << ((mmTPC5_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11820 mask |= 1U << ((mmTPC5_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11821 mask |= 1U << ((mmTPC5_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11822 mask |= 1U << ((mmTPC5_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11823 mask |= 1U << ((mmTPC5_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11824 mask |= 1U << ((mmTPC5_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11825 mask |= 1U << ((mmTPC5_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11826 mask |= 1U << ((mmTPC5_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11827 mask |= 1U << ((mmTPC5_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11828 mask |= 1U << ((mmTPC5_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11829 mask |= 1U << ((mmTPC5_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11830 mask |= 1U << ((mmTPC5_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11831 mask |= 1U << ((mmTPC5_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11832 mask |= 1U << ((mmTPC5_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11833 mask |= 1U << ((mmTPC5_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11835 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11840 mask = 1U << ((mmTPC5_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11842 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11846 mask = 1U << ((mmTPC5_CFG_ROUND_CSR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11848 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11852 mask = 1U << ((mmTPC5_CFG_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11853 mask |= 1U << ((mmTPC5_CFG_VFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11854 mask |= 1U << ((mmTPC5_CFG_SFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11855 mask |= 1U << ((mmTPC5_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11856 mask |= 1U << ((mmTPC5_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11857 mask |= 1U << ((mmTPC5_CFG_TPC_STALL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11858 mask |= 1U << ((mmTPC5_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11859 mask |= 1U << ((mmTPC5_CFG_RD_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11860 mask |= 1U << ((mmTPC5_CFG_WR_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11861 mask |= 1U << ((mmTPC5_CFG_MSS_CONFIG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11862 mask |= 1U << ((mmTPC5_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11863 mask |= 1U << ((mmTPC5_CFG_TPC_INTR_MASK & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11864 mask |= 1U << ((mmTPC5_CFG_WQ_CREDITS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11865 mask |= 1U << ((mmTPC5_CFG_ARUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11866 mask |= 1U << ((mmTPC5_CFG_ARUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11867 mask |= 1U << ((mmTPC5_CFG_AWUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11868 mask |= 1U << ((mmTPC5_CFG_AWUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11869 mask |= 1U << ((mmTPC5_CFG_OPCODE_EXEC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11871 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11876 mask = 1U << ((mmTPC5_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11877 mask |= 1U << ((mmTPC5_CFG_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11878 mask |= 1U << ((mmTPC5_CFG_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11879 mask |= 1U << ((mmTPC5_CFG_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11880 mask |= 1U << ((mmTPC5_CFG_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11881 mask |= 1U << ((mmTPC5_CFG_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11882 mask |= 1U << ((mmTPC5_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11883 mask |= 1U << ((mmTPC5_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11884 mask |= 1U << ((mmTPC5_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11885 mask |= 1U << ((mmTPC5_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11886 mask |= 1U << ((mmTPC5_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11887 mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11888 mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11889 mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11890 mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11891 mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11892 mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11893 mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11894 mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11895 mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11896 mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11897 mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11898 mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11900 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11907 mask = 1U << ((mmTPC6_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11908 mask |= 1U << ((mmTPC6_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11909 mask |= 1U << ((mmTPC6_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11910 mask |= 1U << ((mmTPC6_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11911 mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11912 mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11913 mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11914 mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11915 mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11916 mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11917 mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11918 mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11919 mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11920 mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11921 mask |= 1U << ((mmTPC6_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11922 mask |= 1U << ((mmTPC6_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11923 mask |= 1U << ((mmTPC6_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11924 mask |= 1U << ((mmTPC6_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11925 mask |= 1U << ((mmTPC6_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11926 mask |= 1U << ((mmTPC6_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11927 mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11928 mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11929 mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11930 mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11931 mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11932 mask |= 1U << ((mmTPC6_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11933 mask |= 1U << ((mmTPC6_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11934 mask |= 1U << ((mmTPC6_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11935 mask |= 1U << ((mmTPC6_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11937 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11941 mask = 1U << ((mmTPC6_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11942 mask |= 1U << ((mmTPC6_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11943 mask |= 1U << ((mmTPC6_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11944 mask |= 1U << ((mmTPC6_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11945 mask |= 1U << ((mmTPC6_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11946 mask |= 1U << ((mmTPC6_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11947 mask |= 1U << ((mmTPC6_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11948 mask |= 1U << ((mmTPC6_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11949 mask |= 1U << ((mmTPC6_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11950 mask |= 1U << ((mmTPC6_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11951 mask |= 1U << ((mmTPC6_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11952 mask |= 1U << ((mmTPC6_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11953 mask |= 1U << ((mmTPC6_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11954 mask |= 1U << ((mmTPC6_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11955 mask |= 1U << ((mmTPC6_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11956 mask |= 1U << ((mmTPC6_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11957 mask |= 1U << ((mmTPC6_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11958 mask |= 1U << ((mmTPC6_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11959 mask |= 1U << ((mmTPC6_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11960 mask |= 1U << ((mmTPC6_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11961 mask |= 1U << ((mmTPC6_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11962 mask |= 1U << ((mmTPC6_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11963 mask |= 1U << ((mmTPC6_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11964 mask |= 1U << ((mmTPC6_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11965 mask |= 1U << ((mmTPC6_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11966 mask |= 1U << ((mmTPC6_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11967 mask |= 1U << ((mmTPC6_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11968 mask |= 1U << ((mmTPC6_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11969 mask |= 1U << ((mmTPC6_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11970 mask |= 1U << ((mmTPC6_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11971 mask |= 1U << ((mmTPC6_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11972 mask |= 1U << ((mmTPC6_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11974 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11978 mask = 1U << ((mmTPC6_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11979 mask |= 1U << ((mmTPC6_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11980 mask |= 1U << ((mmTPC6_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11981 mask |= 1U << ((mmTPC6_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11982 mask |= 1U << ((mmTPC6_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11983 mask |= 1U << ((mmTPC6_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11984 mask |= 1U << ((mmTPC6_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11985 mask |= 1U << ((mmTPC6_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11986 mask |= 1U << ((mmTPC6_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11987 mask |= 1U << ((mmTPC6_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11988 mask |= 1U << ((mmTPC6_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11989 mask |= 1U << ((mmTPC6_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11990 mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11991 mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11992 mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11994 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
11998 mask = 1U << ((mmTPC6_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
11999 mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12000 mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12001 mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12002 mask |= 1U << ((mmTPC6_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12003 mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12004 mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12005 mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12006 mask |= 1U << ((mmTPC6_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12007 mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12008 mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12009 mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12010 mask |= 1U << ((mmTPC6_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12011 mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12012 mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12013 mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12014 mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12015 mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12016 mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12017 mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12018 mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12019 mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12020 mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12021 mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12022 mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12023 mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12024 mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12025 mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12027 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12031 mask = 1U << ((mmTPC6_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12032 mask |= 1U << ((mmTPC6_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12033 mask |= 1U << ((mmTPC6_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12034 mask |= 1U << ((mmTPC6_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12035 mask |= 1U << ((mmTPC6_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12036 mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12037 mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12038 mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12039 mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12040 mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12041 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12042 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12043 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12044 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12045 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12046 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12047 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12048 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12049 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12050 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12051 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12052 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12053 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12054 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12055 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12056 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12057 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12058 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12059 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12060 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12061 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12062 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12064 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12069 mask = 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12070 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12071 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12072 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12073 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12074 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12075 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12076 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12077 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12078 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12079 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12080 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12081 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12082 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12083 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12084 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12085 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12086 mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12087 mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12088 mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12089 mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12090 mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12091 mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12092 mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12093 mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12094 mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12095 mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12096 mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12097 mask |= 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12098 mask |= 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12099 mask |= 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12101 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12107 mask = 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12108 mask |= 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12110 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12114 mask = 1U << ((mmTPC6_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12115 mask |= 1U << ((mmTPC6_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12116 mask |= 1U << ((mmTPC6_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12117 mask |= 1U << ((mmTPC6_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12118 mask |= 1U << ((mmTPC6_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12119 mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12120 mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12121 mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12122 mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12123 mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12124 mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12125 mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12126 mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12127 mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12128 mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12129 mask |= 1U << ((mmTPC6_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12130 mask |= 1U << ((mmTPC6_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12131 mask |= 1U << ((mmTPC6_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12133 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12137 mask = 1U << ((mmTPC6_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12138 mask |= 1U << ((mmTPC6_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12139 mask |= 1U << ((mmTPC6_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12140 mask |= 1U << ((mmTPC6_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12142 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12146 mask = 1U << ((mmTPC6_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12147 mask |= 1U << ((mmTPC6_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12148 mask |= 1U << ((mmTPC6_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12149 mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12150 mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12151 mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12152 mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12153 mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12154 mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12155 mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12156 mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12157 mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12158 mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12160 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12164 mask = 1U << ((mmTPC6_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12165 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12166 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12167 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12168 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12169 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12170 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12171 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12172 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12173 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12174 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12175 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12176 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12177 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12178 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12179 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12180 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12181 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12182 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12183 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12184 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12185 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12186 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12187 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12188 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12190 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12195 mask = 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12196 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12197 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12198 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12199 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12200 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12201 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12202 mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12204 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12211 mask = 1U << ((mmTPC6_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12212 mask |= 1U << ((mmTPC6_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12213 mask |= 1U << ((mmTPC6_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12214 mask |= 1U << ((mmTPC6_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12215 mask |= 1U << ((mmTPC6_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12217 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12221 mask = 1U << ((mmTPC6_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12222 mask |= 1U << ((mmTPC6_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12223 mask |= 1U << ((mmTPC6_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12224 mask |= 1U << ((mmTPC6_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12225 mask |= 1U << ((mmTPC6_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12226 mask |= 1U << ((mmTPC6_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12227 mask |= 1U << ((mmTPC6_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12228 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12229 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12230 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12231 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12232 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12233 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12234 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12235 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12236 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12237 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12238 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12239 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12240 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12241 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12242 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12243 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12244 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12245 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12246 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12247 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12249 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12254 mask = 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12255 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12256 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12257 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12258 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12259 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12260 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12261 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12262 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12263 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12264 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12265 mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12266 mask |= 1U << ((mmTPC6_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12267 mask |= 1U << ((mmTPC6_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12268 mask |= 1U << ((mmTPC6_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12270 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12274 mask = 1U << ((mmTPC6_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12275 mask |= 1U << ((mmTPC6_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12276 mask |= 1U << ((mmTPC6_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12277 mask |= 1U << ((mmTPC6_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12278 mask |= 1U << ((mmTPC6_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12279 mask |= 1U << ((mmTPC6_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12280 mask |= 1U << ((mmTPC6_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12281 mask |= 1U << ((mmTPC6_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12282 mask |= 1U << ((mmTPC6_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12283 mask |= 1U << ((mmTPC6_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12284 mask |= 1U << ((mmTPC6_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12285 mask |= 1U << ((mmTPC6_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12286 mask |= 1U << ((mmTPC6_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12287 mask |= 1U << ((mmTPC6_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12288 mask |= 1U << ((mmTPC6_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12290 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12296 mask = 1U << ((mmTPC6_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12298 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12302 mask = 1U << ((mmTPC6_CFG_ROUND_CSR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12304 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12308 mask = 1U << ((mmTPC6_CFG_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12309 mask |= 1U << ((mmTPC6_CFG_VFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12310 mask |= 1U << ((mmTPC6_CFG_SFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12311 mask |= 1U << ((mmTPC6_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12312 mask |= 1U << ((mmTPC6_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12313 mask |= 1U << ((mmTPC6_CFG_TPC_STALL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12314 mask |= 1U << ((mmTPC6_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12315 mask |= 1U << ((mmTPC6_CFG_RD_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12316 mask |= 1U << ((mmTPC6_CFG_WR_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12317 mask |= 1U << ((mmTPC6_CFG_MSS_CONFIG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12318 mask |= 1U << ((mmTPC6_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12319 mask |= 1U << ((mmTPC6_CFG_TPC_INTR_MASK & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12320 mask |= 1U << ((mmTPC6_CFG_WQ_CREDITS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12321 mask |= 1U << ((mmTPC6_CFG_ARUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12322 mask |= 1U << ((mmTPC6_CFG_ARUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12323 mask |= 1U << ((mmTPC6_CFG_AWUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12324 mask |= 1U << ((mmTPC6_CFG_AWUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12325 mask |= 1U << ((mmTPC6_CFG_OPCODE_EXEC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12327 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12332 mask = 1U << ((mmTPC6_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12333 mask |= 1U << ((mmTPC6_CFG_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12334 mask |= 1U << ((mmTPC6_CFG_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12335 mask |= 1U << ((mmTPC6_CFG_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12336 mask |= 1U << ((mmTPC6_CFG_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12337 mask |= 1U << ((mmTPC6_CFG_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12338 mask |= 1U << ((mmTPC6_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12339 mask |= 1U << ((mmTPC6_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12340 mask |= 1U << ((mmTPC6_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12341 mask |= 1U << ((mmTPC6_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12342 mask |= 1U << ((mmTPC6_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12343 mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12344 mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12345 mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12346 mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12347 mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12348 mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12349 mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12350 mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12351 mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12352 mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12353 mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12354 mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12356 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12363 mask = 1U << ((mmTPC7_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12364 mask |= 1U << ((mmTPC7_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12365 mask |= 1U << ((mmTPC7_QM_GLBL_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12366 mask |= 1U << ((mmTPC7_QM_GLBL_ERR_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12367 mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12368 mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12369 mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12370 mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12371 mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12372 mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12373 mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12374 mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12375 mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12376 mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12377 mask |= 1U << ((mmTPC7_QM_GLBL_STS0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12378 mask |= 1U << ((mmTPC7_QM_GLBL_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12379 mask |= 1U << ((mmTPC7_QM_GLBL_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12380 mask |= 1U << ((mmTPC7_QM_GLBL_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12381 mask |= 1U << ((mmTPC7_QM_GLBL_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12382 mask |= 1U << ((mmTPC7_QM_GLBL_STS1_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12383 mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12384 mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12385 mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12386 mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12387 mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12388 mask |= 1U << ((mmTPC7_QM_PQ_BASE_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12389 mask |= 1U << ((mmTPC7_QM_PQ_BASE_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12390 mask |= 1U << ((mmTPC7_QM_PQ_BASE_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12391 mask |= 1U << ((mmTPC7_QM_PQ_BASE_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12393 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12397 mask = 1U << ((mmTPC7_QM_PQ_BASE_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12398 mask |= 1U << ((mmTPC7_QM_PQ_BASE_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12399 mask |= 1U << ((mmTPC7_QM_PQ_BASE_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12400 mask |= 1U << ((mmTPC7_QM_PQ_BASE_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12401 mask |= 1U << ((mmTPC7_QM_PQ_SIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12402 mask |= 1U << ((mmTPC7_QM_PQ_SIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12403 mask |= 1U << ((mmTPC7_QM_PQ_SIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12404 mask |= 1U << ((mmTPC7_QM_PQ_SIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12405 mask |= 1U << ((mmTPC7_QM_PQ_PI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12406 mask |= 1U << ((mmTPC7_QM_PQ_PI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12407 mask |= 1U << ((mmTPC7_QM_PQ_PI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12408 mask |= 1U << ((mmTPC7_QM_PQ_PI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12409 mask |= 1U << ((mmTPC7_QM_PQ_CI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12410 mask |= 1U << ((mmTPC7_QM_PQ_CI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12411 mask |= 1U << ((mmTPC7_QM_PQ_CI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12412 mask |= 1U << ((mmTPC7_QM_PQ_CI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12413 mask |= 1U << ((mmTPC7_QM_PQ_CFG0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12414 mask |= 1U << ((mmTPC7_QM_PQ_CFG0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12415 mask |= 1U << ((mmTPC7_QM_PQ_CFG0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12416 mask |= 1U << ((mmTPC7_QM_PQ_CFG0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12417 mask |= 1U << ((mmTPC7_QM_PQ_CFG1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12418 mask |= 1U << ((mmTPC7_QM_PQ_CFG1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12419 mask |= 1U << ((mmTPC7_QM_PQ_CFG1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12420 mask |= 1U << ((mmTPC7_QM_PQ_CFG1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12421 mask |= 1U << ((mmTPC7_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12422 mask |= 1U << ((mmTPC7_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12423 mask |= 1U << ((mmTPC7_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12424 mask |= 1U << ((mmTPC7_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12425 mask |= 1U << ((mmTPC7_QM_PQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12426 mask |= 1U << ((mmTPC7_QM_PQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12427 mask |= 1U << ((mmTPC7_QM_PQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12428 mask |= 1U << ((mmTPC7_QM_PQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12430 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12434 mask = 1U << ((mmTPC7_QM_PQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12435 mask |= 1U << ((mmTPC7_QM_PQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12436 mask |= 1U << ((mmTPC7_QM_PQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12437 mask |= 1U << ((mmTPC7_QM_PQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12438 mask |= 1U << ((mmTPC7_QM_CQ_STS0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12439 mask |= 1U << ((mmTPC7_QM_CQ_STS0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12440 mask |= 1U << ((mmTPC7_QM_CQ_STS0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12441 mask |= 1U << ((mmTPC7_QM_CQ_STS0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12442 mask |= 1U << ((mmTPC7_QM_CQ_STS1_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12443 mask |= 1U << ((mmTPC7_QM_CQ_STS1_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12444 mask |= 1U << ((mmTPC7_QM_CQ_STS1_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12445 mask |= 1U << ((mmTPC7_QM_CQ_STS1_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12446 mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12447 mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12448 mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12450 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12454 mask = 1U << ((mmTPC7_QM_CQ_CTL_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12455 mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12456 mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12457 mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12458 mask |= 1U << ((mmTPC7_QM_CQ_CTL_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12459 mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12460 mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12461 mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12462 mask |= 1U << ((mmTPC7_QM_CQ_CTL_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12463 mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12464 mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12465 mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12466 mask |= 1U << ((mmTPC7_QM_CQ_CTL_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12467 mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12468 mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12469 mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12470 mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12471 mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12472 mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12473 mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12474 mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12475 mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12476 mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12477 mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12478 mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12479 mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12480 mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12481 mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12483 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12487 mask = 1U << ((mmTPC7_QM_CQ_CTL_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12488 mask |= 1U << ((mmTPC7_QM_CQ_CTL_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12489 mask |= 1U << ((mmTPC7_QM_CQ_CTL_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12490 mask |= 1U << ((mmTPC7_QM_CQ_CTL_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12491 mask |= 1U << ((mmTPC7_QM_CQ_CTL_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12492 mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12493 mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12494 mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12495 mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12496 mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12497 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12498 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12499 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12500 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12501 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12502 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12503 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12504 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12505 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12506 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12507 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12508 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12509 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12510 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12511 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12512 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12513 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12514 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12515 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12516 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12517 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12518 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12520 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12525 mask = 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12526 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12527 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12528 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12529 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12530 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12531 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12532 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12533 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12534 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12535 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12536 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12537 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12538 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12539 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12540 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12541 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12542 mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12543 mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12544 mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12545 mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12546 mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12547 mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12548 mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12549 mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12550 mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12551 mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12552 mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12553 mask |= 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12554 mask |= 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12555 mask |= 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12557 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12565 mask = 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12566 mask |= 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12568 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12572 mask = 1U << ((mmTPC7_QM_CP_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12573 mask |= 1U << ((mmTPC7_QM_CP_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12574 mask |= 1U << ((mmTPC7_QM_CP_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12575 mask |= 1U << ((mmTPC7_QM_CP_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12576 mask |= 1U << ((mmTPC7_QM_CP_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12577 mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12578 mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12579 mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12580 mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12581 mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12582 mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12583 mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12584 mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12585 mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12586 mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12587 mask |= 1U << ((mmTPC7_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12588 mask |= 1U << ((mmTPC7_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12589 mask |= 1U << ((mmTPC7_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12591 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12595 mask = 1U << ((mmTPC7_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12596 mask |= 1U << ((mmTPC7_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12597 mask |= 1U << ((mmTPC7_QM_CP_DBG_0_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12598 mask |= 1U << ((mmTPC7_QM_CP_DBG_0_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12600 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12604 mask = 1U << ((mmTPC7_QM_CP_DBG_0_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12605 mask |= 1U << ((mmTPC7_QM_CP_DBG_0_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12606 mask |= 1U << ((mmTPC7_QM_CP_DBG_0_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12607 mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12608 mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12609 mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12610 mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12611 mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12612 mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12613 mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12614 mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12615 mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12616 mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12618 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12622 mask = 1U << ((mmTPC7_QM_ARB_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12623 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12624 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12625 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12626 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12627 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12628 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12629 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12630 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12631 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12632 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12633 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12634 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12635 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12636 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12637 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12638 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12639 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12640 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12641 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12642 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12643 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12644 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12645 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12646 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12648 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12653 mask = 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12654 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12655 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12656 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12657 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12658 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12659 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12660 mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12662 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12668 mask = 1U << ((mmTPC7_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12669 mask |= 1U << ((mmTPC7_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12670 mask |= 1U << ((mmTPC7_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12671 mask |= 1U << ((mmTPC7_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12672 mask |= 1U << ((mmTPC7_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12674 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12678 mask = 1U << ((mmTPC7_QM_ARB_STATE_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12679 mask |= 1U << ((mmTPC7_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12680 mask |= 1U << ((mmTPC7_QM_ARB_MSG_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12681 mask |= 1U << ((mmTPC7_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12682 mask |= 1U << ((mmTPC7_QM_ARB_ERR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12683 mask |= 1U << ((mmTPC7_QM_ARB_ERR_MSG_EN & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12684 mask |= 1U << ((mmTPC7_QM_ARB_ERR_STS_DRP & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12685 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12686 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12687 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12688 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12689 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12690 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12691 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12692 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12693 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12694 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12695 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12696 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12697 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12698 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12699 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12700 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12701 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12702 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12703 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12704 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12706 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12711 mask = 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12712 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12713 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12714 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12715 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12716 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12717 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12718 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12719 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12720 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12721 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12722 mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12723 mask |= 1U << ((mmTPC7_QM_CGM_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12724 mask |= 1U << ((mmTPC7_QM_CGM_STS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12725 mask |= 1U << ((mmTPC7_QM_CGM_CFG1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12727 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12731 mask = 1U << ((mmTPC7_QM_LOCAL_RANGE_BASE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12732 mask |= 1U << ((mmTPC7_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12733 mask |= 1U << ((mmTPC7_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12734 mask |= 1U << ((mmTPC7_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12735 mask |= 1U << ((mmTPC7_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12736 mask |= 1U << ((mmTPC7_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12737 mask |= 1U << ((mmTPC7_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12738 mask |= 1U << ((mmTPC7_QM_GLBL_AXCACHE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12739 mask |= 1U << ((mmTPC7_QM_IND_GW_APB_CFG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12740 mask |= 1U << ((mmTPC7_QM_IND_GW_APB_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12741 mask |= 1U << ((mmTPC7_QM_IND_GW_APB_RDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12742 mask |= 1U << ((mmTPC7_QM_IND_GW_APB_STATUS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12743 mask |= 1U << ((mmTPC7_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12744 mask |= 1U << ((mmTPC7_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12745 mask |= 1U << ((mmTPC7_QM_GLBL_ERR_WDATA & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12747 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12752 mask = 1U << ((mmTPC7_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12754 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12758 mask = 1U << ((mmTPC7_CFG_ROUND_CSR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12760 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12764 mask = 1U << ((mmTPC7_CFG_PROT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12765 mask |= 1U << ((mmTPC7_CFG_VFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12766 mask |= 1U << ((mmTPC7_CFG_SFLAGS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12767 mask |= 1U << ((mmTPC7_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12768 mask |= 1U << ((mmTPC7_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12769 mask |= 1U << ((mmTPC7_CFG_TPC_STALL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12770 mask |= 1U << ((mmTPC7_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12771 mask |= 1U << ((mmTPC7_CFG_RD_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12772 mask |= 1U << ((mmTPC7_CFG_WR_RATE_LIMIT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12773 mask |= 1U << ((mmTPC7_CFG_MSS_CONFIG & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12774 mask |= 1U << ((mmTPC7_CFG_TPC_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12775 mask |= 1U << ((mmTPC7_CFG_TPC_INTR_MASK & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12776 mask |= 1U << ((mmTPC7_CFG_WQ_CREDITS & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12777 mask |= 1U << ((mmTPC7_CFG_ARUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12778 mask |= 1U << ((mmTPC7_CFG_ARUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12779 mask |= 1U << ((mmTPC7_CFG_AWUSER_LO & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12780 mask |= 1U << ((mmTPC7_CFG_AWUSER_HI & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12781 mask |= 1U << ((mmTPC7_CFG_OPCODE_EXEC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12783 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()
12788 mask = 1U << ((mmTPC7_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12789 mask |= 1U << ((mmTPC7_CFG_DBGMEM_ADD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12790 mask |= 1U << ((mmTPC7_CFG_DBGMEM_DATA_WR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12791 mask |= 1U << ((mmTPC7_CFG_DBGMEM_DATA_RD & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12792 mask |= 1U << ((mmTPC7_CFG_DBGMEM_CTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12793 mask |= 1U << ((mmTPC7_CFG_DBGMEM_RC & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12794 mask |= 1U << ((mmTPC7_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12795 mask |= 1U << ((mmTPC7_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12796 mask |= 1U << ((mmTPC7_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12797 mask |= 1U << ((mmTPC7_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12798 mask |= 1U << ((mmTPC7_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12799 mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12800 mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_PAT & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12801 mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12802 mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12803 mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12804 mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12805 mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12806 mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12807 mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12808 mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12809 mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12810 mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2); in gaudi_init_tpc_protection_bits()
12812 WREG32(pb_addr + word_offset, ~mask); in gaudi_init_tpc_protection_bits()