155 	__raw_writew(0x010D, FPGA_OUT);    /* FPGA */  in se7722_setup()
157 	__raw_writew(0x0000, PORT_PECR);   /* PORT E 1 = IRQ5 ,E 0 = BS */  in se7722_setup()
158 	__raw_writew(0x1000, PORT_PJCR);   /* PORT J 1 = IRQ1,J 0 =IRQ0 */  in se7722_setup()
161 	__raw_writew(0x0020, PORT_PSELD);  in se7722_setup()
164 	__raw_writew(0x0003, PORT_PSELB);  in se7722_setup()
165 	__raw_writew(0xe000, PORT_PSELC);  in se7722_setup()
166 	__raw_writew(0x0000, PORT_PKCR);  in se7722_setup()
169 	__raw_writew(0x4020, PORT_PHCR);  in se7722_setup()
170 	__raw_writew(0x0000, PORT_PLCR);  in se7722_setup()
171 	__raw_writew(0x0000, PORT_PMCR);  in se7722_setup()
172 	__raw_writew(0x0002, PORT_PRCR);  in se7722_setup()
173 	__raw_writew(0x0000, PORT_PXCR);   /* LCDC,CS6A */  in se7722_setup()
176 	__raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */  in se7722_setup()
177 	__raw_writew(0x0000, PORT_PYCR);  in se7722_setup()
178 	__raw_writew(0x0000, PORT_PZCR);  in se7722_setup()
179 	__raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);  in se7722_setup()
180 	__raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);  in se7722_setup()