Lines Matching refs:write_config
663 eeh_ops->write_config(edev, cap + PCI_EXP_SLTCTL, 2, val); in eeh_bridge_check_link()
671 eeh_ops->write_config(edev, cap + PCI_EXP_LNKCTL, 2, val); in eeh_bridge_check_link()
710 eeh_ops->write_config(edev, i*4, 4, edev->config_space[i]); in eeh_restore_bridge_bars()
712 eeh_ops->write_config(edev, 14*4, 4, edev->config_space[14]); in eeh_restore_bridge_bars()
715 eeh_ops->write_config(edev, PCI_CACHE_LINE_SIZE, 1, in eeh_restore_bridge_bars()
717 eeh_ops->write_config(edev, PCI_LATENCY_TIMER, 1, in eeh_restore_bridge_bars()
720 eeh_ops->write_config(edev, 15*4, 4, edev->config_space[15]); in eeh_restore_bridge_bars()
723 eeh_ops->write_config(edev, PCI_COMMAND, 4, edev->config_space[1] | in eeh_restore_bridge_bars()
736 eeh_ops->write_config(edev, i*4, 4, edev->config_space[i]); in eeh_restore_device_bars()
738 eeh_ops->write_config(edev, 12*4, 4, edev->config_space[12]); in eeh_restore_device_bars()
740 eeh_ops->write_config(edev, PCI_CACHE_LINE_SIZE, 1, in eeh_restore_device_bars()
742 eeh_ops->write_config(edev, PCI_LATENCY_TIMER, 1, in eeh_restore_device_bars()
746 eeh_ops->write_config(edev, 15*4, 4, edev->config_space[15]); in eeh_restore_device_bars()
761 eeh_ops->write_config(edev, PCI_COMMAND, 4, cmd); in eeh_restore_device_bars()