17 	u32 hi = 0, lo = value;  in pci_ohci_write_reg()  local
21 		_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);  in pci_ohci_write_reg()
23 			hi |= PCI_COMMAND_MASTER;  in pci_ohci_write_reg()
25 			hi &= ~PCI_COMMAND_MASTER;  in pci_ohci_write_reg()
28 			hi |= PCI_COMMAND_MEMORY;  in pci_ohci_write_reg()
30 			hi &= ~PCI_COMMAND_MEMORY;  in pci_ohci_write_reg()
31 		_wrmsr(USB_MSR_REG(USB_OHCI), hi, lo);  in pci_ohci_write_reg()
35 			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);  in pci_ohci_write_reg()
38 				_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);  in pci_ohci_write_reg()
44 			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);  in pci_ohci_write_reg()
46 			_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);  in pci_ohci_write_reg()
48 			_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);  in pci_ohci_write_reg()
50 			_wrmsr(USB_MSR_REG(USB_OHCI), hi, lo);  in pci_ohci_write_reg()
53 			hi = 0x40000000 | ((value & 0xff000000) >> 24);  in pci_ohci_write_reg()
55 			_wrmsr(GLIU_MSR_REG(GLIU_P2D_BM3), hi, lo);  in pci_ohci_write_reg()
59 		_rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);  in pci_ohci_write_reg()
63 		_wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);  in pci_ohci_write_reg()
73 	u32 hi, lo;  in pci_ohci_read_reg()  local
81 		_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);  in pci_ohci_read_reg()
82 		if (hi & PCI_COMMAND_MASTER)  in pci_ohci_read_reg()
84 		if (hi & PCI_COMMAND_MEMORY)  in pci_ohci_read_reg()
90 		_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);  in pci_ohci_read_reg()
96 		_rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo);  in pci_ohci_read_reg()
106 		_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);  in pci_ohci_read_reg()
111 			_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);  in pci_ohci_read_reg()
113 			_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);  in pci_ohci_read_reg()
136 		_rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);  in pci_ohci_read_reg()