51 	u32 hi, lo;  in divil_lbar_enable()  local
59 		_rdmsr(DIVIL_MSR_REG(offset), &hi, &lo);  in divil_lbar_enable()
61 		_wrmsr(DIVIL_MSR_REG(offset), hi, lo);  in divil_lbar_enable()
70 	u32 hi, lo;  in divil_lbar_disable()  local
74 		_rdmsr(DIVIL_MSR_REG(offset), &hi, &lo);  in divil_lbar_disable()
76 		_wrmsr(DIVIL_MSR_REG(offset), hi, lo);  in divil_lbar_disable()
86 	u32 hi = 0, lo = value;  in pci_isa_write_bar()  local
89 		_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);  in pci_isa_write_bar()
90 		lo |= soft_bar_flag[n];  in pci_isa_write_bar()
91 		_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);  in pci_isa_write_bar()
95 		lo &= bar_space_range[n];  in pci_isa_write_bar()
96 		_wrmsr(divil_msr_reg[n], hi, lo);  in pci_isa_write_bar()
101 		lo = ((value & 0x000ffffc) << 12) | 0x01;  in pci_isa_write_bar()
102 		_wrmsr(sb_msr_reg[n], hi, lo);  in pci_isa_write_bar()
113 	u32 hi, lo;  in pci_isa_read_bar()  local
115 	_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);  in pci_isa_read_bar()
116 	if (lo & soft_bar_flag[n]) {  in pci_isa_read_bar()
118 		lo &= ~soft_bar_flag[n];  in pci_isa_read_bar()
119 		_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);  in pci_isa_read_bar()
121 		_rdmsr(divil_msr_reg[n], &hi, &lo);  in pci_isa_read_bar()
122 		conf_data = lo & bar_space_range[n];  in pci_isa_read_bar()
136 	u32 hi = 0, lo = value;  in pci_isa_write_reg()  local
147 		_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);  in pci_isa_write_reg()
148 		temp = lo & 0x0000ffff;  in pci_isa_write_reg()
150 		    (lo & SB_TAS_ERR_EN))  in pci_isa_write_reg()
154 		    (lo & SB_TAR_ERR_EN))  in pci_isa_write_reg()
158 		    && (lo & SB_MAR_ERR_EN))  in pci_isa_write_reg()
162 		    && (lo & SB_PARE_ERR_EN))  in pci_isa_write_reg()
165 		lo = temp;  in pci_isa_write_reg()
166 		_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);  in pci_isa_write_reg()
170 		_rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo);  in pci_isa_write_reg()
173 		_wrmsr(SB_MSR_REG(SB_CTRL), hi, lo);  in pci_isa_write_reg()
194 		_rdmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), &hi, &lo);  in pci_isa_write_reg()
196 		lo &= ~(0xf << 24);  in pci_isa_write_reg()
198 			lo |= (CS5536_UART1_INTR << 24);  in pci_isa_write_reg()
199 		_wrmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), hi, lo);  in pci_isa_write_reg()
202 		_rdmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), &hi, &lo);  in pci_isa_write_reg()
204 		lo &= ~(0xf << 28);  in pci_isa_write_reg()
206 			lo |= (CS5536_UART2_INTR << 28);  in pci_isa_write_reg()
207 		_wrmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), hi, lo);  in pci_isa_write_reg()
212 			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);  in pci_isa_write_reg()
213 			lo |= 0x00000063;  in pci_isa_write_reg()
214 			_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);  in pci_isa_write_reg()
231 	u32 hi, lo;  in pci_isa_read_reg()  local
241 		_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), &hi, &lo);  in pci_isa_read_reg()
250 		_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);  in pci_isa_read_reg()
251 		if (lo & SB_TAS_ERR_FLAG)  in pci_isa_read_reg()
253 		if (lo & SB_TAR_ERR_FLAG)  in pci_isa_read_reg()
255 		if (lo & SB_MAR_ERR_FLAG)  in pci_isa_read_reg()
257 		if (lo & SB_PARE_ERR_FLAG)  in pci_isa_read_reg()
261 		_rdmsr(GLCP_MSR_REG(GLCP_CHIP_REV_ID), &hi, &lo);  in pci_isa_read_reg()
262 		conf_data = lo & 0x000000ff;  in pci_isa_read_reg()
266 		_rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo);  in pci_isa_read_reg()