24 t32_simulate_table_branch(probes_opcode_t insn,  in t32_simulate_table_branch()  argument
28 	int rn = (insn >> 16) & 0xf;  in t32_simulate_table_branch()
29 	int rm = insn & 0xf;  in t32_simulate_table_branch()
35 	if (insn & 0x10) /* TBH */  in t32_simulate_table_branch()
44 t32_simulate_mrs(probes_opcode_t insn,  in t32_simulate_mrs()  argument
47 	int rd = (insn >> 8) & 0xf;  in t32_simulate_mrs()
53 t32_simulate_cond_branch(probes_opcode_t insn,  in t32_simulate_cond_branch()  argument
58 	long offset = insn & 0x7ff;		/* imm11 */  in t32_simulate_cond_branch()
59 	offset += (insn & 0x003f0000) >> 5;	/* imm6 */  in t32_simulate_cond_branch()
60 	offset += (insn & 0x00002000) << 4;	/* J1 */  in t32_simulate_cond_branch()
61 	offset += (insn & 0x00000800) << 7;	/* J2 */  in t32_simulate_cond_branch()
62 	offset -= (insn & 0x04000000) >> 7;	/* Apply sign bit */  in t32_simulate_cond_branch()
68 t32_decode_cond_branch(probes_opcode_t insn, struct arch_probes_insn *asi,  in t32_decode_cond_branch()  argument
71 	int cc = (insn >> 22) & 0xf;  in t32_decode_cond_branch()
78 t32_simulate_branch(probes_opcode_t insn,  in t32_simulate_branch()  argument
83 	long offset = insn & 0x7ff;		/* imm11 */  in t32_simulate_branch()
84 	offset += (insn & 0x03ff0000) >> 5;	/* imm10 */  in t32_simulate_branch()
85 	offset += (insn & 0x00002000) << 9;	/* J1 */  in t32_simulate_branch()
86 	offset += (insn & 0x00000800) << 10;	/* J2 */  in t32_simulate_branch()
87 	if (insn & 0x04000000)  in t32_simulate_branch()
92 	if (insn & (1 << 14)) {  in t32_simulate_branch()
95 		if (!(insn & (1 << 12))) {  in t32_simulate_branch()
106 t32_simulate_ldr_literal(probes_opcode_t insn,  in t32_simulate_ldr_literal()  argument
110 	int rt = (insn >> 12) & 0xf;  in t32_simulate_ldr_literal()
113 	long offset = insn & 0xfff;  in t32_simulate_ldr_literal()
114 	if (insn & 0x00800000)  in t32_simulate_ldr_literal()
119 	if (insn & 0x00400000) {  in t32_simulate_ldr_literal()
126 	} else if (insn & 0x00200000) {  in t32_simulate_ldr_literal()
128 		if (insn & 0x01000000)  in t32_simulate_ldr_literal()
134 		if (insn & 0x01000000)  in t32_simulate_ldr_literal()
144 t32_decode_ldmstm(probes_opcode_t insn, struct arch_probes_insn *asi,  in t32_decode_ldmstm()  argument
147 	enum probes_insn ret = kprobe_decode_ldmstm(insn, asi, d);  in t32_decode_ldmstm()
150 	insn = __mem_to_opcode_arm(asi->insn[0]);  in t32_decode_ldmstm()
151 	((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(insn >> 16);  in t32_decode_ldmstm()
152 	((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0xffff);  in t32_decode_ldmstm()
158 t32_emulate_ldrdstrd(probes_opcode_t insn,  in t32_emulate_ldrdstrd()  argument
162 	int rt1 = (insn >> 12) & 0xf;  in t32_emulate_ldrdstrd()
163 	int rt2 = (insn >> 8) & 0xf;  in t32_emulate_ldrdstrd()
164 	int rn = (insn >> 16) & 0xf;  in t32_emulate_ldrdstrd()
185 t32_emulate_ldrstr(probes_opcode_t insn,  in t32_emulate_ldrstr()  argument
188 	int rt = (insn >> 12) & 0xf;  in t32_emulate_ldrstr()
189 	int rn = (insn >> 16) & 0xf;  in t32_emulate_ldrstr()
190 	int rm = insn & 0xf;  in t32_emulate_ldrstr()
211 t32_emulate_rd8rn16rm0_rwflags(probes_opcode_t insn,  in t32_emulate_rd8rn16rm0_rwflags()  argument
214 	int rd = (insn >> 8) & 0xf;  in t32_emulate_rd8rn16rm0_rwflags()
215 	int rn = (insn >> 16) & 0xf;  in t32_emulate_rd8rn16rm0_rwflags()
216 	int rm = insn & 0xf;  in t32_emulate_rd8rn16rm0_rwflags()
238 t32_emulate_rd8pc16_noflags(probes_opcode_t insn,  in t32_emulate_rd8pc16_noflags()  argument
242 	int rd = (insn >> 8) & 0xf;  in t32_emulate_rd8pc16_noflags()
258 t32_emulate_rd8rn16_noflags(probes_opcode_t insn,  in t32_emulate_rd8rn16_noflags()  argument
261 	int rd = (insn >> 8) & 0xf;  in t32_emulate_rd8rn16_noflags()
262 	int rn = (insn >> 16) & 0xf;  in t32_emulate_rd8rn16_noflags()
278 t32_emulate_rdlo12rdhi8rn16rm0_noflags(probes_opcode_t insn,  in t32_emulate_rdlo12rdhi8rn16rm0_noflags()  argument
282 	int rdlo = (insn >> 12) & 0xf;  in t32_emulate_rdlo12rdhi8rn16rm0_noflags()
283 	int rdhi = (insn >> 8) & 0xf;  in t32_emulate_rdlo12rdhi8rn16rm0_noflags()
284 	int rn = (insn >> 16) & 0xf;  in t32_emulate_rdlo12rdhi8rn16rm0_noflags()
285 	int rm = insn & 0xf;  in t32_emulate_rdlo12rdhi8rn16rm0_noflags()
306 t16_simulate_bxblx(probes_opcode_t insn,  in t16_simulate_bxblx()  argument
310 	int rm = (insn >> 3) & 0xf;  in t16_simulate_bxblx()
313 	if (insn & (1 << 7)) /* BLX ? */  in t16_simulate_bxblx()
320 t16_simulate_ldr_literal(probes_opcode_t insn,  in t16_simulate_ldr_literal()  argument
324 	long index = insn & 0xff;  in t16_simulate_ldr_literal()
325 	int rt = (insn >> 8) & 0x7;  in t16_simulate_ldr_literal()
330 t16_simulate_ldrstr_sp_relative(probes_opcode_t insn,  in t16_simulate_ldrstr_sp_relative()  argument
334 	long index = insn & 0xff;  in t16_simulate_ldrstr_sp_relative()
335 	int rt = (insn >> 8) & 0x7;  in t16_simulate_ldrstr_sp_relative()
336 	if (insn & 0x800) /* LDR */  in t16_simulate_ldrstr_sp_relative()
343 t16_simulate_reladr(probes_opcode_t insn,  in t16_simulate_reladr()  argument
346 	unsigned long base = (insn & 0x800) ? regs->ARM_sp  in t16_simulate_reladr()
348 	long offset = insn & 0xff;  in t16_simulate_reladr()
349 	int rt = (insn >> 8) & 0x7;  in t16_simulate_reladr()
354 t16_simulate_add_sp_imm(probes_opcode_t insn,  in t16_simulate_add_sp_imm()  argument
357 	long imm = insn & 0x7f;  in t16_simulate_add_sp_imm()
358 	if (insn & 0x80) /* SUB */  in t16_simulate_add_sp_imm()
365 t16_simulate_cbz(probes_opcode_t insn,  in t16_simulate_cbz()  argument
368 	int rn = insn & 0x7;  in t16_simulate_cbz()
369 	probes_opcode_t nonzero = regs->uregs[rn] ? insn : ~insn;  in t16_simulate_cbz()
371 		long i = insn & 0x200;  in t16_simulate_cbz()
372 		long imm5 = insn & 0xf8;  in t16_simulate_cbz()
379 t16_simulate_it(probes_opcode_t insn,  in t16_simulate_it()  argument
390 	cpsr |= (insn & 0xfc) << 8;  in t16_simulate_it()
391 	cpsr |= (insn & 0x03) << 25;  in t16_simulate_it()
396 t16_singlestep_it(probes_opcode_t insn,  in t16_singlestep_it()  argument
400 	t16_simulate_it(insn, asi, regs);  in t16_singlestep_it()
404 t16_decode_it(probes_opcode_t insn, struct arch_probes_insn *asi,  in t16_decode_it()  argument
412 t16_simulate_cond_branch(probes_opcode_t insn,  in t16_simulate_cond_branch()  argument
416 	long offset = insn & 0x7f;  in t16_simulate_cond_branch()
417 	offset -= insn & 0x80; /* Apply sign bit */  in t16_simulate_cond_branch()
422 t16_decode_cond_branch(probes_opcode_t insn, struct arch_probes_insn *asi,  in t16_decode_cond_branch()  argument
425 	int cc = (insn >> 8) & 0xf;  in t16_decode_cond_branch()
432 t16_simulate_branch(probes_opcode_t insn,  in t16_simulate_branch()  argument
436 	long offset = insn & 0x3ff;  in t16_simulate_branch()
437 	offset -= insn & 0x400; /* Apply sign bit */  in t16_simulate_branch()
442 t16_emulate_loregs(probes_opcode_t insn,  in t16_emulate_loregs()  argument
467 t16_emulate_loregs_rwflags(probes_opcode_t insn,  in t16_emulate_loregs_rwflags()  argument
470 	regs->ARM_cpsr = t16_emulate_loregs(insn, asi, regs);  in t16_emulate_loregs_rwflags()
474 t16_emulate_loregs_noitrwflags(probes_opcode_t insn,  in t16_emulate_loregs_noitrwflags()  argument
477 	unsigned long cpsr = t16_emulate_loregs(insn, asi, regs);  in t16_emulate_loregs_noitrwflags()
483 t16_emulate_hiregs(probes_opcode_t insn,  in t16_emulate_hiregs()  argument
487 	int rdn = (insn & 0x7) | ((insn & 0x80) >> 4);  in t16_emulate_hiregs()
488 	int rm = (insn >> 3) & 0xf;  in t16_emulate_hiregs()
514 t16_decode_hiregs(probes_opcode_t insn, struct arch_probes_insn *asi,  in t16_decode_hiregs()  argument
517 	insn &= ~0x00ff;  in t16_decode_hiregs()
518 	insn |= 0x001; /* Set Rdn = R1 and Rm = R0 */  in t16_decode_hiregs()
519 	((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(insn);  in t16_decode_hiregs()
525 t16_emulate_push(probes_opcode_t insn,  in t16_emulate_push()  argument
544 t16_decode_push(probes_opcode_t insn, struct arch_probes_insn *asi,  in t16_decode_push()  argument
553 	((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(0xe929);  in t16_decode_push()
555 	((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0x1ff);  in t16_decode_push()
561 t16_emulate_pop_nopc(probes_opcode_t insn,  in t16_emulate_pop_nopc()  argument
580 t16_emulate_pop_pc(probes_opcode_t insn,  in t16_emulate_pop_pc()  argument
603 t16_decode_pop(probes_opcode_t insn, struct arch_probes_insn *asi,  in t16_decode_pop()  argument
612 	((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(0xe8b9);  in t16_decode_pop()
614 	((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0x1ff);  in t16_decode_pop()
615 	asi->insn_handler = insn & 0x100 ? t16_emulate_pop_pc  in t16_decode_pop()