Lines Matching refs:r7
33 and r7, r8, #15 << 24
34 add pc, pc, r7, lsr #22 @ Now branch to the relevant processing routine
65 mov r7, #0x11
66 orr r7, r7, #0x1100
67 and r6, r8, r7
68 and r9, r8, r7, lsl #1
70 and r9, r8, r7, lsl #2
72 and r9, r8, r7, lsl #3
78 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
80 subne r7, r7, r6, lsl #2 @ Undo increment
81 addeq r7, r7, r6, lsl #2 @ Undo decrement
82 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
98 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
100 subne r7, r7, r6 @ Undo incrmenet
101 addeq r7, r7, r6 @ Undo decrement
102 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
114 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
116 subne r7, r7, r6, lsr #20 @ Undo increment
117 addeq r7, r7, r6, lsr #20 @ Undo decrement
118 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
126 and r7, r8, #15 @ Extract 'm' from instruction
127 ldr r6, [r2, r7, lsl #2] @ Get register 'Rm'
131 and r7, r8, #0x70 @ get shift type
132 orreq r7, r7, #8 @ shift count = 0
133 add pc, pc, r7
173 and r7, r8, #15 << 12
174 add pc, pc, r7, lsr #10 @ lookup in table
211 movs r7, r8, lsr #9 @ C = r8 bit 8 (R bit)
214 ldr r7, [r2, #13 << 2]
216 addeq r7, r7, r6, lsl #2 @ increment SP if PUSH
217 subne r7, r7, r6, lsl #2 @ decrement SP if POP
218 str r7, [r2, #13 << 2]
232 ldr r7, [r2, r9, lsr #6]
234 sub r7, r7, r6, lsl #2 @ always decrement
235 str r7, [r2, r9, lsr #6]