Lines Matching refs:rv
45 #define checkuart(rp, rv, lhu, bit, uart) \ argument
67 .macro addruart, rp, rv, tmp
69 ldr \rv, [\rp] @ linked addr is stored there
70 sub \rv, \rv, \rp @ offset between the two
72 sub \tmp, \rp, \rv @ actual tegra_uart_config
76 mov \rv, #0 @ yes; record init is done
77 str \rv, [\tmp]
83 lsr \rv, \rp, #18 @ 19:18 are console type
84 and \rv, \rv, #3
85 cmp \rv, #2 @ 2 and 3 mean DCC, UART
87 cmp \rv, #3 @ so accept either
89 11: lsr \rv, \rp, #15 @ 17:15 are UART ID
90 and \rv, #7
91 cmp \rv, #0 @ UART 0?
93 cmp \rv, #1 @ UART 1?
95 cmp \rv, #2 @ UART 2?
97 cmp \rv, #3 @ UART 3?
99 cmp \rv, #4 @ UART 4?
107 20: checkuart(\rp, \rv, L, 6, A)
113 21: checkuart(\rp, \rv, L, 7, B)
119 22: checkuart(\rp, \rv, H, 23, C)
125 23: checkuart(\rp, \rv, U, 1, D)
132 checkuart(\rp, \rv, U, 2, E)
145 92: and \rv, \rp, #0xffffff @ offset within 1MB section
146 add \rv, \rv, #UART_VIRTUAL_BASE
147 str \rv, [\tmp, #8] @ Store in tegra_uart_virt
184 ldr \rv, [\tmp, #8] @ Load tegra_uart_virt