Lines Matching refs:clock
3 * Device Tree Source for AM33xx clock data
8 sys_clkin_ck: clock-sys-clkin-22@40 {
9 #clock-cells = <0>;
10 compatible = "ti,mux-clock";
11 clock-output-names = "sys_clkin_ck";
17 adc_tsc_fck: clock-adc-tsc-fck {
18 #clock-cells = <0>;
19 compatible = "fixed-factor-clock";
20 clock-output-names = "adc_tsc_fck";
22 clock-mult = <1>;
23 clock-div = <1>;
26 dcan0_fck: clock-dcan0-fck {
27 #clock-cells = <0>;
28 compatible = "fixed-factor-clock";
29 clock-output-names = "dcan0_fck";
31 clock-mult = <1>;
32 clock-div = <1>;
35 dcan1_fck: clock-dcan1-fck {
36 #clock-cells = <0>;
37 compatible = "fixed-factor-clock";
38 clock-output-names = "dcan1_fck";
40 clock-mult = <1>;
41 clock-div = <1>;
44 mcasp0_fck: clock-mcasp0-fck {
45 #clock-cells = <0>;
46 compatible = "fixed-factor-clock";
47 clock-output-names = "mcasp0_fck";
49 clock-mult = <1>;
50 clock-div = <1>;
53 mcasp1_fck: clock-mcasp1-fck {
54 #clock-cells = <0>;
55 compatible = "fixed-factor-clock";
56 clock-output-names = "mcasp1_fck";
58 clock-mult = <1>;
59 clock-div = <1>;
62 smartreflex0_fck: clock-smartreflex0-fck {
63 #clock-cells = <0>;
64 compatible = "fixed-factor-clock";
65 clock-output-names = "smartreflex0_fck";
67 clock-mult = <1>;
68 clock-div = <1>;
71 smartreflex1_fck: clock-smartreflex1-fck {
72 #clock-cells = <0>;
73 compatible = "fixed-factor-clock";
74 clock-output-names = "smartreflex1_fck";
76 clock-mult = <1>;
77 clock-div = <1>;
80 sha0_fck: clock-sha0-fck {
81 #clock-cells = <0>;
82 compatible = "fixed-factor-clock";
83 clock-output-names = "sha0_fck";
85 clock-mult = <1>;
86 clock-div = <1>;
89 aes0_fck: clock-aes0-fck {
90 #clock-cells = <0>;
91 compatible = "fixed-factor-clock";
92 clock-output-names = "aes0_fck";
94 clock-mult = <1>;
95 clock-div = <1>;
98 rng_fck: clock-rng-fck {
99 #clock-cells = <0>;
100 compatible = "fixed-factor-clock";
101 clock-output-names = "rng_fck";
103 clock-mult = <1>;
104 clock-div = <1>;
107 clock@664 {
110 #clock-cells = <2>;
113 ehrpwm0_tbclk: clock-ehrpwm0-tbclk {
114 #clock-cells = <0>;
115 compatible = "ti,gate-clock";
116 clock-output-names = "ehrpwm0_tbclk";
121 ehrpwm1_tbclk: clock-ehrpwm1-tbclk {
122 #clock-cells = <0>;
123 compatible = "ti,gate-clock";
124 clock-output-names = "ehrpwm1_tbclk";
129 ehrpwm2_tbclk: clock-ehrpwm2-tbclk {
130 #clock-cells = <0>;
131 compatible = "ti,gate-clock";
132 clock-output-names = "ehrpwm2_tbclk";
139 clk_32768_ck: clock-clk-32768 {
140 #clock-cells = <0>;
141 compatible = "fixed-clock";
142 clock-output-names = "clk_32768_ck";
143 clock-frequency = <32768>;
146 clk_rc32k_ck: clock-clk-rc32k {
147 #clock-cells = <0>;
148 compatible = "fixed-clock";
149 clock-output-names = "clk_rc32k_ck";
150 clock-frequency = <32000>;
153 virt_19200000_ck: clock-virt-19200000 {
154 #clock-cells = <0>;
155 compatible = "fixed-clock";
156 clock-output-names = "virt_19200000_ck";
157 clock-frequency = <19200000>;
160 virt_24000000_ck: clock-virt-24000000 {
161 #clock-cells = <0>;
162 compatible = "fixed-clock";
163 clock-output-names = "virt_24000000_ck";
164 clock-frequency = <24000000>;
167 virt_25000000_ck: clock-virt-25000000 {
168 #clock-cells = <0>;
169 compatible = "fixed-clock";
170 clock-output-names = "virt_25000000_ck";
171 clock-frequency = <25000000>;
174 virt_26000000_ck: clock-virt-26000000 {
175 #clock-cells = <0>;
176 compatible = "fixed-clock";
177 clock-output-names = "virt_26000000_ck";
178 clock-frequency = <26000000>;
181 tclkin_ck: clock-tclkin {
182 #clock-cells = <0>;
183 compatible = "fixed-clock";
184 clock-output-names = "tclkin_ck";
185 clock-frequency = <12000000>;
188 dpll_core_ck: clock@490 {
189 #clock-cells = <0>;
190 compatible = "ti,am3-dpll-core-clock";
191 clock-output-names = "dpll_core_ck";
196 dpll_core_x2_ck: clock-dpll-core-x2 {
197 #clock-cells = <0>;
198 compatible = "ti,am3-dpll-x2-clock";
199 clock-output-names = "dpll_core_x2_ck";
203 dpll_core_m4_ck: clock-dpll-core-m4@480 {
204 #clock-cells = <0>;
205 compatible = "ti,divider-clock";
206 clock-output-names = "dpll_core_m4_ck";
213 dpll_core_m5_ck: clock-dpll-core-m5@484 {
214 #clock-cells = <0>;
215 compatible = "ti,divider-clock";
216 clock-output-names = "dpll_core_m5_ck";
223 dpll_core_m6_ck: clock-dpll-core-m6@4d8 {
224 #clock-cells = <0>;
225 compatible = "ti,divider-clock";
226 clock-output-names = "dpll_core_m6_ck";
233 dpll_mpu_ck: clock@488 {
234 #clock-cells = <0>;
235 compatible = "ti,am3-dpll-clock";
236 clock-output-names = "dpll_mpu_ck";
241 dpll_mpu_m2_ck: clock-dpll-mpu-m2@4a8 {
242 #clock-cells = <0>;
243 compatible = "ti,divider-clock";
244 clock-output-names = "dpll_mpu_m2_ck";
251 dpll_ddr_ck: clock@494 {
252 #clock-cells = <0>;
253 compatible = "ti,am3-dpll-no-gate-clock";
254 clock-output-names = "dpll_ddr_ck";
259 dpll_ddr_m2_ck: clock-dpll-ddr-m2@4a0 {
260 #clock-cells = <0>;
261 compatible = "ti,divider-clock";
262 clock-output-names = "dpll_ddr_m2_ck";
269 dpll_ddr_m2_div2_ck: clock-dpll-ddr-m2-div2 {
270 #clock-cells = <0>;
271 compatible = "fixed-factor-clock";
272 clock-output-names = "dpll_ddr_m2_div2_ck";
274 clock-mult = <1>;
275 clock-div = <2>;
278 dpll_disp_ck: clock@498 {
279 #clock-cells = <0>;
280 compatible = "ti,am3-dpll-no-gate-clock";
281 clock-output-names = "dpll_disp_ck";
286 dpll_disp_m2_ck: clock-dpll-disp-m2@4a4 {
287 #clock-cells = <0>;
288 compatible = "ti,divider-clock";
289 clock-output-names = "dpll_disp_m2_ck";
297 dpll_per_ck: clock@48c {
298 #clock-cells = <0>;
299 compatible = "ti,am3-dpll-no-gate-j-type-clock";
300 clock-output-names = "dpll_per_ck";
305 dpll_per_m2_ck: clock-dpll-per-m2@4ac {
306 #clock-cells = <0>;
307 compatible = "ti,divider-clock";
308 clock-output-names = "dpll_per_m2_ck";
315 dpll_per_m2_div4_wkupdm_ck: clock-dpll-per-m2-div4-wkupdm {
316 #clock-cells = <0>;
317 compatible = "fixed-factor-clock";
318 clock-output-names = "dpll_per_m2_div4_wkupdm_ck";
320 clock-mult = <1>;
321 clock-div = <4>;
324 dpll_per_m2_div4_ck: clock-dpll-per-m2-div4 {
325 #clock-cells = <0>;
326 compatible = "fixed-factor-clock";
327 clock-output-names = "dpll_per_m2_div4_ck";
329 clock-mult = <1>;
330 clock-div = <4>;
333 clk_24mhz: clock-clk-24mhz {
334 #clock-cells = <0>;
335 compatible = "fixed-factor-clock";
336 clock-output-names = "clk_24mhz";
338 clock-mult = <1>;
339 clock-div = <8>;
342 clkdiv32k_ck: clock-clkdiv32k {
343 #clock-cells = <0>;
344 compatible = "fixed-factor-clock";
345 clock-output-names = "clkdiv32k_ck";
347 clock-mult = <1>;
348 clock-div = <732>;
351 l3_gclk: clock-l3-gclk {
352 #clock-cells = <0>;
353 compatible = "fixed-factor-clock";
354 clock-output-names = "l3_gclk";
356 clock-mult = <1>;
357 clock-div = <1>;
360 pruss_ocp_gclk: clock-pruss-ocp-gclk@530 {
361 #clock-cells = <0>;
362 compatible = "ti,mux-clock";
363 clock-output-names = "pruss_ocp_gclk";
368 mmu_fck: clock-mmu-fck-1@914 {
369 #clock-cells = <0>;
370 compatible = "ti,gate-clock";
371 clock-output-names = "mmu_fck";
377 timer1_fck: clock-timer1-fck@528 {
378 #clock-cells = <0>;
379 compatible = "ti,mux-clock";
380 clock-output-names = "timer1_fck";
385 timer2_fck: clock-timer2-fck@508 {
386 #clock-cells = <0>;
387 compatible = "ti,mux-clock";
388 clock-output-names = "timer2_fck";
393 timer3_fck: clock-timer3-fck@50c {
394 #clock-cells = <0>;
395 compatible = "ti,mux-clock";
396 clock-output-names = "timer3_fck";
401 timer4_fck: clock-timer4-fck@510 {
402 #clock-cells = <0>;
403 compatible = "ti,mux-clock";
404 clock-output-names = "timer4_fck";
409 timer5_fck: clock-timer5-fck@518 {
410 #clock-cells = <0>;
411 compatible = "ti,mux-clock";
412 clock-output-names = "timer5_fck";
417 timer6_fck: clock-timer6-fck@51c {
418 #clock-cells = <0>;
419 compatible = "ti,mux-clock";
420 clock-output-names = "timer6_fck";
425 timer7_fck: clock-timer7-fck@504 {
426 #clock-cells = <0>;
427 compatible = "ti,mux-clock";
428 clock-output-names = "timer7_fck";
433 usbotg_fck: clock-usbotg-fck-8@47c {
434 #clock-cells = <0>;
435 compatible = "ti,gate-clock";
436 clock-output-names = "usbotg_fck";
442 dpll_core_m4_div2_ck: clock-dpll-core-m4-div2 {
443 #clock-cells = <0>;
444 compatible = "fixed-factor-clock";
445 clock-output-names = "dpll_core_m4_div2_ck";
447 clock-mult = <1>;
448 clock-div = <2>;
451 ieee5000_fck: clock-ieee5000-fck-1@e4 {
452 #clock-cells = <0>;
453 compatible = "ti,gate-clock";
454 clock-output-names = "ieee5000_fck";
460 wdt1_fck: clock-wdt1-fck@538 {
461 #clock-cells = <0>;
462 compatible = "ti,mux-clock";
463 clock-output-names = "wdt1_fck";
468 l4_rtc_gclk: clock-l4-rtc-gclk {
469 #clock-cells = <0>;
470 compatible = "fixed-factor-clock";
471 clock-output-names = "l4_rtc_gclk";
473 clock-mult = <1>;
474 clock-div = <2>;
477 l4hs_gclk: clock-l4hs-gclk {
478 #clock-cells = <0>;
479 compatible = "fixed-factor-clock";
480 clock-output-names = "l4hs_gclk";
482 clock-mult = <1>;
483 clock-div = <1>;
486 l3s_gclk: clock-l3s-gclk {
487 #clock-cells = <0>;
488 compatible = "fixed-factor-clock";
489 clock-output-names = "l3s_gclk";
491 clock-mult = <1>;
492 clock-div = <1>;
495 l4fw_gclk: clock-l4fw-gclk {
496 #clock-cells = <0>;
497 compatible = "fixed-factor-clock";
498 clock-output-names = "l4fw_gclk";
500 clock-mult = <1>;
501 clock-div = <1>;
504 l4ls_gclk: clock-l4ls-gclk {
505 #clock-cells = <0>;
506 compatible = "fixed-factor-clock";
507 clock-output-names = "l4ls_gclk";
509 clock-mult = <1>;
510 clock-div = <1>;
513 sysclk_div_ck: clock-sysclk-div {
514 #clock-cells = <0>;
515 compatible = "fixed-factor-clock";
516 clock-output-names = "sysclk_div_ck";
518 clock-mult = <1>;
519 clock-div = <1>;
522 cpsw_125mhz_gclk: clock-cpsw-125mhz-gclk {
523 #clock-cells = <0>;
524 compatible = "fixed-factor-clock";
525 clock-output-names = "cpsw_125mhz_gclk";
527 clock-mult = <1>;
528 clock-div = <2>;
531 cpsw_cpts_rft_clk: clock-cpsw-cpts-rft@520 {
532 #clock-cells = <0>;
533 compatible = "ti,mux-clock";
534 clock-output-names = "cpsw_cpts_rft_clk";
539 gpio0_dbclk_mux_ck: clock-gpio0-dbclk-mux@53c {
540 #clock-cells = <0>;
541 compatible = "ti,mux-clock";
542 clock-output-names = "gpio0_dbclk_mux_ck";
547 lcd_gclk: clock-lcd-gclk@534 {
548 #clock-cells = <0>;
549 compatible = "ti,mux-clock";
550 clock-output-names = "lcd_gclk";
556 mmc_clk: clock-mmc {
557 #clock-cells = <0>;
558 compatible = "fixed-factor-clock";
559 clock-output-names = "mmc_clk";
561 clock-mult = <1>;
562 clock-div = <2>;
565 clock@52c {
568 #clock-cells = <2>;
571 gfx_fclk_clksel_ck: clock-gfx-fclk-clksel {
572 #clock-cells = <0>;
573 compatible = "ti,mux-clock";
574 clock-output-names = "gfx_fclk_clksel_ck";
579 gfx_fck_div_ck: clock-gfx-fck-div {
580 #clock-cells = <0>;
581 compatible = "ti,divider-clock";
582 clock-output-names = "gfx_fck_div_ck";
588 clock@700 {
591 #clock-cells = <2>;
594 sysclkout_pre_ck: clock-sysclkout-pre {
595 #clock-cells = <0>;
596 compatible = "ti,mux-clock";
597 clock-output-names = "sysclkout_pre_ck";
601 clkout2_div_ck: clock-clkout2-div {
602 #clock-cells = <0>;
603 compatible = "ti,divider-clock";
604 clock-output-names = "clkout2_div_ck";
610 clkout2_ck: clock-clkout2 {
611 #clock-cells = <0>;
612 compatible = "ti,gate-clock";
613 clock-output-names = "clkout2_ck";
621 per_cm: clock@0 {
623 clock-output-names = "per_cm";
629 l4ls_clkctrl: clock@38 {
631 clock-output-names = "l4ls_clkctrl";
633 #clock-cells = <2>;
636 l3s_clkctrl: clock@1c {
638 clock-output-names = "l3s_clkctrl";
640 #clock-cells = <2>;
643 l3_clkctrl: clock@24 {
645 clock-output-names = "l3_clkctrl";
647 #clock-cells = <2>;
650 l4hs_clkctrl: clock@120 {
652 clock-output-names = "l4hs_clkctrl";
654 #clock-cells = <2>;
657 pruss_ocp_clkctrl: clock@e8 {
659 clock-output-names = "pruss_ocp_clkctrl";
661 #clock-cells = <2>;
664 cpsw_125mhz_clkctrl: clock@0 {
666 clock-output-names = "cpsw_125mhz_clkctrl";
668 #clock-cells = <2>;
671 lcdc_clkctrl: clock@18 {
673 clock-output-names = "lcdc_clkctrl";
675 #clock-cells = <2>;
678 clk_24mhz_clkctrl: clock@14c {
680 clock-output-names = "clk_24mhz_clkctrl";
682 #clock-cells = <2>;
686 wkup_cm: clock@400 {
688 clock-output-names = "wkup_cm";
694 l4_wkup_clkctrl: clock@0 {
696 clock-output-names = "l4_wkup_clkctrl";
698 #clock-cells = <2>;
701 l3_aon_clkctrl: clock@14 {
703 clock-output-names = "l3_aon_clkctrl";
705 #clock-cells = <2>;
708 l4_wkup_aon_clkctrl: clock@b0 {
710 clock-output-names = "l4_wkup_aon_clkctrl";
712 #clock-cells = <2>;
716 mpu_cm: clock@600 {
718 clock-output-names = "mpu_cm";
724 mpu_clkctrl: clock@0 {
726 clock-output-names = "mpu_clkctrl";
728 #clock-cells = <2>;
732 l4_rtc_cm: clock@800 {
734 clock-output-names = "l4_rtc_cm";
740 l4_rtc_clkctrl: clock@0 {
742 clock-output-names = "l4_rtc_clkctrl";
744 #clock-cells = <2>;
748 gfx_l3_cm: clock@900 {
750 clock-output-names = "gfx_l3_cm";
756 gfx_l3_clkctrl: clock@0 {
758 clock-output-names = "gfx_l3_clkctrl";
760 #clock-cells = <2>;
764 l4_cefuse_cm: clock@a00 {
766 clock-output-names = "l4_cefuse_cm";
772 l4_cefuse_clkctrl: clock@0 {
774 clock-output-names = "l4_cefuse_clkctrl";
776 #clock-cells = <2>;