Lines Matching refs:clock
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
39 clocks = <&clock CLK_DOUT_ACLK400_DISP1>;
40 clock-names = "bus";
46 clocks = <&clock CLK_DOUT_ACLK300_DISP1>;
47 clock-names = "bus";
53 clocks = <&clock CLK_DOUT_ACLK200_FSYS>;
54 clock-names = "bus";
60 clocks = <&clock CLK_DOUT_ACLK200_FSYS2>;
61 clock-names = "bus";
67 clocks = <&clock CLK_DOUT_PCLK200_FSYS>;
68 clock-names = "bus";
74 clocks = <&clock CLK_DOUT_ACLK333_G2D>;
75 clock-names = "bus";
81 clocks = <&clock CLK_DOUT_ACLK266_G2D>;
82 clock-names = "bus";
87 clocks = <&clock CLK_DOUT_ACLK266>;
88 clock-names = "bus";
94 clocks = <&clock CLK_DOUT_ACLK300_GSCL>;
95 clock-names = "bus";
101 clocks = <&clock CLK_DOUT_ACLK300_JPEG>;
102 clock-names = "bus";
108 clocks = <&clock CLK_DOUT_ACLK166>;
109 clock-names = "bus";
115 clocks = <&clock CLK_DOUT_ACLK333>;
116 clock-names = "bus";
122 clocks = <&clock CLK_DOUT_ACLK400_MSCL>;
123 clock-names = "bus";
129 clocks = <&clock CLK_DOUT_ACLK100_NOC>;
130 clock-names = "bus";
136 clocks = <&clock CLK_DOUT_ACLK66>;
137 clock-names = "bus";
143 clocks = <&clock CLK_DOUT_ACLK400_WCORE>;
144 clock-names = "bus";
160 clock-latency-ns = <140000>;
165 clock-latency-ns = <140000>;
170 clock-latency-ns = <140000>;
175 clock-latency-ns = <140000>;
180 clock-latency-ns = <140000>;
185 clock-latency-ns = <140000>;
190 clock-latency-ns = <140000>;
195 clock-latency-ns = <140000>;
200 clock-latency-ns = <140000>;
205 clock-latency-ns = <140000>;
210 clock-latency-ns = <140000>;
215 clock-latency-ns = <140000>;
226 clock-latency-ns = <140000>;
231 clock-latency-ns = <140000>;
236 clock-latency-ns = <140000>;
241 clock-latency-ns = <140000>;
246 clock-latency-ns = <140000>;
251 clock-latency-ns = <140000>;
256 clock-latency-ns = <140000>;
261 clock-latency-ns = <140000>;
285 clock: clock-controller@10010000 { label
286 compatible = "samsung,exynos5420-clock", "syscon";
288 #clock-cells = <1>;
291 clock_audss: audss-clock-controller@3810000 {
292 compatible = "samsung,exynos5420-audss-clock";
294 #clock-cells = <1>;
295 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
296 <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
297 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
305 clocks = <&clock CLK_MFC>;
306 clock-names = "mfc";
318 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
319 clock-names = "biu", "ciu";
330 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
331 clock-names = "biu", "ciu";
342 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
343 clock-names = "biu", "ciu";
351 clocks = <&clock CLK_FOUT_SPLL>,
352 <&clock CLK_MOUT_SCLK_SPLL>,
353 <&clock CLK_FF_DOUT_SPLL2>,
354 <&clock CLK_FOUT_BPLL>,
355 <&clock CLK_MOUT_BPLL>,
356 <&clock CLK_SCLK_BPLL>,
357 <&clock CLK_MOUT_MX_MSPLL_CCORE>,
358 <&clock CLK_MOUT_MCLK_CDREX>;
359 clock-names = "fout_spll",
367 samsung,syscon-clk = <&clock>;
410 clocks = <&clock CLK_PCLK_PPMU_DREX0_0>;
411 clock-names = "ppmu";
422 clocks = <&clock CLK_PCLK_PPMU_DREX0_1>;
423 clock-names = "ppmu";
434 clocks = <&clock CLK_PCLK_PPMU_DREX1_0>;
435 clock-names = "ppmu";
446 clocks = <&clock CLK_PCLK_PPMU_DREX1_1>;
447 clock-names = "ppmu";
546 clock-names = "apb_pclk";
555 clocks = <&clock CLK_PDMA0>;
556 clock-names = "apb_pclk";
564 clocks = <&clock CLK_PDMA1>;
565 clock-names = "apb_pclk";
573 clocks = <&clock CLK_MDMA0>;
574 clock-names = "apb_pclk";
582 clocks = <&clock CLK_MDMA1>;
583 clock-names = "apb_pclk";
605 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
606 #clock-cells = <1>;
607 clock-output-names = "i2s_cdclk0";
622 clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
623 clock-names = "iis", "i2s_opclk0";
624 #clock-cells = <1>;
625 clock-output-names = "i2s_cdclk1";
638 clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>;
639 clock-names = "iis", "i2s_opclk0";
640 #clock-cells = <1>;
641 clock-output-names = "i2s_cdclk2";
659 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
660 clock-names = "spi", "spi_busclk0";
675 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
676 clock-names = "spi", "spi_busclk0";
691 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
692 clock-names = "spi", "spi_busclk0";
702 clocks = <&clock CLK_DSIM1>, <&clock CLK_SCLK_MIPI1>;
703 clock-names = "bus_clk", "pll_clk";
717 clocks = <&clock CLK_USI4>;
718 clock-names = "hsi2c";
730 clocks = <&clock CLK_USI5>;
731 clock-names = "hsi2c";
743 clocks = <&clock CLK_USI6>;
744 clock-names = "hsi2c";
752 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
753 <&clock CLK_DOUT_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
754 <&clock CLK_MOUT_HDMI>;
755 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
772 clocks = <&clock CLK_HDMI_CEC>;
773 clock-names = "hdmicec";
785 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
786 <&clock CLK_SCLK_HDMI>;
787 clock-names = "mixer", "hdmi", "sclk_hdmi";
797 clocks = <&clock CLK_ROTATOR>;
798 clock-names = "rotator";
806 clocks = <&clock CLK_GSCL0>;
807 clock-names = "gscl";
816 clocks = <&clock CLK_GSCL1>;
817 clock-names = "gscl";
830 clocks = <&clock CLK_G3D>;
831 clock-names = "core";
876 clocks = <&clock CLK_MSCL0>;
877 clock-names = "mscl";
886 clocks = <&clock CLK_MSCL1>;
887 clock-names = "mscl";
896 clocks = <&clock CLK_MSCL2>;
897 clock-names = "mscl";
906 clock-names = "jpeg";
907 clocks = <&clock CLK_JPEG>;
915 clock-names = "jpeg";
916 clocks = <&clock CLK_JPEG2>;
923 clock-names = "clkout16";
924 clocks = <&clock CLK_FIN_PLL>;
925 #clock-cells = <1>;
945 clocks = <&clock CLK_TMU>;
946 clock-names = "tmu_apbif";
954 clocks = <&clock CLK_TMU>;
955 clock-names = "tmu_apbif";
963 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
964 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
972 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
973 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
981 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
982 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
991 clock-names = "sysmmu", "master";
992 clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
1001 clock-names = "sysmmu", "master";
1002 clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
1011 clock-names = "sysmmu", "master";
1012 clocks = <&clock CLK_SMMU_MIXER>, <&clock CLK_MIXER>;
1022 clock-names = "sysmmu", "master";
1023 clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
1033 clock-names = "sysmmu", "master";
1034 clocks = <&clock CLK_SMMU_GSCL1>, <&clock CLK_GSCL1>;
1044 clock-names = "sysmmu", "master";
1045 clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>;
1054 clock-names = "sysmmu", "master";
1055 clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>;
1064 clock-names = "sysmmu", "master";
1065 clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>;
1075 clock-names = "sysmmu", "master";
1076 clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>;
1086 clock-names = "sysmmu", "master";
1087 clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>;
1097 clock-names = "sysmmu", "master";
1098 clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>;
1108 clock-names = "sysmmu", "master";
1109 clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>;
1118 clock-names = "sysmmu", "master";
1119 clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
1127 clock-names = "sysmmu", "master";
1128 clocks = <&clock CLK_SMMU_JPEG2>, <&clock CLK_JPEG2>;
1137 clock-names = "sysmmu", "master";
1138 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
1148 clock-names = "sysmmu", "master";
1149 clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
1159 clock-names = "sysmmu", "master";
1160 clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>;
1170 clock-names = "sysmmu", "master";
1171 clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>;
1202 clocks = <&clock CLK_TSADC>;
1203 clock-names = "adc";
1208 clocks = <&clock CLK_DP1>;
1209 clock-names = "dp";
1217 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
1218 clock-names = "sclk_fimd", "fimd";
1226 clocks = <&clock CLK_G2D>;
1227 clock-names = "fimg2d";
1232 clocks = <&clock CLK_I2C0>;
1233 clock-names = "i2c";
1239 clocks = <&clock CLK_I2C1>;
1240 clock-names = "i2c";
1246 clocks = <&clock CLK_I2C2>;
1247 clock-names = "i2c";
1253 clocks = <&clock CLK_I2C3>;
1254 clock-names = "i2c";
1260 clocks = <&clock CLK_USI0>;
1261 clock-names = "hsi2c";
1267 clocks = <&clock CLK_USI1>;
1268 clock-names = "hsi2c";
1274 clocks = <&clock CLK_USI2>;
1275 clock-names = "hsi2c";
1281 clocks = <&clock CLK_USI3>;
1282 clock-names = "hsi2c";
1288 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
1289 clock-names = "fin_pll", "mct";
1293 clocks = <&clock CLK_SSS>;
1294 clock-names = "secss";
1298 clocks = <&clock CLK_PWM>;
1299 clock-names = "timers";
1303 clocks = <&clock CLK_RTC>;
1304 clock-names = "rtc";
1310 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
1311 clock-names = "uart", "clk_uart_baud0";
1317 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
1318 clock-names = "uart", "clk_uart_baud0";
1324 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
1325 clock-names = "uart", "clk_uart_baud0";
1331 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
1332 clock-names = "uart", "clk_uart_baud0";
1338 clocks = <&clock CLK_SSS>;
1339 clock-names = "secss";
1343 clocks = <&clock CLK_SSS>;
1344 clock-names = "secss";
1348 clocks = <&clock CLK_USBD300>;
1349 clock-names = "usbdrd30";
1353 clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
1354 clock-names = "phy", "ref";
1359 clocks = <&clock CLK_USBD301>;
1360 clock-names = "usbdrd30";
1368 clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
1369 clock-names = "phy", "ref";
1374 clocks = <&clock CLK_USBH20>;
1375 clock-names = "usbhost";
1379 clocks = <&clock CLK_USBH20>;
1380 clock-names = "usbhost";
1384 clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
1385 clock-names = "phy", "ref";
1391 clocks = <&clock CLK_WDT>;
1392 clock-names = "watchdog";