Lines Matching refs:dfl
216 (/sys/class/fpga_region/regionX/dfl-fme.n/):
288 (/sys/class/fpga_region/<regionX>/<dfl-port.m>/):
332 (Please refer to drivers/fpga/dfl.c for detailed enumeration APIs).
483 (e.g. "dfl-port.n" or "dfl-fme.m" is found), then it's the base
488 /sys/class/fpga_region/region0/dfl-fme.0
489 /sys/class/fpga_region/region0/dfl-port.0
490 /sys/class/fpga_region/region0/dfl-port.1
493 /sys/class/fpga_region/region3/dfl-fme.1
494 /sys/class/fpga_region/region3/dfl-port.2
495 /sys/class/fpga_region/region3/dfl-port.3
500 /sys/class/fpga_region/<regionX>/<dfl-fme.n>/
501 /sys/class/fpga_region/<regionX>/<dfl-port.m>/
508 /sys/class/fpga_region/<regionX>/<dfl-fme.n>/dev
509 /sys/class/fpga_region/<regionX>/<dfl-port.n>/dev
621 FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c)
626 https://github.com/OPAE/dfl-feature-id