Lines Matching refs:ordering
1 This document gives an overview of the categories of memory-ordering
8 This section lists LKMM's three top-level categories of memory-ordering
20 3. Unordered accesses, as the name indicates, have no ordering
23 some of these "unordered" operations provide limited ordering
38 b. Read-modify-write (RMW) ordering augmentation barriers.
50 ordering primitives provided for that purpose. For example, instead of
58 The Linux-kernel primitives that provide full ordering include:
79 memory-ordering primitives. It is surprisingly hard to remember their
82 Second, some RMW atomic operations provide full ordering. These
87 as cmpxchg() are only guaranteed to provide ordering when they succeed.
88 When RMW atomic operations provide full ordering, they partition the
101 with void return types) do not guarantee any ordering whatsoever. Nor do
106 operations such as atomic_read() do not guarantee full ordering, and
110 _release provide limited ordering, and will be described later in this
113 Finally, RCU's grace-period primitives provide full ordering. These
119 typically instead used to provide ordering against RCU read-side critical
130 such as atomic_inc() and atomic_dec() guarantee no ordering whatsoever.
132 full ordering for these primitives. One way to obtain full ordering on
141 x86, on which atomic_inc() provides full ordering all by itself.
150 atomic_inc() implementations do not guarantee full ordering, thus
154 o smp_mb__before_atomic(), which provides full ordering prior
158 ordering subsequent to an unordered RMW atomic operation.
160 o smp_mb__after_spinlock(), which provides full ordering subsequent
164 o smp_mb__after_srcu_read_unlock(), which provides full ordering
168 operation whose ordering that it is augmenting. The reason is that the
169 ordering of this intervening code will differ from one CPU architecture
187 Note that smp_wmb() might fail to provide ordering for unmarked C-language
225 does not constrain hardware memory ordering. For example, this can be
251 c. RCU read-side ordering.
279 ordering, and an smp_mb() would be needed instead:
286 smp_store_release(), which still provides the needed ordering of "x"
290 provides the needed ordering.
307 Note that release ordering is guaranteed only against the
310 as cmpxchg_release() are only guaranteed to provide ordering
333 improves upon smp_rmb() by ordering against subsequent stores as well
344 Note that acquire ordering is guaranteed only against the
348 ordering when they succeed.
368 ordering.
421 In short, you can use a control dependency to enforce ordering between
453 all the CPUs will agree on the operation order. Of course, the ordering
463 hardware ordering guarantees, and in fact many CPUs will happily
471 hardware ordering guarantees, and in fact many CPUs will happily
500 C11 atomic variables. These operations provide no ordering guarantees,
512 primitive can be helpful, as can the various ordering primitives discussed