141 	struct atmel_ssc_info *ssc_p = dev_id;  in atmel_ssc_interrupt()  local
147 	ssc_sr = (unsigned long)ssc_readl(ssc_p->ssc->regs, SR)  in atmel_ssc_interrupt()
148 			& (unsigned long)ssc_readl(ssc_p->ssc->regs, IMR);  in atmel_ssc_interrupt()
156 	for (i = 0; i < ARRAY_SIZE(ssc_p->dma_params); i++) {  in atmel_ssc_interrupt()
157 		dma_params = ssc_p->dma_params[i];  in atmel_ssc_interrupt()
194 	struct atmel_ssc_info *ssc_p = rule->private;  in atmel_ssc_hw_rule_rate()  local
195 	struct ssc_device *ssc = ssc_p->ssc;  in atmel_ssc_hw_rule_rate()
212 	switch (ssc_p->daifmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {  in atmel_ssc_hw_rule_rate()
214 		if ((ssc_p->dir_mask & SSC_DIR_MASK_CAPTURE)  in atmel_ssc_hw_rule_rate()
224 		if ((ssc_p->dir_mask & SSC_DIR_MASK_PLAYBACK)  in atmel_ssc_hw_rule_rate()
235 	switch (ssc_p->daifmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {  in atmel_ssc_hw_rule_rate()
237 		r.num = ssc_p->mck_rate / mck_div / frame_size;  in atmel_ssc_hw_rule_rate()
249 		t.max = ssc_p->mck_rate / mck_div / frame_size;  in atmel_ssc_hw_rule_rate()
273 	struct atmel_ssc_info *ssc_p = &ssc_info[pdev->id];  in atmel_ssc_startup()  local
279 		ssc_readl(ssc_p->ssc->regs, SR));  in atmel_ssc_startup()
283 	ret = clk_enable(ssc_p->ssc->clk);  in atmel_ssc_startup()
287 	ssc_p->mck_rate = clk_get_rate(ssc_p->ssc->clk);  in atmel_ssc_startup()
290 	if (!ssc_p->initialized)  in atmel_ssc_startup()
291 		ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));  in atmel_ssc_startup()
304 				  ssc_p,  in atmel_ssc_startup()
313 	dma_params->ssc = ssc_p->ssc;  in atmel_ssc_startup()
316 	ssc_p->dma_params[dir] = dma_params;  in atmel_ssc_startup()
320 	if (ssc_p->dir_mask & dir_mask)  in atmel_ssc_startup()
323 	ssc_p->dir_mask |= dir_mask;  in atmel_ssc_startup()
336 	struct atmel_ssc_info *ssc_p = &ssc_info[pdev->id];  in atmel_ssc_shutdown()  local
345 	dma_params = ssc_p->dma_params[dir];  in atmel_ssc_shutdown()
350 		ssc_p->dma_params[dir] = NULL;  in atmel_ssc_shutdown()
355 	ssc_p->dir_mask &= ~dir_mask;  in atmel_ssc_shutdown()
356 	if (!ssc_p->dir_mask) {  in atmel_ssc_shutdown()
357 		if (ssc_p->initialized) {  in atmel_ssc_shutdown()
358 			free_irq(ssc_p->ssc->irq, ssc_p);  in atmel_ssc_shutdown()
359 			ssc_p->initialized = 0;  in atmel_ssc_shutdown()
363 		ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));  in atmel_ssc_shutdown()
365 		ssc_p->cmr_div = ssc_p->tcmr_period = ssc_p->rcmr_period = 0;  in atmel_ssc_shutdown()
366 		ssc_p->forced_divider = 0;  in atmel_ssc_shutdown()
371 	clk_disable(ssc_p->ssc->clk);  in atmel_ssc_shutdown()
382 	struct atmel_ssc_info *ssc_p = &ssc_info[pdev->id];  in atmel_ssc_set_dai_fmt()  local
384 	ssc_p->daifmt = fmt;  in atmel_ssc_set_dai_fmt()
395 	struct atmel_ssc_info *ssc_p = &ssc_info[pdev->id];  in atmel_ssc_set_dai_clkdiv()  local
404 		if (ssc_p->dir_mask !=  in atmel_ssc_set_dai_clkdiv()
406 			ssc_p->cmr_div = div;  in atmel_ssc_set_dai_clkdiv()
407 		else if (ssc_p->cmr_div == 0)  in atmel_ssc_set_dai_clkdiv()
408 			ssc_p->cmr_div = div;  in atmel_ssc_set_dai_clkdiv()
410 			if (div != ssc_p->cmr_div)  in atmel_ssc_set_dai_clkdiv()
412 		ssc_p->forced_divider |= BIT(ATMEL_SSC_CMR_DIV);  in atmel_ssc_set_dai_clkdiv()
416 		ssc_p->tcmr_period = div;  in atmel_ssc_set_dai_clkdiv()
417 		ssc_p->forced_divider |= BIT(ATMEL_SSC_TCMR_PERIOD);  in atmel_ssc_set_dai_clkdiv()
421 		ssc_p->rcmr_period = div;  in atmel_ssc_set_dai_clkdiv()
422 		ssc_p->forced_divider |= BIT(ATMEL_SSC_RCMR_PERIOD);  in atmel_ssc_set_dai_clkdiv()
433 static int atmel_ssc_cfs(struct atmel_ssc_info *ssc_p)  in atmel_ssc_cfs()  argument
435 	switch (ssc_p->daifmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {  in atmel_ssc_cfs()
444 static int atmel_ssc_cbs(struct atmel_ssc_info *ssc_p)  in atmel_ssc_cbs()  argument
446 	switch (ssc_p->daifmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {  in atmel_ssc_cbs()
463 	struct atmel_ssc_info *ssc_p = &ssc_info[id];  in atmel_ssc_hw_params()  local
464 	struct ssc_device *ssc = ssc_p->ssc;  in atmel_ssc_hw_params()
488 	cmr_div = ssc_p->cmr_div;  in atmel_ssc_hw_params()
489 	if (!(ssc_p->forced_divider & BIT(ATMEL_SSC_CMR_DIV)) &&  in atmel_ssc_hw_params()
490 	    atmel_ssc_cbs(ssc_p)) {  in atmel_ssc_hw_params()
499 		cmr_div = DIV_ROUND_CLOSEST(ssc_p->mck_rate, 2 * bclk_rate);  in atmel_ssc_hw_params()
506 	tcmr_period = ssc_p->tcmr_period;  in atmel_ssc_hw_params()
507 	rcmr_period = ssc_p->rcmr_period;  in atmel_ssc_hw_params()
508 	if (atmel_ssc_cfs(ssc_p)) {  in atmel_ssc_hw_params()
518 		if (!(ssc_p->forced_divider & BIT(ATMEL_SSC_TCMR_PERIOD)))  in atmel_ssc_hw_params()
520 		if (!(ssc_p->forced_divider & BIT(ATMEL_SSC_RCMR_PERIOD)))  in atmel_ssc_hw_params()
524 	dma_params = ssc_p->dma_params[dir];  in atmel_ssc_hw_params()
560 	switch (ssc_p->daifmt & SND_SOC_DAIFMT_FORMAT_MASK) {  in atmel_ssc_hw_params()
599 			ssc_p->daifmt);  in atmel_ssc_hw_params()
603 	if (!atmel_ssc_cfs(ssc_p)) {  in atmel_ssc_hw_params()
612 	if (atmel_ssc_cbs(ssc_p)) {  in atmel_ssc_hw_params()
670 	if (!ssc_p->initialized) {  in atmel_ssc_hw_params()
671 		if (!ssc_p->ssc->pdata->use_dma) {  in atmel_ssc_hw_params()
672 			ssc_writel(ssc_p->ssc->regs, PDC_RPR, 0);  in atmel_ssc_hw_params()
673 			ssc_writel(ssc_p->ssc->regs, PDC_RCR, 0);  in atmel_ssc_hw_params()
674 			ssc_writel(ssc_p->ssc->regs, PDC_RNPR, 0);  in atmel_ssc_hw_params()
675 			ssc_writel(ssc_p->ssc->regs, PDC_RNCR, 0);  in atmel_ssc_hw_params()
677 			ssc_writel(ssc_p->ssc->regs, PDC_TPR, 0);  in atmel_ssc_hw_params()
678 			ssc_writel(ssc_p->ssc->regs, PDC_TCR, 0);  in atmel_ssc_hw_params()
679 			ssc_writel(ssc_p->ssc->regs, PDC_TNPR, 0);  in atmel_ssc_hw_params()
680 			ssc_writel(ssc_p->ssc->regs, PDC_TNCR, 0);  in atmel_ssc_hw_params()
683 		ret = request_irq(ssc_p->ssc->irq, atmel_ssc_interrupt, 0,  in atmel_ssc_hw_params()
684 				ssc_p->name, ssc_p);  in atmel_ssc_hw_params()
689 			clk_disable(ssc_p->ssc->clk);  in atmel_ssc_hw_params()
693 		ssc_p->initialized = 1;  in atmel_ssc_hw_params()
697 	ssc_writel(ssc_p->ssc->regs, CMR, cmr_div);  in atmel_ssc_hw_params()
700 	ssc_writel(ssc_p->ssc->regs, RCMR, rcmr);  in atmel_ssc_hw_params()
701 	ssc_writel(ssc_p->ssc->regs, RFMR, rfmr);  in atmel_ssc_hw_params()
704 	ssc_writel(ssc_p->ssc->regs, TCMR, tcmr);  in atmel_ssc_hw_params()
705 	ssc_writel(ssc_p->ssc->regs, TFMR, tfmr);  in atmel_ssc_hw_params()
716 	struct atmel_ssc_info *ssc_p = &ssc_info[pdev->id];  in atmel_ssc_prepare()  local
725 	dma_params = ssc_p->dma_params[dir];  in atmel_ssc_prepare()
727 	ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable);  in atmel_ssc_prepare()
728 	ssc_writel(ssc_p->ssc->regs, IDR, dma_params->mask->ssc_error);  in atmel_ssc_prepare()
732 			ssc_readl(ssc_p->ssc->regs, SR));  in atmel_ssc_prepare()
740 	struct atmel_ssc_info *ssc_p = &ssc_info[pdev->id];  in atmel_ssc_trigger()  local
749 	dma_params = ssc_p->dma_params[dir];  in atmel_ssc_trigger()
755 		ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_enable);  in atmel_ssc_trigger()
758 		ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable);  in atmel_ssc_trigger()
767 	struct atmel_ssc_info *ssc_p;  in atmel_ssc_suspend()  local
773 	ssc_p = &ssc_info[pdev->id];  in atmel_ssc_suspend()
776 	ssc_p->ssc_state.ssc_sr = ssc_readl(ssc_p->ssc->regs, SR);  in atmel_ssc_suspend()
777 	ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_TXDIS) | SSC_BIT(CR_RXDIS));  in atmel_ssc_suspend()
780 	ssc_p->ssc_state.ssc_imr = ssc_readl(ssc_p->ssc->regs, IMR);  in atmel_ssc_suspend()
781 	ssc_writel(ssc_p->ssc->regs, IDR, ssc_p->ssc_state.ssc_imr);  in atmel_ssc_suspend()
783 	ssc_p->ssc_state.ssc_cmr = ssc_readl(ssc_p->ssc->regs, CMR);  in atmel_ssc_suspend()
784 	ssc_p->ssc_state.ssc_rcmr = ssc_readl(ssc_p->ssc->regs, RCMR);  in atmel_ssc_suspend()
785 	ssc_p->ssc_state.ssc_rfmr = ssc_readl(ssc_p->ssc->regs, RFMR);  in atmel_ssc_suspend()
786 	ssc_p->ssc_state.ssc_tcmr = ssc_readl(ssc_p->ssc->regs, TCMR);  in atmel_ssc_suspend()
787 	ssc_p->ssc_state.ssc_tfmr = ssc_readl(ssc_p->ssc->regs, TFMR);  in atmel_ssc_suspend()
794 	struct atmel_ssc_info *ssc_p;  in atmel_ssc_resume()  local
801 	ssc_p = &ssc_info[pdev->id];  in atmel_ssc_resume()
804 	ssc_writel(ssc_p->ssc->regs, TFMR, ssc_p->ssc_state.ssc_tfmr);  in atmel_ssc_resume()
805 	ssc_writel(ssc_p->ssc->regs, TCMR, ssc_p->ssc_state.ssc_tcmr);  in atmel_ssc_resume()
806 	ssc_writel(ssc_p->ssc->regs, RFMR, ssc_p->ssc_state.ssc_rfmr);  in atmel_ssc_resume()
807 	ssc_writel(ssc_p->ssc->regs, RCMR, ssc_p->ssc_state.ssc_rcmr);  in atmel_ssc_resume()
808 	ssc_writel(ssc_p->ssc->regs, CMR, ssc_p->ssc_state.ssc_cmr);  in atmel_ssc_resume()
811 	ssc_writel(ssc_p->ssc->regs, IER, ssc_p->ssc_state.ssc_imr);  in atmel_ssc_resume()
816 	    (ssc_p->ssc_state.ssc_sr & SSC_BIT(SR_RXEN)) ? SSC_BIT(CR_RXEN) : 0;  in atmel_ssc_resume()
818 	    (ssc_p->ssc_state.ssc_sr & SSC_BIT(SR_TXEN)) ? SSC_BIT(CR_TXEN) : 0;  in atmel_ssc_resume()
819 	ssc_writel(ssc_p->ssc->regs, CR, cr);  in atmel_ssc_resume()