Lines Matching refs:mgr
58 static int mixart_set_pipe_state(struct mixart_mgr *mgr, in mixart_set_pipe_state() argument
76 dev_err(&mgr->pci->dev, in mixart_set_pipe_state()
90 err = snd_mixart_send_msg_wait_notif(mgr, &request, system_msg_uid); in mixart_set_pipe_state()
92 dev_err(&mgr->pci->dev, in mixart_set_pipe_state()
112 err = snd_mixart_send_msg(mgr, &request, sizeof(group_state_resp), &group_state_resp); in mixart_set_pipe_state()
114 dev_err(&mgr->pci->dev, in mixart_set_pipe_state()
125 err = snd_mixart_send_msg(mgr, &request, sizeof(group_state_resp), &group_state_resp); in mixart_set_pipe_state()
127 dev_err(&mgr->pci->dev, in mixart_set_pipe_state()
140 err = snd_mixart_send_msg(mgr, &request, sizeof(stat), &stat); in mixart_set_pipe_state()
142 dev_err(&mgr->pci->dev, in mixart_set_pipe_state()
157 static int mixart_set_clock(struct mixart_mgr *mgr, in mixart_set_clock() argument
176 dev_err(&mgr->pci->dev, in mixart_set_clock()
190 dev_dbg(&mgr->pci->dev, "mixart_set_clock to %d kHz\n", rate); in mixart_set_clock()
193 request.uid = mgr->uid_console_manager; in mixart_set_clock()
197 err = snd_mixart_send_msg(mgr, &request, sizeof(clock_prop_resp), &clock_prop_resp); in mixart_set_clock()
199 dev_err(&mgr->pci->dev, in mixart_set_clock()
289 flowinfo = (struct mixart_flowinfo *)chip->mgr->flowinfo.area; in snd_mixart_add_ref_pipe()
290 …flowinfo[j].bufferinfo_array_phy_address = (u32)chip->mgr->bufferinfo.addr + (j * sizeof(struct mi… in snd_mixart_add_ref_pipe()
293 bufferinfo = (struct mixart_bufferinfo *)chip->mgr->bufferinfo.area; in snd_mixart_add_ref_pipe()
304 err = snd_mixart_send_msg(chip->mgr, &request, sizeof(buf->sgroup_resp), &buf->sgroup_resp); in snd_mixart_add_ref_pipe()
328 int snd_mixart_kill_ref_pipe(struct mixart_mgr *mgr, in snd_mixart_kill_ref_pipe() argument
347 err = mixart_set_clock( mgr, pipe, 0); in snd_mixart_kill_ref_pipe()
349 dev_err(&mgr->pci->dev, in snd_mixart_kill_ref_pipe()
354 err = mixart_set_pipe_state(mgr, pipe, 0); in snd_mixart_kill_ref_pipe()
356 dev_err(&mgr->pci->dev, "error stopping pipe!\n"); in snd_mixart_kill_ref_pipe()
365 err = snd_mixart_send_msg(mgr, &request, sizeof(delete_resp), &delete_resp); in snd_mixart_kill_ref_pipe()
367 dev_err(&mgr->pci->dev, in snd_mixart_kill_ref_pipe()
409 return snd_mixart_send_msg_nonblock(chip->mgr, &request); in mixart_set_stream_state()
460 static int mixart_sync_nonblock_events(struct mixart_mgr *mgr) in mixart_sync_nonblock_events() argument
463 while (atomic_read(&mgr->msg_processed) > 0) { in mixart_sync_nonblock_events()
465 dev_err(&mgr->pci->dev, in mixart_sync_nonblock_events()
486 mixart_sync_nonblock_events(chip->mgr); in snd_mixart_prepare()
490 if(chip->mgr->ref_count_rate == 1) in snd_mixart_prepare()
491 chip->mgr->sample_rate = subs->runtime->rate; in snd_mixart_prepare()
495 if( mixart_set_clock(chip->mgr, stream->pipe, subs->runtime->rate) ) in snd_mixart_prepare()
518 stream_param.sampling_freq = chip->mgr->sample_rate; in mixart_set_format()
576 err = snd_mixart_send_msg(chip->mgr, &request, sizeof(resp), &resp); in mixart_set_format()
594 struct mixart_mgr *mgr = chip->mgr; in snd_mixart_hw_params() local
606 mutex_lock(&mgr->setup_mutex); in snd_mixart_hw_params()
622 mutex_unlock(&mgr->setup_mutex); in snd_mixart_hw_params()
633 bufferinfo = (struct mixart_bufferinfo *)chip->mgr->bufferinfo.area; in snd_mixart_hw_params()
644 mutex_unlock(&mgr->setup_mutex); in snd_mixart_hw_params()
652 mixart_sync_nonblock_events(chip->mgr); in snd_mixart_hw_free()
707 struct mixart_mgr *mgr = chip->mgr; in snd_mixart_playback_open() local
715 mutex_lock(&mgr->setup_mutex); in snd_mixart_playback_open()
750 err = mixart_set_pipe_state(chip->mgr, pipe, 1); in snd_mixart_playback_open()
753 snd_mixart_kill_ref_pipe(chip->mgr, pipe, 0); in snd_mixart_playback_open()
770 if(mgr->ref_count_rate++) { in snd_mixart_playback_open()
771 if(mgr->sample_rate) { in snd_mixart_playback_open()
772 runtime->hw.rate_min = runtime->hw.rate_max = mgr->sample_rate; in snd_mixart_playback_open()
777 mutex_unlock(&mgr->setup_mutex); in snd_mixart_playback_open()
786 struct mixart_mgr *mgr = chip->mgr; in snd_mixart_capture_open() local
794 mutex_lock(&mgr->setup_mutex); in snd_mixart_capture_open()
831 err = mixart_set_pipe_state(chip->mgr, pipe, 1); in snd_mixart_capture_open()
834 snd_mixart_kill_ref_pipe(chip->mgr, pipe, 0); in snd_mixart_capture_open()
851 if(mgr->ref_count_rate++) { in snd_mixart_capture_open()
852 if(mgr->sample_rate) { in snd_mixart_capture_open()
853 runtime->hw.rate_min = runtime->hw.rate_max = mgr->sample_rate; in snd_mixart_capture_open()
858 mutex_unlock(&mgr->setup_mutex); in snd_mixart_capture_open()
868 struct mixart_mgr *mgr = chip->mgr; in snd_mixart_close() local
871 mutex_lock(&mgr->setup_mutex); in snd_mixart_close()
877 if(--mgr->ref_count_rate == 0) { in snd_mixart_close()
878 mgr->sample_rate = 0; in snd_mixart_close()
882 if (snd_mixart_kill_ref_pipe(mgr, stream->pipe, 0 ) < 0) { in snd_mixart_close()
893 mutex_unlock(&mgr->setup_mutex); in snd_mixart_close()
944 &chip->mgr->pci->dev, in preallocate_buffers()
1030 static int snd_mixart_create(struct mixart_mgr *mgr, struct snd_card *card, int idx) in snd_mixart_create() argument
1044 chip->mgr = mgr; in snd_mixart_create()
1045 card->sync_irq = mgr->irq; in snd_mixart_create()
1053 mgr->chip[idx] = chip; in snd_mixart_create()
1065 if(chip->mgr->board_type == MIXART_DAUGHTER_TYPE_AES) { in snd_mixart_create_pcm()
1078 static int snd_mixart_free(struct mixart_mgr *mgr) in snd_mixart_free() argument
1082 for (i = 0; i < mgr->num_cards; i++) { in snd_mixart_free()
1083 if (mgr->chip[i]) in snd_mixart_free()
1084 snd_card_free(mgr->chip[i]->card); in snd_mixart_free()
1088 snd_mixart_exit_mailbox(mgr); in snd_mixart_free()
1091 if (mgr->irq >= 0) in snd_mixart_free()
1092 free_irq(mgr->irq, mgr); in snd_mixart_free()
1095 if(mgr->dsp_loaded) { in snd_mixart_free()
1096 snd_mixart_reset_board(mgr); in snd_mixart_free()
1097 dev_dbg(&mgr->pci->dev, "reset miXart !\n"); in snd_mixart_free()
1102 iounmap(mgr->mem[i].virt); in snd_mixart_free()
1104 pci_release_regions(mgr->pci); in snd_mixart_free()
1107 if(mgr->flowinfo.area) { in snd_mixart_free()
1108 snd_dma_free_pages(&mgr->flowinfo); in snd_mixart_free()
1109 mgr->flowinfo.area = NULL; in snd_mixart_free()
1112 if(mgr->bufferinfo.area) { in snd_mixart_free()
1113 snd_dma_free_pages(&mgr->bufferinfo); in snd_mixart_free()
1114 mgr->bufferinfo.area = NULL; in snd_mixart_free()
1117 pci_disable_device(mgr->pci); in snd_mixart_free()
1118 kfree(mgr); in snd_mixart_free()
1134 struct mixart_mgr *mgr = entry->private_data; in snd_mixart_BA0_read() local
1137 if (copy_to_user_fromio(buf, MIXART_MEM(mgr, pos), count)) in snd_mixart_BA0_read()
1150 struct mixart_mgr *mgr = entry->private_data; in snd_mixart_BA1_read() local
1153 if (copy_to_user_fromio(buf, MIXART_REG(mgr, pos), count)) in snd_mixart_BA1_read()
1176 if (chip->mgr->dsp_loaded & ( 1 << MIXART_MOTHERBOARD_ELF_INDEX)) { in snd_mixart_proc_read()
1178 switch (chip->mgr->board_type ) { in snd_mixart_proc_read()
1189 ref = readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_SYSTEM_LOAD_OFFSET)); in snd_mixart_proc_read()
1192 …u32 mailbox = 100 * readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_MAILBX_LOAD_OFFSET)) … in snd_mixart_proc_read()
1193 …u32 streaming = 100 * readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_STREAM_LOAD_OFFSET)) … in snd_mixart_proc_read()
1194 …u32 interr = 100 * readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_INTERR_LOAD_OFFSET)) … in snd_mixart_proc_read()
1213 entry->private_data = chip->mgr; in snd_mixart_proc_init()
1219 entry->private_data = chip->mgr; in snd_mixart_proc_init()
1234 struct mixart_mgr *mgr; in snd_mixart_probe() local
1264 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL); in snd_mixart_probe()
1265 if (! mgr) { in snd_mixart_probe()
1270 mgr->pci = pci; in snd_mixart_probe()
1271 mgr->irq = -1; in snd_mixart_probe()
1276 kfree(mgr); in snd_mixart_probe()
1281 mgr->mem[i].phys = pci_resource_start(pci, i); in snd_mixart_probe()
1282 mgr->mem[i].virt = pci_ioremap_bar(pci, i); in snd_mixart_probe()
1283 if (!mgr->mem[i].virt) { in snd_mixart_probe()
1285 mgr->mem[i].phys); in snd_mixart_probe()
1286 snd_mixart_free(mgr); in snd_mixart_probe()
1293 KBUILD_MODNAME, mgr)) { in snd_mixart_probe()
1295 snd_mixart_free(mgr); in snd_mixart_probe()
1298 mgr->irq = pci->irq; in snd_mixart_probe()
1301 mgr->msg_fifo_readptr = 0; in snd_mixart_probe()
1302 mgr->msg_fifo_writeptr = 0; in snd_mixart_probe()
1304 mutex_init(&mgr->lock); in snd_mixart_probe()
1305 mutex_init(&mgr->msg_lock); in snd_mixart_probe()
1306 init_waitqueue_head(&mgr->msg_sleep); in snd_mixart_probe()
1307 atomic_set(&mgr->msg_processed, 0); in snd_mixart_probe()
1310 mutex_init(&mgr->setup_mutex); in snd_mixart_probe()
1313 mgr->num_cards = MIXART_MAX_CARDS; /* 4 FIXME: configurable? */ in snd_mixart_probe()
1314 for (i = 0; i < mgr->num_cards; i++) { in snd_mixart_probe()
1329 snd_mixart_free(mgr); in snd_mixart_probe()
1338 mgr->mem[0].phys, mgr->mem[1].phys, mgr->irq, i); in snd_mixart_probe()
1340 err = snd_mixart_create(mgr, card, i); in snd_mixart_probe()
1343 snd_mixart_free(mgr); in snd_mixart_probe()
1349 snd_mixart_proc_init(mgr->chip[i]); in snd_mixart_probe()
1354 snd_mixart_free(mgr); in snd_mixart_probe()
1360 mgr->board_type = MIXART_DAUGHTER_TYPE_NONE; in snd_mixart_probe()
1366 size, &mgr->flowinfo) < 0) { in snd_mixart_probe()
1367 snd_mixart_free(mgr); in snd_mixart_probe()
1371 memset(mgr->flowinfo.area, 0, size); in snd_mixart_probe()
1377 size, &mgr->bufferinfo) < 0) { in snd_mixart_probe()
1378 snd_mixart_free(mgr); in snd_mixart_probe()
1382 memset(mgr->bufferinfo.area, 0, size); in snd_mixart_probe()
1385 err = snd_mixart_setup_firmware(mgr); in snd_mixart_probe()
1387 snd_mixart_free(mgr); in snd_mixart_probe()
1391 pci_set_drvdata(pci, mgr); in snd_mixart_probe()