Lines Matching defs:qe_timers
104 struct qe_timers { struct
105 u8 gtcfr1; /* Timer 1 and Timer 2 global config register*/
106 u8 res0[0x3];
107 u8 gtcfr2; /* Timer 3 and timer 4 global config register*/
108 u8 res1[0xB];
109 __be16 gtmdr1; /* Timer 1 mode register */
110 __be16 gtmdr2; /* Timer 2 mode register */
111 __be16 gtrfr1; /* Timer 1 reference register */
112 __be16 gtrfr2; /* Timer 2 reference register */
113 __be16 gtcpr1; /* Timer 1 capture register */
114 __be16 gtcpr2; /* Timer 2 capture register */
115 __be16 gtcnr1; /* Timer 1 counter */
116 __be16 gtcnr2; /* Timer 2 counter */
117 __be16 gtmdr3; /* Timer 3 mode register */
118 __be16 gtmdr4; /* Timer 4 mode register */
119 __be16 gtrfr3; /* Timer 3 reference register */
120 __be16 gtrfr4; /* Timer 4 reference register */
121 __be16 gtcpr3; /* Timer 3 capture register */
122 __be16 gtcpr4; /* Timer 4 capture register */
123 __be16 gtcnr3; /* Timer 3 counter */
124 __be16 gtcnr4; /* Timer 4 counter */
125 __be16 gtevr1; /* Timer 1 event register */
126 __be16 gtevr2; /* Timer 2 event register */
127 __be16 gtevr3; /* Timer 3 event register */
128 __be16 gtevr4; /* Timer 4 event register */
129 __be16 gtps; /* Timer 1 prescale register */
130 u8 res2[0x46];