Lines Matching refs:remapped_regs
65 static void __iomem *remapped_regs; variable
115 param = readl(remapped_regs + regs); in w100fb_reg_read()
129 writel(param, remapped_regs + regs); in w100fb_reg_write()
269 status.val = readl(remapped_regs + mmRBBM_STATUS); in w100_fifo_wait()
284 status.val = readl(remapped_regs + mmRBBM_STATUS); in w100fb_sync()
302 writel(W100_FB_BASE, remapped_regs + mmDST_OFFSET); in w100_init_graphic_engine()
303 writel(par->xres, remapped_regs + mmDST_PITCH); in w100_init_graphic_engine()
304 writel(W100_FB_BASE, remapped_regs + mmSRC_OFFSET); in w100_init_graphic_engine()
305 writel(par->xres, remapped_regs + mmSRC_PITCH); in w100_init_graphic_engine()
308 writel(0, remapped_regs + mmSC_TOP_LEFT); in w100_init_graphic_engine()
309 writel((par->yres << 16) | par->xres, remapped_regs + mmSC_BOTTOM_RIGHT); in w100_init_graphic_engine()
310 writel(0x1fff1fff, remapped_regs + mmSRC_SC_BOTTOM_RIGHT); in w100_init_graphic_engine()
320 writel(dp_cntl.val, remapped_regs + mmDP_CNTL); in w100_init_graphic_engine()
337 writel(gmc.val, remapped_regs + mmDP_GUI_MASTER_CNTL); in w100_init_graphic_engine()
346 writel(dp_datatype.val, remapped_regs + mmDP_DATATYPE); in w100_init_graphic_engine()
352 writel(dp_mix.val, remapped_regs + mmDP_MIX); in w100_init_graphic_engine()
368 gmc.val = readl(remapped_regs + mmDP_GUI_MASTER_CNTL); in w100fb_fillrect()
372 writel(gmc.val, remapped_regs + mmDP_GUI_MASTER_CNTL); in w100fb_fillrect()
373 writel(rect->color, remapped_regs + mmDP_BRUSH_FRGD_CLR); in w100fb_fillrect()
376 writel((rect->dy << 16) | (rect->dx & 0xffff), remapped_regs + mmDST_Y_X); in w100fb_fillrect()
378 remapped_regs + mmDST_WIDTH_HEIGHT); in w100fb_fillrect()
396 gmc.val = readl(remapped_regs + mmDP_GUI_MASTER_CNTL); in w100fb_copyarea()
400 writel(gmc.val, remapped_regs + mmDP_GUI_MASTER_CNTL); in w100fb_copyarea()
403 writel((sy << 16) | (sx & 0xffff), remapped_regs + mmSRC_Y_X); in w100fb_copyarea()
404 writel((dy << 16) | (dx & 0xffff), remapped_regs + mmDST_Y_X); in w100fb_copyarea()
405 writel((w << 16) | (h & 0xffff), remapped_regs + mmDST_WIDTH_HEIGHT); in w100fb_copyarea()
658 remapped_regs = ioremap(mem->start+W100_REG_BASE, W100_REG_LEN); in w100fb_probe()
659 if (remapped_regs == NULL) in w100fb_probe()
664 chip_id = readl(remapped_regs + mmCHIP_ID); in w100fb_probe()
777 if (remapped_regs != NULL) { in w100fb_probe()
778 iounmap(remapped_regs); in w100fb_probe()
779 remapped_regs = NULL; in w100fb_probe()
805 iounmap(remapped_regs); in w100fb_remove()
806 remapped_regs = NULL; in w100fb_remove()
837 writel((u32) (disp_db_buf_wr_cntl.val), remapped_regs + mmDISP_DB_BUF_CNTL); in w100_update_disable()
848 writel((u32) (disp_db_buf_wr_cntl.val), remapped_regs + mmDISP_DB_BUF_CNTL); in w100_update_enable()
856 value = readl(remapped_regs + mmGPIO_DATA); in w100fb_gpio_read()
858 value = readl(remapped_regs + mmGPIO_DATA2); in w100fb_gpio_read()
866 writel(value, remapped_regs + mmGPIO_DATA); in w100fb_gpio_write()
868 writel(value, remapped_regs + mmGPIO_DATA2); in w100fb_gpio_write()
894 writel(0x31, remapped_regs + mmSCRATCH_UMSK); in w100_hw_init()
896 readl(remapped_regs + mmSCRATCH_UMSK); in w100_hw_init()
897 writel(0x30, remapped_regs + mmSCRATCH_UMSK); in w100_hw_init()
901 writel((u32)(cif_io.val), remapped_regs + mmCIF_IO); in w100_hw_init()
903 cif_write_dbg.val = readl(remapped_regs + mmCIF_WRITE_DBG); in w100_hw_init()
907 writel((u32) (cif_write_dbg.val), remapped_regs + mmCIF_WRITE_DBG); in w100_hw_init()
909 cif_read_dbg.val = readl(remapped_regs + mmCIF_READ_DBG); in w100_hw_init()
911 writel((u32) (cif_read_dbg.val), remapped_regs + mmCIF_READ_DBG); in w100_hw_init()
913 cif_cntl.val = readl(remapped_regs + mmCIF_CNTL); in w100_hw_init()
919 writel((u32) (cif_cntl.val), remapped_regs + mmCIF_CNTL); in w100_hw_init()
941 writel((u32) (cfgreg_base.val), remapped_regs + mmCFGREG_BASE); in w100_hw_init()
945 writel((u32) (wrap_start_dir.val), remapped_regs + mmWRAP_START_DIR); in w100_hw_init()
949 writel((u32) (wrap_top_dir.val), remapped_regs + mmWRAP_TOP_DIR); in w100_hw_init()
951 writel((u32) 0x2440, remapped_regs + mmRBBM_CNTL); in w100_hw_init()
954 temp32 = readl(remapped_regs + mmDISP_DEBUG2); in w100_hw_init()
957 writel(temp32, remapped_regs + mmDISP_DEBUG2); in w100_hw_init()
961 writel(gpio->init_data1, remapped_regs + mmGPIO_DATA); in w100_hw_init()
962 writel(gpio->init_data2, remapped_regs + mmGPIO_DATA2); in w100_hw_init()
963 writel(gpio->gpio_dir1, remapped_regs + mmGPIO_CNTL1); in w100_hw_init()
964 writel(gpio->gpio_oe1, remapped_regs + mmGPIO_CNTL2); in w100_hw_init()
965 writel(gpio->gpio_dir2, remapped_regs + mmGPIO_CNTL3); in w100_hw_init()
966 writel(gpio->gpio_oe2, remapped_regs + mmGPIO_CNTL4); in w100_hw_init()
1052 writel((u32) (clk_test_cntl.val), remapped_regs + mmCLK_TEST_CNTL); in w100_get_testcount()
1055 writel((u32) (clk_test_cntl.val), remapped_regs + mmCLK_TEST_CNTL); in w100_get_testcount()
1059 writel((u32) (clk_test_cntl.val), remapped_regs + mmCLK_TEST_CNTL); in w100_get_testcount()
1065 clk_test_cntl.val = readl(remapped_regs + mmCLK_TEST_CNTL); in w100_get_testcount()
1067 writel((u32) (clk_test_cntl.val), remapped_regs + mmCLK_TEST_CNTL); in w100_get_testcount()
1094 writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL); in w100_pll_adjust()
1100 writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL); in w100_pll_adjust()
1140 writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL); in w100_pll_calibration()
1146 writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL); in w100_pll_calibration()
1150 writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL); in w100_pll_calibration()
1168 writel((u32) (w100_pwr_state.pwrmgt_cntl.val), remapped_regs + mmPWRMGT_CNTL); in w100_pll_set_clk()
1173 writel((u32) (w100_pwr_state.sclk_cntl.val), remapped_regs + mmSCLK_CNTL); in w100_pll_set_clk()
1179 writel((u32) (w100_pwr_state.pll_ref_fb_div.val), remapped_regs + mmPLL_REF_FB_DIV); in w100_pll_set_clk()
1182 writel((u32) (w100_pwr_state.pwrmgt_cntl.val), remapped_regs + mmPWRMGT_CNTL); in w100_pll_set_clk()
1190 writel((u32) (w100_pwr_state.pwrmgt_cntl.val), remapped_regs + mmPWRMGT_CNTL); in w100_pll_set_clk()
1219 writel((u32) (w100_pwr_state.clk_pin_cntl.val), remapped_regs + mmCLK_PIN_CNTL); in w100_pwm_setup()
1239 writel((u32) (w100_pwr_state.sclk_cntl.val), remapped_regs + mmSCLK_CNTL); in w100_pwm_setup()
1244 writel((u32) (w100_pwr_state.pclk_cntl.val), remapped_regs + mmPCLK_CNTL); in w100_pwm_setup()
1251 writel((u32) (w100_pwr_state.pll_ref_fb_div.val), remapped_regs + mmPLL_REF_FB_DIV); in w100_pwm_setup()
1271 writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL); in w100_pwm_setup()
1282 writel((u32) (w100_pwr_state.pwrmgt_cntl.val), remapped_regs + mmPWRMGT_CNTL); in w100_pwm_setup()
1301 writel((u32) (w100_pwr_state.sclk_cntl.val), remapped_regs + mmSCLK_CNTL); in w100_init_clocks()
1320 writel(active_h_disp.val, remapped_regs + mmACTIVE_H_DISP); in w100_init_lcd()
1325 writel(active_v_disp.val, remapped_regs + mmACTIVE_V_DISP); in w100_init_lcd()
1330 writel(graphic_h_disp.val, remapped_regs + mmGRAPHIC_H_DISP); in w100_init_lcd()
1335 writel(graphic_v_disp.val, remapped_regs + mmGRAPHIC_V_DISP); in w100_init_lcd()
1340 writel(crtc_total.val, remapped_regs + mmCRTC_TOTAL); in w100_init_lcd()
1342 writel(mode->crtc_ss, remapped_regs + mmCRTC_SS); in w100_init_lcd()
1343 writel(mode->crtc_ls, remapped_regs + mmCRTC_LS); in w100_init_lcd()
1344 writel(mode->crtc_gs, remapped_regs + mmCRTC_GS); in w100_init_lcd()
1345 writel(mode->crtc_vpos_gs, remapped_regs + mmCRTC_VPOS_GS); in w100_init_lcd()
1346 writel(mode->crtc_rev, remapped_regs + mmCRTC_REV); in w100_init_lcd()
1347 writel(mode->crtc_dclk, remapped_regs + mmCRTC_DCLK); in w100_init_lcd()
1348 writel(mode->crtc_gclk, remapped_regs + mmCRTC_GCLK); in w100_init_lcd()
1349 writel(mode->crtc_goe, remapped_regs + mmCRTC_GOE); in w100_init_lcd()
1350 writel(mode->crtc_ps1_active, remapped_regs + mmCRTC_PS1_ACTIVE); in w100_init_lcd()
1352 writel(regs->lcd_format, remapped_regs + mmLCD_FORMAT); in w100_init_lcd()
1353 writel(regs->lcdd_cntl1, remapped_regs + mmLCDD_CNTL1); in w100_init_lcd()
1354 writel(regs->lcdd_cntl2, remapped_regs + mmLCDD_CNTL2); in w100_init_lcd()
1355 writel(regs->genlcd_cntl1, remapped_regs + mmGENLCD_CNTL1); in w100_init_lcd()
1356 writel(regs->genlcd_cntl2, remapped_regs + mmGENLCD_CNTL2); in w100_init_lcd()
1357 writel(regs->genlcd_cntl3, remapped_regs + mmGENLCD_CNTL3); in w100_init_lcd()
1359 writel(0x00000000, remapped_regs + mmCRTC_FRAME); in w100_init_lcd()
1360 writel(0x00000000, remapped_regs + mmCRTC_FRAME_VPOS); in w100_init_lcd()
1361 writel(0x00000000, remapped_regs + mmCRTC_DEFAULT_COUNT); in w100_init_lcd()
1362 writel(0x0000FF00, remapped_regs + mmLCD_BACKGROUND_COLOR); in w100_init_lcd()
1365 temp32 = readl(remapped_regs + mmDISP_DEBUG2); in w100_init_lcd()
1367 writel(temp32, remapped_regs + mmDISP_DEBUG2); in w100_init_lcd()
1384 writel((u32) (intmem_location.val), remapped_regs + mmMC_FB_LOCATION); in w100_setup_memory()
1390 writel((u32) (extmem_location.val), remapped_regs + mmMC_EXT_MEM_LOCATION); in w100_setup_memory()
1395 writel((u32) (intmem_location.val), remapped_regs + mmMC_FB_LOCATION); in w100_setup_memory()
1400 writel((u32) (extmem_location.val), remapped_regs + mmMC_EXT_MEM_LOCATION); in w100_setup_memory()
1402 writel(0x00007800, remapped_regs + mmMC_BIST_CTRL); in w100_setup_memory()
1403 writel(mem->ext_cntl, remapped_regs + mmMEM_EXT_CNTL); in w100_setup_memory()
1404 writel(0x00200021, remapped_regs + mmMEM_SDRAM_MODE_REG); in w100_setup_memory()
1406 writel(0x80200021, remapped_regs + mmMEM_SDRAM_MODE_REG); in w100_setup_memory()
1408 writel(mem->sdram_mode_reg, remapped_regs + mmMEM_SDRAM_MODE_REG); in w100_setup_memory()
1410 writel(mem->ext_timing_cntl, remapped_regs + mmMEM_EXT_TIMING_CNTL); in w100_setup_memory()
1411 writel(mem->io_cntl, remapped_regs + mmMEM_IO_CNTL); in w100_setup_memory()
1413 writel(bm_mem->ext_mem_bw, remapped_regs + mmBM_EXT_MEM_BANDWIDTH); in w100_setup_memory()
1414 writel(bm_mem->offset, remapped_regs + mmBM_OFFSET); in w100_setup_memory()
1415 writel(bm_mem->ext_timing_ctl, remapped_regs + mmBM_MEM_EXT_TIMING_CNTL); in w100_setup_memory()
1416 writel(bm_mem->ext_cntl, remapped_regs + mmBM_MEM_EXT_CNTL); in w100_setup_memory()
1417 writel(bm_mem->mode_reg, remapped_regs + mmBM_MEM_MODE_REG); in w100_setup_memory()
1418 writel(bm_mem->io_cntl, remapped_regs + mmBM_MEM_IO_CNTL); in w100_setup_memory()
1419 writel(bm_mem->config, remapped_regs + mmBM_CONFIG); in w100_setup_memory()
1504 writel((u32) (w100_pwr_state.pclk_cntl.val), remapped_regs + mmPCLK_CNTL); in w100_set_dispregs()
1506 writel(graphic_ctrl.val, remapped_regs + mmGRAPHIC_CTRL); in w100_set_dispregs()
1507 writel(W100_FB_BASE + ((offset * BITS_PER_PIXEL/8)&~0x03UL), remapped_regs + mmGRAPHIC_OFFSET); in w100_set_dispregs()
1508 writel((par->xres*BITS_PER_PIXEL/8), remapped_regs + mmGRAPHIC_PITCH); in w100_set_dispregs()
1529 crtc_ss.val = readl(remapped_regs + mmCRTC_SS); in calc_hsync()
1540 writel(0x7FFF8000, remapped_regs + mmMC_EXT_MEM_LOCATION); in w100_suspend()
1541 writel(0x00FF0000, remapped_regs + mmMC_PERF_MON_CNTL); in w100_suspend()
1543 val = readl(remapped_regs + mmMEM_EXT_TIMING_CNTL); in w100_suspend()
1546 writel(val, remapped_regs + mmMEM_EXT_TIMING_CNTL); in w100_suspend()
1548 val = readl(remapped_regs + mmMEM_EXT_CNTL); in w100_suspend()
1551 writel(val, remapped_regs + mmMEM_EXT_CNTL); in w100_suspend()
1557 val = readl(remapped_regs + mmMEM_EXT_CNTL); in w100_suspend()
1559 writel(val, remapped_regs + mmMEM_EXT_CNTL); in w100_suspend()
1562 val = readl(remapped_regs + mmMEM_EXT_CNTL); in w100_suspend()
1564 writel(val, remapped_regs + mmMEM_EXT_CNTL); in w100_suspend()
1566 writel(0x00000000, remapped_regs + mmSCLK_CNTL); in w100_suspend()
1567 writel(0x000000BF, remapped_regs + mmCLK_PIN_CNTL); in w100_suspend()
1568 writel(0x00000015, remapped_regs + mmPWRMGT_CNTL); in w100_suspend()
1572 val = readl(remapped_regs + mmPLL_CNTL); in w100_suspend()
1574 writel(val, remapped_regs + mmPLL_CNTL); in w100_suspend()
1576 writel(0x00000000, remapped_regs + mmLCDD_CNTL1); in w100_suspend()
1577 writel(0x00000000, remapped_regs + mmLCDD_CNTL2); in w100_suspend()
1578 writel(0x00000000, remapped_regs + mmGENLCD_CNTL1); in w100_suspend()
1579 writel(0x00000000, remapped_regs + mmGENLCD_CNTL2); in w100_suspend()
1580 writel(0x00000000, remapped_regs + mmGENLCD_CNTL3); in w100_suspend()
1582 val = readl(remapped_regs + mmMEM_EXT_CNTL); in w100_suspend()
1585 writel(val, remapped_regs + mmMEM_EXT_CNTL); in w100_suspend()
1587 writel(0x0000001d, remapped_regs + mmPWRMGT_CNTL); in w100_suspend()
1596 tmp = readl(remapped_regs + mmACTIVE_V_DISP); in w100_vsync()
1599 writel((tmp >> 16) & 0x3ff, remapped_regs + mmDISP_INT_CNTL); in w100_vsync()
1602 tmp = readl(remapped_regs + mmGEN_INT_CNTL); in w100_vsync()
1605 writel(tmp, remapped_regs + mmGEN_INT_CNTL); in w100_vsync()
1608 writel(0x00000002, remapped_regs + mmGEN_INT_STATUS); in w100_vsync()
1611 writel((tmp | 0x00000002), remapped_regs + mmGEN_INT_CNTL); in w100_vsync()
1614 writel(0x00000002, remapped_regs + mmGEN_INT_STATUS); in w100_vsync()
1617 if (readl(remapped_regs + mmGEN_INT_STATUS) & 0x00000002) in w100_vsync()
1624 writel(tmp, remapped_regs + mmGEN_INT_CNTL); in w100_vsync()
1627 writel(0x00000002, remapped_regs + mmGEN_INT_STATUS); in w100_vsync()