Lines Matching refs:VIACR
19 {VIACR, CR32, 0xFF, 0x00},
20 {VIACR, CR33, 0xFF, 0x00},
21 {VIACR, CR35, 0xFF, 0x00},
22 {VIACR, CR36, 0x08, 0x00},
23 {VIACR, CR69, 0xFF, 0x00},
24 {VIACR, CR6A, 0xFF, 0x40},
25 {VIACR, CR6B, 0xFF, 0x00},
26 {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
27 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
28 {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
29 {VIACR, CR8B, 0xFF, 0x69}, /* LCD Power Sequence Control 0 */
30 {VIACR, CR8C, 0xFF, 0x57}, /* LCD Power Sequence Control 1 */
31 {VIACR, CR8D, 0xFF, 0x00}, /* LCD Power Sequence Control 2 */
32 {VIACR, CR8E, 0xFF, 0x7B}, /* LCD Power Sequence Control 3 */
33 {VIACR, CR8F, 0xFF, 0x03}, /* LCD Power Sequence Control 4 */
34 {VIACR, CR90, 0xFF, 0x30}, /* LCD Power Sequence Control 5 */
35 {VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */
36 {VIACR, CR96, 0xFF, 0x00},
37 {VIACR, CR97, 0xFF, 0x00},
38 {VIACR, CR99, 0xFF, 0x00},
39 {VIACR, CR9B, 0xFF, 0x00}
59 {VIACR, CR32, 0xFF, 0x00},
60 {VIACR, CR33, 0x7F, 0x00},
61 {VIACR, CR35, 0xFF, 0x00},
62 {VIACR, CR36, 0xFF, 0x31},
63 {VIACR, CR41, 0xFF, 0x80},
64 {VIACR, CR42, 0xFF, 0x00},
65 {VIACR, CR55, 0x80, 0x00},
66 {VIACR, CR5D, 0x80, 0x00}, /*Horizontal Retrace Start bit[11] should be 0*/
67 {VIACR, CR68, 0xFF, 0x67}, /* Default FIFO For IGA2 */
68 {VIACR, CR69, 0xFF, 0x00},
69 {VIACR, CR6A, 0xFD, 0x40},
70 {VIACR, CR6B, 0xFF, 0x00},
71 {VIACR, CR77, 0xFF, 0x00}, /* LCD scaling Factor */
72 {VIACR, CR78, 0xFF, 0x00}, /* LCD scaling Factor */
73 {VIACR, CR79, 0xFF, 0x00}, /* LCD scaling Factor */
74 {VIACR, CR9F, 0x03, 0x00}, /* LCD scaling Factor */
75 {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
76 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
77 {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
78 {VIACR, CR8B, 0xFF, 0x5D}, /* LCD Power Sequence Control 0 */
79 {VIACR, CR8C, 0xFF, 0x2B}, /* LCD Power Sequence Control 1 */
80 {VIACR, CR8D, 0xFF, 0x6F}, /* LCD Power Sequence Control 2 */
81 {VIACR, CR8E, 0xFF, 0x2B}, /* LCD Power Sequence Control 3 */
82 {VIACR, CR8F, 0xFF, 0x01}, /* LCD Power Sequence Control 4 */
83 {VIACR, CR90, 0xFF, 0x01}, /* LCD Power Sequence Control 5 */
84 {VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */
85 {VIACR, CR96, 0xFF, 0x00},
86 {VIACR, CR97, 0xFF, 0x00},
87 {VIACR, CR99, 0xFF, 0x00},
88 {VIACR, CR9B, 0xFF, 0x00},
89 {VIACR, CR9D, 0xFF, 0x80},
90 {VIACR, CR9E, 0xFF, 0x80}
108 {VIACR, CR33, 0xFF, 0x00},
109 {VIACR, CR55, 0x80, 0x00},
110 {VIACR, CR5D, 0x80, 0x00},
111 {VIACR, CR36, 0xFF, 0x01}, /* Power Mangement 3 */
112 {VIACR, CR68, 0xFF, 0x67}, /* Default FIFO For IGA2 */
113 {VIACR, CR6A, 0x20, 0x20}, /* Extended FIFO On */
114 {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
115 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
116 {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
117 {VIACR, CR8B, 0xFF, 0x2D}, /* LCD Power Sequence Control 0 */
118 {VIACR, CR8C, 0xFF, 0x2D}, /* LCD Power Sequence Control 1 */
119 {VIACR, CR8D, 0xFF, 0xC8}, /* LCD Power Sequence Control 2 */
120 {VIACR, CR8E, 0xFF, 0x36}, /* LCD Power Sequence Control 3 */
121 {VIACR, CR8F, 0xFF, 0x00}, /* LCD Power Sequence Control 4 */
122 {VIACR, CR90, 0xFF, 0x10}, /* LCD Power Sequence Control 5 */
123 {VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */
124 {VIACR, CR96, 0xFF, 0x03}, /* DVP0 ; DVP0 Clock Skew */
125 {VIACR, CR97, 0xFF, 0x03}, /* DFP high ; DFPH Clock Skew */
126 {VIACR, CR99, 0xFF, 0x03}, /* DFP low ; DFPL Clock Skew*/
127 {VIACR, CR9B, 0xFF, 0x07} /* DVI on DVP1 ; DVP1 Clock Skew*/
141 {VIACR, CR32, 0xFF, 0x00},
142 {VIACR, CR33, 0xFF, 0x00},
143 {VIACR, CR35, 0xFF, 0x00},
144 {VIACR, CR36, 0x08, 0x00},
145 {VIACR, CR47, 0xC8, 0x00}, /* Clear VCK Plus. */
146 {VIACR, CR69, 0xFF, 0x00},
147 {VIACR, CR6A, 0xFF, 0x40},
148 {VIACR, CR6B, 0xFF, 0x00},
149 {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
150 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
151 {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
152 {VIACR, CRD4, 0xFF, 0x81}, /* Second power sequence control */
153 {VIACR, CR8B, 0xFF, 0x5D}, /* LCD Power Sequence Control 0 */
154 {VIACR, CR8C, 0xFF, 0x2B}, /* LCD Power Sequence Control 1 */
155 {VIACR, CR8D, 0xFF, 0x6F}, /* LCD Power Sequence Control 2 */
156 {VIACR, CR8E, 0xFF, 0x2B}, /* LCD Power Sequence Control 3 */
157 {VIACR, CR8F, 0xFF, 0x01}, /* LCD Power Sequence Control 4 */
158 {VIACR, CR90, 0xFF, 0x01}, /* LCD Power Sequence Control 5 */
159 {VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */
160 {VIACR, CR96, 0xFF, 0x00},
161 {VIACR, CR97, 0xFF, 0x00},
162 {VIACR, CR99, 0xFF, 0x00},
163 {VIACR, CR9B, 0xFF, 0x00}
179 {VIACR, CR32, 0xFF, 0x00},
180 {VIACR, CR33, 0x7F, 0x00},
181 {VIACR, CR35, 0xFF, 0x00},
182 {VIACR, CR36, 0x08, 0x00},
183 {VIACR, CR69, 0xFF, 0x00},
184 {VIACR, CR6A, 0xFD, 0x60},
185 {VIACR, CR6B, 0xFF, 0x00},
186 {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
187 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
188 {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
189 {VIACR, CRD4, 0xFF, 0x81}, /* Second power sequence control */
190 {VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */
191 {VIACR, CR96, 0xFF, 0x00},
192 {VIACR, CR97, 0xFF, 0x00},
193 {VIACR, CR99, 0xFF, 0x00},
194 {VIACR, CR9B, 0xFF, 0x00},
195 {VIACR, CRD2, 0xFF, 0xFF} /* TMDS/LVDS control register. */
208 {VIACR, CR32, 0xFF, 0x00},
209 {VIACR, CR35, 0xFF, 0x00},
210 {VIACR, CR36, 0x08, 0x00},
211 {VIACR, CR6A, 0xFF, 0x80},
212 {VIACR, CR6A, 0xFF, 0xC0},
214 {VIACR, CR55, 0x80, 0x00},
215 {VIACR, CR5D, 0x80, 0x00},