50 #define DSS_CONTROL			DSS_REG(0x0040)  macro
382 	DUMPREG(DSS_CONTROL);  in dss_dump_regs()
417 	REG_FLD_MOD(DSS_CONTROL, b, start, end);	/* DISPC_CLK_SWITCH */  in dss_select_dispc_clk_source()
445 	REG_FLD_MOD(DSS_CONTROL, b, pos, pos);	/* DSIx_CLK_SWITCH */  in dss_select_dsi_clk_source()
480 	REG_FLD_MOD(DSS_CONTROL, b, pos, pos);	/* LCDx_CLK_SWITCH */  in dss_select_lcd_clk_source()
616 	REG_FLD_MOD(DSS_CONTROL, l, 6, 6);  in dss_set_venc_output()
621 	REG_FLD_MOD(DSS_CONTROL, enable, 5, 5);	/* DAC Power-Down Control */  in dss_set_dac_pwrdn_bgz()
635 		REG_FLD_MOD(DSS_CONTROL, src, 15, 15);	/* VENC_HDMI_SWITCH */  in dss_select_hdmi_venc_clk_source()
649 	return REG_GET(DSS_CONTROL, 15, 15);  in dss_get_hdmi_venc_clk_source()
675 	REG_FLD_MOD(DSS_CONTROL, val, 17, 17);  in dss_dpi_select_source_omap4()
701 	REG_FLD_MOD(DSS_CONTROL, val, 17, 16);  in dss_dpi_select_source_omap5()
1119 	REG_FLD_MOD(DSS_CONTROL, 0, 0, 0);  in dss_bind()
1124 	REG_FLD_MOD(DSS_CONTROL, 1, 4, 4);	/* venc dac demen */  in dss_bind()
1125 	REG_FLD_MOD(DSS_CONTROL, 1, 3, 3);	/* venc clock 4x enable */  in dss_bind()
1126 	REG_FLD_MOD(DSS_CONTROL, 0, 2, 2);	/* venc clock mode = normal */  in dss_bind()