749 	vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, 0x20);	/* previously: 0x00) */  in cirrusfb_set_par_foo()
753 	vga_wcrt(regbase, VGA_CRTC_H_TOTAL, htotal);  in cirrusfb_set_par_foo()
756 	vga_wcrt(regbase, VGA_CRTC_H_DISP, hdispend);  in cirrusfb_set_par_foo()
759 	vga_wcrt(regbase, VGA_CRTC_H_BLANK_START, var->xres / 8);  in cirrusfb_set_par_foo()
763 	vga_wcrt(regbase, VGA_CRTC_H_BLANK_END,  in cirrusfb_set_par_foo()
767 	vga_wcrt(regbase, VGA_CRTC_H_SYNC_START, hsyncstart);  in cirrusfb_set_par_foo()
773 	vga_wcrt(regbase, VGA_CRTC_H_SYNC_END, tmp);  in cirrusfb_set_par_foo()
776 	vga_wcrt(regbase, VGA_CRTC_V_TOTAL, vtotal & 0xff);  in cirrusfb_set_par_foo()
794 	vga_wcrt(regbase, VGA_CRTC_OVERFLOW, tmp);  in cirrusfb_set_par_foo()
802 	vga_wcrt(regbase, VGA_CRTC_MAX_SCAN, tmp);  in cirrusfb_set_par_foo()
805 	vga_wcrt(regbase, VGA_CRTC_V_SYNC_START, vsyncstart & 0xff);  in cirrusfb_set_par_foo()
808 	vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, vsyncend % 16 + 64 + 32);  in cirrusfb_set_par_foo()
811 	vga_wcrt(regbase, VGA_CRTC_V_DISP_END, vdispend & 0xff);  in cirrusfb_set_par_foo()
814 	vga_wcrt(regbase, VGA_CRTC_V_BLANK_START, (vdispend + 1) & 0xff);  in cirrusfb_set_par_foo()
817 	vga_wcrt(regbase, VGA_CRTC_V_BLANK_END, vtotal & 0xff);  in cirrusfb_set_par_foo()
820 	vga_wcrt(regbase, VGA_CRTC_LINE_COMPARE, 0xff);  in cirrusfb_set_par_foo()
835 	vga_wcrt(regbase, CL_CRT1A, tmp);  in cirrusfb_set_par_foo()
907 		vga_wcrt(regbase, VGA_CRTC_MODE, 0xc7);  in cirrusfb_set_par_foo()
911 		vga_wcrt(regbase, VGA_CRTC_MODE, 0xc3);  in cirrusfb_set_par_foo()
916 		vga_wcrt(regbase, VGA_CRTC_REGS, htotal / 2);  in cirrusfb_set_par_foo()
918 		vga_wcrt(regbase, VGA_CRTC_REGS, 0x00);	/* interlace control */  in cirrusfb_set_par_foo()
930 	vga_wcrt(regbase, VGA_CRTC_CURSOR_START, 0);  in cirrusfb_set_par_foo()
932 	vga_wcrt(regbase, VGA_CRTC_CURSOR_END, 31);  in cirrusfb_set_par_foo()
1206 	vga_wcrt(regbase, VGA_CRTC_OFFSET, pitch & 0xff);  in cirrusfb_set_par_foo()
1212 	vga_wcrt(regbase, CL_CRT1B, tmp);  in cirrusfb_set_par_foo()
1216 		vga_wcrt(regbase, CL_CRT1D, (pitch >> 9) & 1);  in cirrusfb_set_par_foo()
1233 		vga_wcrt(regbase, CL_CRT1E, tmp);  in cirrusfb_set_par_foo()
1343 	vga_wcrt(cinfo->regbase, VGA_CRTC_START_LO, base & 0xff);  in cirrusfb_pan_display()
1344 	vga_wcrt(cinfo->regbase, VGA_CRTC_START_HI, (base >> 8) & 0xff);  in cirrusfb_pan_display()
1356 	vga_wcrt(cinfo->regbase, CL_CRT1B, tmp);  in cirrusfb_pan_display()
1365 		vga_wcrt(cinfo->regbase, CL_CRT1D, tmp);  in cirrusfb_pan_display()
1477 		vga_wcrt(cinfo->regbase, CL_CRT51, 0x00);  in init_vgachip()
1578 	vga_wcrt(cinfo->regbase, VGA_CRTC_PRESET_ROW, 0x00);  in init_vgachip()
1580 	vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_START, 0x20);  in init_vgachip()
1582 	vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_END, 0x00);  in init_vgachip()
1584 	vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_HI, 0x00);  in init_vgachip()
1586 	vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_LO, 0x00);  in init_vgachip()
1589 	vga_wcrt(cinfo->regbase, VGA_CRTC_UNDERLINE, 0x00);  in init_vgachip()
1592 	vga_wcrt(cinfo->regbase, CL_CRT1B, 0x02);  in init_vgachip()