Lines Matching refs:cinfo
381 static void switch_monitor(struct cirrusfb_info *cinfo, int on);
382 static void WGen(const struct cirrusfb_info *cinfo,
384 static unsigned char RGen(const struct cirrusfb_info *cinfo, int regnum);
385 static void AttrOn(const struct cirrusfb_info *cinfo);
386 static void WHDR(const struct cirrusfb_info *cinfo, unsigned char val);
387 static void WSFR(struct cirrusfb_info *cinfo, unsigned char val);
388 static void WSFR2(struct cirrusfb_info *cinfo, unsigned char val);
389 static void WClut(struct cirrusfb_info *cinfo, unsigned char regnum,
392 static void RClut(struct cirrusfb_info *cinfo, unsigned char regnum,
421 static inline int is_laguna(const struct cirrusfb_info *cinfo) in is_laguna() argument
423 return cinfo->btype == BT_LAGUNA || cinfo->btype == BT_LAGUNAB; in is_laguna()
451 struct cirrusfb_info *cinfo = info->par; in cirrusfb_check_mclk() local
452 long mclk = vga_rseq(cinfo->regbase, CL_SEQR1F) & 0x3f; in cirrusfb_check_mclk()
478 struct cirrusfb_info *cinfo = info->par; in cirrusfb_check_pixclock() local
484 maxclock = cirrusfb_board_info[cinfo->btype].maxclock[maxclockidx]; in cirrusfb_check_pixclock()
485 cinfo->multiplexing = 0; in cirrusfb_check_pixclock()
502 switch (cinfo->btype) { in cirrusfb_check_pixclock()
507 cinfo->multiplexing = 1; in cirrusfb_check_pixclock()
511 cinfo->multiplexing = 1; in cirrusfb_check_pixclock()
521 cinfo->doubleVCLK = 0; in cirrusfb_check_pixclock()
522 if (cinfo->btype == BT_SD64 && info->fix.smem_len <= MB_ && in cirrusfb_check_pixclock()
524 cinfo->doubleVCLK = 1; in cirrusfb_check_pixclock()
536 struct cirrusfb_info *cinfo = info->par; in cirrusfb_check_var() local
627 if (!is_laguna(cinfo)) in cirrusfb_check_var()
635 struct cirrusfb_info *cinfo = info->par; in cirrusfb_set_mclk_as_source() local
638 assert(cinfo != NULL); in cirrusfb_set_mclk_as_source()
639 old1f = vga_rseq(cinfo->regbase, CL_SEQR1F) & ~0x40; in cirrusfb_set_mclk_as_source()
645 old1e = vga_rseq(cinfo->regbase, CL_SEQR1E) & ~0x1; in cirrusfb_set_mclk_as_source()
649 vga_wseq(cinfo->regbase, CL_SEQR1E, old1e); in cirrusfb_set_mclk_as_source()
651 vga_wseq(cinfo->regbase, CL_SEQR1F, old1f); in cirrusfb_set_mclk_as_source()
661 struct cirrusfb_info *cinfo = info->par; in cirrusfb_set_par_foo() local
663 u8 __iomem *regbase = cinfo->regbase; in cirrusfb_set_par_foo()
698 bi = &cirrusfb_board_info[cinfo->btype]; in cirrusfb_set_par_foo()
736 if (cinfo->multiplexing) { in cirrusfb_set_par_foo()
839 if (cinfo->btype == BT_ALPINE || cinfo->btype == BT_SD64) in cirrusfb_set_par_foo()
841 if (cinfo->multiplexing) in cirrusfb_set_par_foo()
843 if (cinfo->doubleVCLK) in cirrusfb_set_par_foo()
856 if (cinfo->btype == BT_ALPINE || cinfo->btype == BT_PICASSO4 || in cirrusfb_set_par_foo()
857 cinfo->btype == BT_SD64) { in cirrusfb_set_par_foo()
866 if (is_laguna(cinfo)) { in cirrusfb_set_par_foo()
867 long pcifc = fb_readl(cinfo->laguna_mmio + 0x3fc); in cirrusfb_set_par_foo()
868 unsigned char tile = fb_readb(cinfo->laguna_mmio + 0x407); in cirrusfb_set_par_foo()
871 if (cinfo->btype == BT_LAGUNAB) { in cirrusfb_set_par_foo()
872 tile_control = fb_readw(cinfo->laguna_mmio + 0x2c4); in cirrusfb_set_par_foo()
874 fb_writew(tile_control, cinfo->laguna_mmio + 0x2c4); in cirrusfb_set_par_foo()
877 fb_writel(pcifc | 0x10000000l, cinfo->laguna_mmio + 0x3fc); in cirrusfb_set_par_foo()
878 fb_writeb(tile & 0x3f, cinfo->laguna_mmio + 0x407); in cirrusfb_set_par_foo()
879 control = fb_readw(cinfo->laguna_mmio + 0x402); in cirrusfb_set_par_foo()
880 threshold = fb_readw(cinfo->laguna_mmio + 0xea); in cirrusfb_set_par_foo()
890 if ((cinfo->btype == BT_SD64) || in cirrusfb_set_par_foo()
891 (cinfo->btype == BT_ALPINE) || in cirrusfb_set_par_foo()
892 (cinfo->btype == BT_GD5480)) in cirrusfb_set_par_foo()
896 if (is_laguna(cinfo)) { in cirrusfb_set_par_foo()
927 WGen(cinfo, VGA_MIS_W, tmp); in cirrusfb_set_par_foo()
946 switch (cinfo->btype) { in cirrusfb_set_par_foo()
955 cinfo->multiplexing ? in cirrusfb_set_par_foo()
971 switch (cinfo->btype) { in cirrusfb_set_par_foo()
999 WGen(cinfo, VGA_PEL_MSK, 0x01); in cirrusfb_set_par_foo()
1000 if (cinfo->multiplexing) in cirrusfb_set_par_foo()
1002 WHDR(cinfo, 0x4a); in cirrusfb_set_par_foo()
1005 WHDR(cinfo, 0); in cirrusfb_set_par_foo()
1020 switch (cinfo->btype) { in cirrusfb_set_par_foo()
1029 cinfo->multiplexing ? in cirrusfb_set_par_foo()
1045 switch (cinfo->btype) { in cirrusfb_set_par_foo()
1073 if (cinfo->multiplexing) in cirrusfb_set_par_foo()
1075 WHDR(cinfo, 0x4a); in cirrusfb_set_par_foo()
1078 WHDR(cinfo, 0); in cirrusfb_set_par_foo()
1089 switch (cinfo->btype) { in cirrusfb_set_par_foo()
1108 cinfo->doubleVCLK ? 0xa3 : 0xa7); in cirrusfb_set_par_foo()
1133 WHDR(cinfo, cinfo->doubleVCLK ? 0xe1 : 0xc1); in cirrusfb_set_par_foo()
1136 WHDR(cinfo, 0xa0); /* hidden dac reg: nothing special */ in cirrusfb_set_par_foo()
1148 switch (cinfo->btype) { in cirrusfb_set_par_foo()
1191 WHDR(cinfo, 0xc5); in cirrusfb_set_par_foo()
1215 if (cirrusfb_board_info[cinfo->btype].scrn_start_bit19) in cirrusfb_set_par_foo()
1218 if (is_laguna(cinfo)) { in cirrusfb_set_par_foo()
1242 AttrOn(cinfo); in cirrusfb_set_par_foo()
1244 if (is_laguna(cinfo)) { in cirrusfb_set_par_foo()
1246 fb_writew(control | 0x1000, cinfo->laguna_mmio + 0x402); in cirrusfb_set_par_foo()
1247 fb_writew(format, cinfo->laguna_mmio + 0xc0); in cirrusfb_set_par_foo()
1248 fb_writew(threshold, cinfo->laguna_mmio + 0xea); in cirrusfb_set_par_foo()
1281 struct cirrusfb_info *cinfo = info->par; in cirrusfb_setcolreg() local
1298 cinfo->pseudo_palette[regno] = v; in cirrusfb_setcolreg()
1303 WClut(cinfo, regno, red >> 10, green >> 10, blue >> 10); in cirrusfb_setcolreg()
1320 struct cirrusfb_info *cinfo = info->par; in cirrusfb_pan_display() local
1339 if (!is_laguna(cinfo)) in cirrusfb_pan_display()
1340 cirrusfb_WaitBLT(cinfo->regbase); in cirrusfb_pan_display()
1343 vga_wcrt(cinfo->regbase, VGA_CRTC_START_LO, base & 0xff); in cirrusfb_pan_display()
1344 vga_wcrt(cinfo->regbase, VGA_CRTC_START_HI, (base >> 8) & 0xff); in cirrusfb_pan_display()
1347 tmp = vga_rcrt(cinfo->regbase, CL_CRT1B) & 0xf2; in cirrusfb_pan_display()
1356 vga_wcrt(cinfo->regbase, CL_CRT1B, tmp); in cirrusfb_pan_display()
1359 if (cirrusfb_board_info[cinfo->btype].scrn_start_bit19) { in cirrusfb_pan_display()
1360 tmp = vga_rcrt(cinfo->regbase, CL_CRT1D); in cirrusfb_pan_display()
1361 if (is_laguna(cinfo)) in cirrusfb_pan_display()
1365 vga_wcrt(cinfo->regbase, CL_CRT1D, tmp); in cirrusfb_pan_display()
1373 vga_wattr(cinfo->regbase, CL_AR33, xpix); in cirrusfb_pan_display()
1392 struct cirrusfb_info *cinfo = info->par; in cirrusfb_blank() local
1393 int current_mode = cinfo->blank_mode; in cirrusfb_blank()
1412 val |= vga_rseq(cinfo->regbase, VGA_SEQ_CLOCK_MODE) & 0xdf; in cirrusfb_blank()
1413 vga_wseq(cinfo->regbase, VGA_SEQ_CLOCK_MODE, val); in cirrusfb_blank()
1434 vga_wgfx(cinfo->regbase, CL_GRE, val); in cirrusfb_blank()
1436 cinfo->blank_mode = blank_mode; in cirrusfb_blank()
1449 struct cirrusfb_info *cinfo = info->par; in init_vgachip() local
1452 assert(cinfo != NULL); in init_vgachip()
1454 bi = &cirrusfb_board_info[cinfo->btype]; in init_vgachip()
1457 switch (cinfo->btype) { in init_vgachip()
1459 WSFR(cinfo, 0x01); in init_vgachip()
1461 WSFR(cinfo, 0x51); in init_vgachip()
1465 WSFR2(cinfo, 0xff); in init_vgachip()
1470 WSFR(cinfo, 0x1f); in init_vgachip()
1472 WSFR(cinfo, 0x4f); in init_vgachip()
1477 vga_wcrt(cinfo->regbase, CL_CRT51, 0x00); in init_vgachip()
1480 vga_wgfx(cinfo->regbase, CL_GR31, 0x00); in init_vgachip()
1484 vga_wgfx(cinfo->regbase, CL_GR2F, 0x00); in init_vgachip()
1488 vga_wgfx(cinfo->regbase, CL_GR33, 0x00); in init_vgachip()
1508 if (cinfo->btype != BT_PICASSO4) { in init_vgachip()
1509 WGen(cinfo, CL_VSSM, 0x10); /* EGS: 0x16 */ in init_vgachip()
1510 WGen(cinfo, CL_POS102, 0x01); in init_vgachip()
1511 WGen(cinfo, CL_VSSM, 0x08); /* EGS: 0x0e */ in init_vgachip()
1513 if (cinfo->btype != BT_SD64) in init_vgachip()
1514 WGen(cinfo, CL_VSSM2, 0x01); in init_vgachip()
1517 vga_wseq(cinfo->regbase, VGA_SEQ_RESET, 0x03); in init_vgachip()
1520 vga_wseq(cinfo->regbase, VGA_SEQ_CLOCK_MODE, 0x21); in init_vgachip()
1525 vga_wseq(cinfo->regbase, CL_SEQR6, 0x12); in init_vgachip()
1527 switch (cinfo->btype) { in init_vgachip()
1529 vga_wseq(cinfo->regbase, CL_SEQRF, 0x98); in init_vgachip()
1537 vga_wseq(cinfo->regbase, CL_SEQRF, 0xb8); in init_vgachip()
1541 vga_wseq(cinfo->regbase, CL_SEQR16, 0x0f); in init_vgachip()
1542 vga_wseq(cinfo->regbase, CL_SEQRF, 0xb0); in init_vgachip()
1547 vga_wseq(cinfo->regbase, VGA_SEQ_PLANE_WRITE, 0xff); in init_vgachip()
1549 vga_wseq(cinfo->regbase, VGA_SEQ_CHARACTER_MAP, 0x00); in init_vgachip()
1551 vga_wseq(cinfo->regbase, VGA_SEQ_MEMORY_MODE, 0x0a); in init_vgachip()
1555 vga_wseq(cinfo->regbase, CL_SEQR7, bi->sr07); in init_vgachip()
1561 vga_wseq(cinfo->regbase, CL_SEQR10, 0x00); in init_vgachip()
1563 vga_wseq(cinfo->regbase, CL_SEQR11, 0x00); in init_vgachip()
1565 vga_wseq(cinfo->regbase, CL_SEQR12, 0x00); in init_vgachip()
1567 vga_wseq(cinfo->regbase, CL_SEQR13, 0x00); in init_vgachip()
1570 if (cinfo->btype != BT_PICASSO4) { in init_vgachip()
1572 vga_wseq(cinfo->regbase, CL_SEQR17, 0x00); in init_vgachip()
1574 vga_wseq(cinfo->regbase, CL_SEQR18, 0x02); in init_vgachip()
1578 vga_wcrt(cinfo->regbase, VGA_CRTC_PRESET_ROW, 0x00); in init_vgachip()
1580 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_START, 0x20); in init_vgachip()
1582 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_END, 0x00); in init_vgachip()
1584 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_HI, 0x00); in init_vgachip()
1586 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_LO, 0x00); in init_vgachip()
1589 vga_wcrt(cinfo->regbase, VGA_CRTC_UNDERLINE, 0x00); in init_vgachip()
1592 vga_wcrt(cinfo->regbase, CL_CRT1B, 0x02); in init_vgachip()
1595 vga_wgfx(cinfo->regbase, VGA_GFX_SR_VALUE, 0x00); in init_vgachip()
1597 vga_wgfx(cinfo->regbase, VGA_GFX_SR_ENABLE, 0x00); in init_vgachip()
1599 vga_wgfx(cinfo->regbase, VGA_GFX_COMPARE_VALUE, 0x00); in init_vgachip()
1601 vga_wgfx(cinfo->regbase, VGA_GFX_DATA_ROTATE, 0x00); in init_vgachip()
1603 vga_wgfx(cinfo->regbase, VGA_GFX_PLANE_READ, 0x00); in init_vgachip()
1605 vga_wgfx(cinfo->regbase, VGA_GFX_MODE, 0x00); in init_vgachip()
1607 vga_wgfx(cinfo->regbase, VGA_GFX_MISC, 0x01); in init_vgachip()
1609 vga_wgfx(cinfo->regbase, VGA_GFX_COMPARE_MASK, 0x0f); in init_vgachip()
1611 vga_wgfx(cinfo->regbase, VGA_GFX_BIT_MASK, 0xff); in init_vgachip()
1613 if (cinfo->btype == BT_ALPINE || cinfo->btype == BT_SD64 || in init_vgachip()
1614 is_laguna(cinfo)) in init_vgachip()
1616 vga_wgfx(cinfo->regbase, CL_GRB, 0x20); in init_vgachip()
1621 vga_wgfx(cinfo->regbase, CL_GRB, 0x28); in init_vgachip()
1623 vga_wgfx(cinfo->regbase, CL_GRC, 0xff); /* Color Key compare: - */ in init_vgachip()
1624 vga_wgfx(cinfo->regbase, CL_GRD, 0x00); /* Color Key compare mask: - */ in init_vgachip()
1625 vga_wgfx(cinfo->regbase, CL_GRE, 0x00); /* Miscellaneous control: - */ in init_vgachip()
1631 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE0, 0x00); in init_vgachip()
1632 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE1, 0x01); in init_vgachip()
1633 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE2, 0x02); in init_vgachip()
1634 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE3, 0x03); in init_vgachip()
1635 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE4, 0x04); in init_vgachip()
1636 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE5, 0x05); in init_vgachip()
1637 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE6, 0x06); in init_vgachip()
1638 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE7, 0x07); in init_vgachip()
1639 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE8, 0x08); in init_vgachip()
1640 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE9, 0x09); in init_vgachip()
1641 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEA, 0x0a); in init_vgachip()
1642 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEB, 0x0b); in init_vgachip()
1643 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEC, 0x0c); in init_vgachip()
1644 vga_wattr(cinfo->regbase, VGA_ATC_PALETTED, 0x0d); in init_vgachip()
1645 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEE, 0x0e); in init_vgachip()
1646 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEF, 0x0f); in init_vgachip()
1649 vga_wattr(cinfo->regbase, VGA_ATC_MODE, 0x01); in init_vgachip()
1651 vga_wattr(cinfo->regbase, VGA_ATC_OVERSCAN, 0x00); in init_vgachip()
1653 vga_wattr(cinfo->regbase, VGA_ATC_PLANE_ENABLE, 0x0f); in init_vgachip()
1655 vga_wattr(cinfo->regbase, VGA_ATC_COLOR_PAGE, 0x00); in init_vgachip()
1657 WGen(cinfo, VGA_PEL_MSK, 0xff); /* Pixel mask: no mask */ in init_vgachip()
1660 vga_wgfx(cinfo->regbase, CL_GR31, 0x04); in init_vgachip()
1662 vga_wgfx(cinfo->regbase, CL_GR31, 0x00); in init_vgachip()
1665 WHDR(cinfo, 0); /* Hidden DAC register: - */ in init_vgachip()
1669 static void switch_monitor(struct cirrusfb_info *cinfo, int on) in switch_monitor() argument
1674 if (cinfo->btype == BT_PICASSO4) in switch_monitor()
1676 if (cinfo->btype == BT_ALPINE) in switch_monitor()
1678 if (cinfo->btype == BT_GD5480) in switch_monitor()
1680 if (cinfo->btype == BT_PICASSO) { in switch_monitor()
1682 WSFR(cinfo, 0xff); in switch_monitor()
1686 switch (cinfo->btype) { in switch_monitor()
1688 WSFR(cinfo, cinfo->SFR | 0x21); in switch_monitor()
1691 WSFR(cinfo, cinfo->SFR | 0x28); in switch_monitor()
1694 WSFR(cinfo, 0x6f); in switch_monitor()
1699 switch (cinfo->btype) { in switch_monitor()
1701 WSFR(cinfo, cinfo->SFR & 0xde); in switch_monitor()
1704 WSFR(cinfo, cinfo->SFR & 0xd7); in switch_monitor()
1707 WSFR(cinfo, 0x4f); in switch_monitor()
1722 struct cirrusfb_info *cinfo = info->par; in cirrusfb_sync() local
1724 if (!is_laguna(cinfo)) { in cirrusfb_sync()
1725 while (vga_rgfx(cinfo->regbase, CL_GR31) & 0x03) in cirrusfb_sync()
1736 struct cirrusfb_info *cinfo = info->par; in cirrusfb_fillrect() local
1739 cinfo->pseudo_palette[region->color] : region->color; in cirrusfb_fillrect()
1762 cirrusfb_RectFill(cinfo->regbase, in cirrusfb_fillrect()
1775 struct cirrusfb_info *cinfo = info->par; in cirrusfb_copyarea() local
1803 cirrusfb_BitBLT(cinfo->regbase, info->var.bits_per_pixel, in cirrusfb_copyarea()
1814 struct cirrusfb_info *cinfo = info->par; in cirrusfb_imageblit() local
1822 else if ((cinfo->btype == BT_ALPINE || cinfo->btype == BT_SD64) && in cirrusfb_imageblit()
1839 cirrusfb_RectFill(cinfo->regbase, in cirrusfb_imageblit()
1847 cirrusfb_RectFill(cinfo->regbase, in cirrusfb_imageblit()
1868 struct cirrusfb_info *cinfo = info->par; in cirrusfb_get_memsize() local
1870 if (is_laguna(cinfo)) { in cirrusfb_get_memsize()
1896 if (cinfo->btype != BT_ALPINE && (SRF & 0x80) != 0) in cirrusfb_get_memsize()
1930 struct cirrusfb_info *cinfo = info->par; in cirrusfb_pci_unmap() local
1932 if (cinfo->laguna_mmio == NULL) in cirrusfb_pci_unmap()
1933 iounmap(cinfo->laguna_mmio); in cirrusfb_pci_unmap()
1947 struct cirrusfb_info *cinfo = info->par; in cirrusfb_zorro_unmap() local
1953 iounmap(cinfo->regbase); in cirrusfb_zorro_unmap()
1977 struct cirrusfb_info *cinfo = info->par; in cirrusfb_set_fbinfo() local
1980 info->pseudo_palette = cinfo->pseudo_palette; in cirrusfb_set_fbinfo()
1987 if (noaccel || is_laguna(cinfo)) { in cirrusfb_set_fbinfo()
1995 if (cinfo->btype == BT_GD5480) { in cirrusfb_set_fbinfo()
2003 strscpy(info->fix.id, cirrusfb_board_info[cinfo->btype].name, in cirrusfb_set_fbinfo()
2026 struct cirrusfb_info *cinfo = info->par; in cirrusfb_register() local
2030 assert(cinfo->btype != BT_NONE); in cirrusfb_register()
2070 struct cirrusfb_info *cinfo = info->par; in cirrusfb_cleanup() local
2072 switch_monitor(cinfo, 0); in cirrusfb_cleanup()
2076 cinfo->unmap(info); in cirrusfb_cleanup()
2084 struct cirrusfb_info *cinfo; in cirrusfb_pci_register() local
2105 cinfo = info->par; in cirrusfb_pci_register()
2106 cinfo->btype = (enum cirrus_board) ent->driver_data; in cirrusfb_pci_register()
2110 (unsigned long long)pdev->resource[0].start, cinfo->btype); in cirrusfb_pci_register()
2118 cinfo->regbase = NULL; in cirrusfb_pci_register()
2119 cinfo->laguna_mmio = ioremap(info->fix.mmio_start, 0x1000); in cirrusfb_pci_register()
2124 board_size = (cinfo->btype == BT_GD5480) ? in cirrusfb_pci_register()
2125 32 * MB_ : cirrusfb_get_memsize(info, cinfo->regbase); in cirrusfb_pci_register()
2152 cinfo->unmap = cirrusfb_pci_unmap; in cirrusfb_pci_register()
2173 if (cinfo->laguna_mmio != NULL) in cirrusfb_pci_register()
2174 iounmap(cinfo->laguna_mmio); in cirrusfb_pci_register()
2204 struct cirrusfb_info *cinfo; in cirrusfb_zorro_register() local
2252 cinfo = info->par; in cirrusfb_zorro_register()
2253 cinfo->btype = btype; in cirrusfb_zorro_register()
2256 cinfo->regbase = regbase > 16 * MB_ ? ioremap(regbase, 64 * 1024) in cirrusfb_zorro_register()
2258 if (!cinfo->regbase) { in cirrusfb_zorro_register()
2274 cinfo->unmap = cirrusfb_zorro_unmap; in cirrusfb_zorro_register()
2282 vga_wseq(cinfo->regbase, CL_SEQR1F, in cirrusfb_zorro_register()
2301 iounmap(cinfo->regbase); in cirrusfb_zorro_register()
2406 static void WGen(const struct cirrusfb_info *cinfo, in WGen() argument
2411 if (cinfo->btype == BT_PICASSO) { in WGen()
2419 vga_w(cinfo->regbase, regofs + regnum, val); in WGen()
2423 static unsigned char RGen(const struct cirrusfb_info *cinfo, int regnum) in RGen() argument
2427 if (cinfo->btype == BT_PICASSO) { in RGen()
2435 return vga_r(cinfo->regbase, regofs + regnum); in RGen()
2439 static void AttrOn(const struct cirrusfb_info *cinfo) in AttrOn() argument
2441 assert(cinfo != NULL); in AttrOn()
2443 if (vga_rcrt(cinfo->regbase, CL_CRT24) & 0x80) { in AttrOn()
2446 vga_w(cinfo->regbase, VGA_ATT_IW, in AttrOn()
2447 vga_r(cinfo->regbase, VGA_ATT_R)); in AttrOn()
2451 vga_w(cinfo->regbase, VGA_ATT_IW, 0x33); in AttrOn()
2454 vga_w(cinfo->regbase, VGA_ATT_IW, 0x00); in AttrOn()
2463 static void WHDR(const struct cirrusfb_info *cinfo, unsigned char val) in WHDR() argument
2465 if (is_laguna(cinfo)) in WHDR()
2467 if (cinfo->btype == BT_PICASSO) { in WHDR()
2470 WGen(cinfo, VGA_PEL_MSK, 0x00); in WHDR()
2473 RGen(cinfo, VGA_PEL_IW); in WHDR()
2478 RGen(cinfo, VGA_PEL_MSK); in WHDR()
2480 RGen(cinfo, VGA_PEL_MSK); in WHDR()
2482 RGen(cinfo, VGA_PEL_MSK); in WHDR()
2484 RGen(cinfo, VGA_PEL_MSK); in WHDR()
2487 WGen(cinfo, VGA_PEL_MSK, val); in WHDR()
2490 if (cinfo->btype == BT_PICASSO) { in WHDR()
2492 RGen(cinfo, VGA_PEL_IW); in WHDR()
2497 WGen(cinfo, VGA_PEL_MSK, 0xff); in WHDR()
2503 static void WSFR(struct cirrusfb_info *cinfo, unsigned char val) in WSFR() argument
2506 assert(cinfo->regbase != NULL); in WSFR()
2507 cinfo->SFR = val; in WSFR()
2508 z_writeb(val, cinfo->regbase + 0x8000); in WSFR()
2513 static void WSFR2(struct cirrusfb_info *cinfo, unsigned char val) in WSFR2() argument
2518 assert(cinfo->regbase != NULL); in WSFR2()
2519 cinfo->SFR = val; in WSFR2()
2520 z_writeb(val, cinfo->regbase + 0x9000); in WSFR2()
2525 static void WClut(struct cirrusfb_info *cinfo, unsigned char regnum, unsigned char red, in WClut() argument
2531 vga_w(cinfo->regbase, VGA_PEL_IW, regnum); in WClut()
2533 if (cinfo->btype == BT_PICASSO || cinfo->btype == BT_PICASSO4 || in WClut()
2534 cinfo->btype == BT_ALPINE || cinfo->btype == BT_GD5480 || in WClut()
2535 cinfo->btype == BT_SD64 || is_laguna(cinfo)) { in WClut()
2537 if (cinfo->btype == BT_PICASSO) in WClut()
2539 vga_w(cinfo->regbase, data, red); in WClut()
2540 vga_w(cinfo->regbase, data, green); in WClut()
2541 vga_w(cinfo->regbase, data, blue); in WClut()
2543 vga_w(cinfo->regbase, data, blue); in WClut()
2544 vga_w(cinfo->regbase, data, green); in WClut()
2545 vga_w(cinfo->regbase, data, red); in WClut()
2551 static void RClut(struct cirrusfb_info *cinfo, unsigned char regnum, unsigned char *red,
2556 vga_w(cinfo->regbase, VGA_PEL_IR, regnum);
2558 if (cinfo->btype == BT_PICASSO || cinfo->btype == BT_PICASSO4 ||
2559 cinfo->btype == BT_ALPINE || cinfo->btype == BT_GD5480) {
2560 if (cinfo->btype == BT_PICASSO)
2562 *red = vga_r(cinfo->regbase, data);
2563 *green = vga_r(cinfo->regbase, data);
2564 *blue = vga_r(cinfo->regbase, data);
2566 *blue = vga_r(cinfo->regbase, data);
2567 *green = vga_r(cinfo->regbase, data);
2568 *red = vga_r(cinfo->regbase, data);