Lines Matching refs:vgabase
152 svga_tilecursor(par->state.vgabase, info, cursor); in arkfb_tilecursor()
460 regval = vga_rseq(par->state.vgabase, 0x1C); in ark_dac_read_regs()
463 vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); in ark_dac_read_regs()
464 code[1] = vga_r(par->state.vgabase, dac_regs[code[0] & 3]); in ark_dac_read_regs()
469 vga_wseq(par->state.vgabase, 0x1C, regval); in ark_dac_read_regs()
479 regval = vga_rseq(par->state.vgabase, 0x1C); in ark_dac_write_regs()
482 vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); in ark_dac_write_regs()
483 vga_w(par->state.vgabase, dac_regs[code[0] & 3], code[1]); in ark_dac_write_regs()
488 vga_wseq(par->state.vgabase, 0x1C, regval); in ark_dac_write_regs()
504 regval = vga_r(par->state.vgabase, VGA_MIS_R); in ark_set_pixclock()
505 vga_w(par->state.vgabase, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); in ark_set_pixclock()
517 void __iomem *vgabase = par->state.vgabase; in arkfb_open() local
520 par->state.vgabase = vgabase; in arkfb_open()
650 svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); in arkfb_set_par()
653 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); in arkfb_set_par()
654 svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); in arkfb_set_par()
657 svga_set_default_gfx_regs(par->state.vgabase); in arkfb_set_par()
658 svga_set_default_atc_regs(par->state.vgabase); in arkfb_set_par()
659 svga_set_default_seq_regs(par->state.vgabase); in arkfb_set_par()
660 svga_set_default_crt_regs(par->state.vgabase); in arkfb_set_par()
661 svga_wcrt_multi(par->state.vgabase, ark_line_compare_regs, 0xFFFFFFFF); in arkfb_set_par()
662 svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, 0); in arkfb_set_par()
665 …svga_wseq_mask(par->state.vgabase, 0x10, 0x1F, 0x1F); /* enable linear framebuffer and full memory… in arkfb_set_par()
666 svga_wseq_mask(par->state.vgabase, 0x12, 0x03, 0x03); /* 4 MB linear framebuffer size */ in arkfb_set_par()
668 vga_wseq(par->state.vgabase, 0x13, info->fix.smem_start >> 16); in arkfb_set_par()
669 vga_wseq(par->state.vgabase, 0x14, info->fix.smem_start >> 24); in arkfb_set_par()
670 vga_wseq(par->state.vgabase, 0x15, 0); in arkfb_set_par()
671 vga_wseq(par->state.vgabase, 0x16, 0); in arkfb_set_par()
676 vga_wseq(par->state.vgabase, 0x18, regval); in arkfb_set_par()
680 svga_wcrt_multi(par->state.vgabase, ark_offset_regs, offset_value); in arkfb_set_par()
683 svga_wcrt_mask(par->state.vgabase, 0x40, 0x08, 0x08); in arkfb_set_par()
686 svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80); in arkfb_set_par()
688 svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80); in arkfb_set_par()
691 svga_wcrt_mask(par->state.vgabase, 0x44, 0x04, 0x04); in arkfb_set_par()
693 svga_wcrt_mask(par->state.vgabase, 0x44, 0x00, 0x04); in arkfb_set_par()
703 svga_set_textmode_vga_regs(par->state.vgabase); in arkfb_set_par()
705 vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ in arkfb_set_par()
706 svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ in arkfb_set_par()
712 vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); in arkfb_set_par()
714 vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ in arkfb_set_par()
715 svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ in arkfb_set_par()
721 vga_wseq(par->state.vgabase, 0x11, 0x10); /* basic VGA mode */ in arkfb_set_par()
722 svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ in arkfb_set_par()
728 vga_wseq(par->state.vgabase, 0x11, 0x16); /* 8bpp accel mode */ in arkfb_set_par()
732 svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ in arkfb_set_par()
736 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
744 vga_wseq(par->state.vgabase, 0x11, 0x1A); /* 16bpp accel mode */ in arkfb_set_par()
745 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
751 vga_wseq(par->state.vgabase, 0x11, 0x1A); /* 16bpp accel mode */ in arkfb_set_par()
752 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
758 vga_wseq(par->state.vgabase, 0x11, 0x16); /* 8bpp accel mode ??? */ in arkfb_set_par()
759 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
767 vga_wseq(par->state.vgabase, 0x11, 0x1E); /* 32bpp accel mode */ in arkfb_set_par()
768 svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ in arkfb_set_par()
783 svga_set_timings(par->state.vgabase, &ark_timing_regs, &(info->var), hmul, hdiv, in arkfb_set_par()
791 vga_wcrt(par->state.vgabase, 0x42, (value + 1) / 2); in arkfb_set_par()
797 svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); in arkfb_set_par()
798 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); in arkfb_set_par()
873 svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); in arkfb_blank()
874 svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); in arkfb_blank()
878 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); in arkfb_blank()
879 svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); in arkfb_blank()
885 svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); in arkfb_blank()
886 svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); in arkfb_blank()
912 svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, offset); in arkfb_pan_display()
1011 par->state.vgabase = (void __iomem *) (unsigned long) vga_res.start; in ark_pci_probe()
1014 regval = vga_rseq(par->state.vgabase, 0x10); in ark_pci_probe()