Lines Matching refs:S3C2410_USBDREG
9 #define S3C2410_USBDREG(x) (x) macro
11 #define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140)
12 #define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144)
13 #define S3C2410_UDC_EP_INT_REG S3C2410_USBDREG(0x0148)
15 #define S3C2410_UDC_USB_INT_REG S3C2410_USBDREG(0x0158)
16 #define S3C2410_UDC_EP_INT_EN_REG S3C2410_USBDREG(0x015c)
18 #define S3C2410_UDC_USB_INT_EN_REG S3C2410_USBDREG(0x016c)
20 #define S3C2410_UDC_FRAME_NUM1_REG S3C2410_USBDREG(0x0170)
21 #define S3C2410_UDC_FRAME_NUM2_REG S3C2410_USBDREG(0x0174)
23 #define S3C2410_UDC_EP0_FIFO_REG S3C2410_USBDREG(0x01c0)
24 #define S3C2410_UDC_EP1_FIFO_REG S3C2410_USBDREG(0x01c4)
25 #define S3C2410_UDC_EP2_FIFO_REG S3C2410_USBDREG(0x01c8)
26 #define S3C2410_UDC_EP3_FIFO_REG S3C2410_USBDREG(0x01cc)
27 #define S3C2410_UDC_EP4_FIFO_REG S3C2410_USBDREG(0x01d0)
29 #define S3C2410_UDC_EP1_DMA_CON S3C2410_USBDREG(0x0200)
30 #define S3C2410_UDC_EP1_DMA_UNIT S3C2410_USBDREG(0x0204)
31 #define S3C2410_UDC_EP1_DMA_FIFO S3C2410_USBDREG(0x0208)
32 #define S3C2410_UDC_EP1_DMA_TTC_L S3C2410_USBDREG(0x020c)
33 #define S3C2410_UDC_EP1_DMA_TTC_M S3C2410_USBDREG(0x0210)
34 #define S3C2410_UDC_EP1_DMA_TTC_H S3C2410_USBDREG(0x0214)
36 #define S3C2410_UDC_EP2_DMA_CON S3C2410_USBDREG(0x0218)
37 #define S3C2410_UDC_EP2_DMA_UNIT S3C2410_USBDREG(0x021c)
38 #define S3C2410_UDC_EP2_DMA_FIFO S3C2410_USBDREG(0x0220)
39 #define S3C2410_UDC_EP2_DMA_TTC_L S3C2410_USBDREG(0x0224)
40 #define S3C2410_UDC_EP2_DMA_TTC_M S3C2410_USBDREG(0x0228)
41 #define S3C2410_UDC_EP2_DMA_TTC_H S3C2410_USBDREG(0x022c)
43 #define S3C2410_UDC_EP3_DMA_CON S3C2410_USBDREG(0x0240)
44 #define S3C2410_UDC_EP3_DMA_UNIT S3C2410_USBDREG(0x0244)
45 #define S3C2410_UDC_EP3_DMA_FIFO S3C2410_USBDREG(0x0248)
46 #define S3C2410_UDC_EP3_DMA_TTC_L S3C2410_USBDREG(0x024c)
47 #define S3C2410_UDC_EP3_DMA_TTC_M S3C2410_USBDREG(0x0250)
48 #define S3C2410_UDC_EP3_DMA_TTC_H S3C2410_USBDREG(0x0254)
50 #define S3C2410_UDC_EP4_DMA_CON S3C2410_USBDREG(0x0258)
51 #define S3C2410_UDC_EP4_DMA_UNIT S3C2410_USBDREG(0x025c)
52 #define S3C2410_UDC_EP4_DMA_FIFO S3C2410_USBDREG(0x0260)
53 #define S3C2410_UDC_EP4_DMA_TTC_L S3C2410_USBDREG(0x0264)
54 #define S3C2410_UDC_EP4_DMA_TTC_M S3C2410_USBDREG(0x0268)
55 #define S3C2410_UDC_EP4_DMA_TTC_H S3C2410_USBDREG(0x026c)
57 #define S3C2410_UDC_INDEX_REG S3C2410_USBDREG(0x0178)
61 #define S3C2410_UDC_MAXP_REG S3C2410_USBDREG(0x0180)
63 #define S3C2410_UDC_EP0_CSR_REG S3C2410_USBDREG(0x0184)
65 #define S3C2410_UDC_IN_CSR1_REG S3C2410_USBDREG(0x0184)
66 #define S3C2410_UDC_IN_CSR2_REG S3C2410_USBDREG(0x0188)
68 #define S3C2410_UDC_OUT_CSR1_REG S3C2410_USBDREG(0x0190)
69 #define S3C2410_UDC_OUT_CSR2_REG S3C2410_USBDREG(0x0194)
70 #define S3C2410_UDC_OUT_FIFO_CNT1_REG S3C2410_USBDREG(0x0198)
71 #define S3C2410_UDC_OUT_FIFO_CNT2_REG S3C2410_USBDREG(0x019c)