121 			       UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp);  in ufs_mtk_cfg_unipro_cg()
127 			       UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp);  in ufs_mtk_cfg_unipro_cg()
130 			       UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), &tmp);  in ufs_mtk_cfg_unipro_cg()
133 			       UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), tmp);  in ufs_mtk_cfg_unipro_cg()
136 			       UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp);  in ufs_mtk_cfg_unipro_cg()
141 			       UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp);  in ufs_mtk_cfg_unipro_cg()
144 			       UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), &tmp);  in ufs_mtk_cfg_unipro_cg()
147 			       UIC_ARG_MIB(VS_DEBUGCLOCKENABLE), tmp);  in ufs_mtk_cfg_unipro_cg()
722 	ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_LOCALVERINFO), &ver);  in ufs_mtk_get_controller_version()
978 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), true);  in ufs_mtk_pre_pwr_change()
979 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), UFS_HS_G1);  in ufs_mtk_pre_pwr_change()
981 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), true);  in ufs_mtk_pre_pwr_change()
982 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), UFS_HS_G1);  in ufs_mtk_pre_pwr_change()
984 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),  in ufs_mtk_pre_pwr_change()
986 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),  in ufs_mtk_pre_pwr_change()
988 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),  in ufs_mtk_pre_pwr_change()
991 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXHSADAPTTYPE),  in ufs_mtk_pre_pwr_change()
1075 	ret = ufshcd_dme_get(hba, UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp);  in ufs_mtk_pre_link()
1081 	ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp);  in ufs_mtk_pre_link()
1365 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 6);  in ufs_mtk_apply_dev_quirks()
1366 		ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME), 10);  in ufs_mtk_apply_dev_quirks()