102 #define UNIPRO_PCLK_PERIOD(ufs) (NSEC_PER_SEC / ufs->pclk_rate)  argument
167 	int (*drv_init)(struct device *dev, struct exynos_ufs *ufs);
168 	int (*pre_link)(struct exynos_ufs *ufs);
169 	int (*post_link)(struct exynos_ufs *ufs);
170 	int (*pre_pwr_change)(struct exynos_ufs *ufs,
172 	int (*post_pwr_change)(struct exynos_ufs *ufs,
174 	int (*pre_hce_enable)(struct exynos_ufs *ufs);
175 	int (*post_hce_enable)(struct exynos_ufs *ufs);
226 #define for_each_ufs_rx_lane(ufs, i) \  argument
227 	for (i = (ufs)->rx_sel_idx; \
228 		i < (ufs)->rx_sel_idx + (ufs)->avail_ln_rx; i++)
229 #define for_each_ufs_tx_lane(ufs, i) \  argument
230 	for (i = 0; i < (ufs)->avail_ln_tx; i++)
233 static inline void name##_writel(struct exynos_ufs *ufs, u32 val, u32 reg)\
235 	writel(val, ufs->reg_##name + reg);				  \
238 static inline u32 name##_readl(struct exynos_ufs *ufs, u32 reg)		  \
240 	return readl(ufs->reg_##name + reg);				  \