95 	u32 pmuctl, tmp, pllctl;  in ssb_pmu0_pllinit_r0()  local
144 	pllctl = ssb_chipco_pll_read(cc, SSB_PMU0_PLLCTL0);  in ssb_pmu0_pllinit_r0()
146 		pllctl |= SSB_PMU0_PLLCTL0_PDIV_MSK;  in ssb_pmu0_pllinit_r0()
148 		pllctl &= ~SSB_PMU0_PLLCTL0_PDIV_MSK;  in ssb_pmu0_pllinit_r0()
149 	ssb_chipco_pll_write(cc, SSB_PMU0_PLLCTL0, pllctl);  in ssb_pmu0_pllinit_r0()
152 	pllctl = ssb_chipco_pll_read(cc, SSB_PMU0_PLLCTL1);  in ssb_pmu0_pllinit_r0()
153 	pllctl &= ~SSB_PMU0_PLLCTL1_STOPMOD;  in ssb_pmu0_pllinit_r0()
154 	pllctl &= ~(SSB_PMU0_PLLCTL1_WILD_IMSK | SSB_PMU0_PLLCTL1_WILD_FMSK);  in ssb_pmu0_pllinit_r0()
155 	pllctl |= ((u32)e->wb_int << SSB_PMU0_PLLCTL1_WILD_IMSK_SHIFT) & SSB_PMU0_PLLCTL1_WILD_IMSK;  in ssb_pmu0_pllinit_r0()
156 	pllctl |= ((u32)e->wb_frac << SSB_PMU0_PLLCTL1_WILD_FMSK_SHIFT) & SSB_PMU0_PLLCTL1_WILD_FMSK;  in ssb_pmu0_pllinit_r0()
158 		pllctl |= SSB_PMU0_PLLCTL1_STOPMOD;  in ssb_pmu0_pllinit_r0()
159 	ssb_chipco_pll_write(cc, SSB_PMU0_PLLCTL1, pllctl);  in ssb_pmu0_pllinit_r0()
162 	pllctl = ssb_chipco_pll_read(cc, SSB_PMU0_PLLCTL2);  in ssb_pmu0_pllinit_r0()
163 	pllctl &= ~SSB_PMU0_PLLCTL2_WILD_IMSKHI;  in ssb_pmu0_pllinit_r0()
164 …pllctl |= (((u32)e->wb_int >> 4) << SSB_PMU0_PLLCTL2_WILD_IMSKHI_SHIFT) & SSB_PMU0_PLLCTL2_WILD_IM…  in ssb_pmu0_pllinit_r0()
165 	ssb_chipco_pll_write(cc, SSB_PMU0_PLLCTL2, pllctl);  in ssb_pmu0_pllinit_r0()
227 	u32 tmp, pllctl, pmuctl;  in ssb_pmu1_pllinit_r0()  local
281 	pllctl = ssb_chipco_pll_read(cc, SSB_PMU1_PLLCTL0);  in ssb_pmu1_pllinit_r0()
282 	pllctl &= ~(SSB_PMU1_PLLCTL0_P1DIV | SSB_PMU1_PLLCTL0_P2DIV);  in ssb_pmu1_pllinit_r0()
283 	pllctl |= ((u32)e->p1div << SSB_PMU1_PLLCTL0_P1DIV_SHIFT) & SSB_PMU1_PLLCTL0_P1DIV;  in ssb_pmu1_pllinit_r0()
284 	pllctl |= ((u32)e->p2div << SSB_PMU1_PLLCTL0_P2DIV_SHIFT) & SSB_PMU1_PLLCTL0_P2DIV;  in ssb_pmu1_pllinit_r0()
285 	ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, pllctl);  in ssb_pmu1_pllinit_r0()
288 	pllctl = ssb_chipco_pll_read(cc, SSB_PMU1_PLLCTL2);  in ssb_pmu1_pllinit_r0()
289 	pllctl &= ~(SSB_PMU1_PLLCTL2_NDIVINT | SSB_PMU1_PLLCTL2_NDIVMODE);  in ssb_pmu1_pllinit_r0()
290 	pllctl |= ((u32)e->ndiv_int << SSB_PMU1_PLLCTL2_NDIVINT_SHIFT) & SSB_PMU1_PLLCTL2_NDIVINT;  in ssb_pmu1_pllinit_r0()
291 	pllctl |= (1 << SSB_PMU1_PLLCTL2_NDIVMODE_SHIFT) & SSB_PMU1_PLLCTL2_NDIVMODE;  in ssb_pmu1_pllinit_r0()
292 	ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, pllctl);  in ssb_pmu1_pllinit_r0()
295 	pllctl = ssb_chipco_pll_read(cc, SSB_PMU1_PLLCTL3);  in ssb_pmu1_pllinit_r0()
296 	pllctl &= ~SSB_PMU1_PLLCTL3_NDIVFRAC;  in ssb_pmu1_pllinit_r0()
297 	pllctl |= ((u32)e->ndiv_frac << SSB_PMU1_PLLCTL3_NDIVFRAC_SHIFT) & SSB_PMU1_PLLCTL3_NDIVFRAC;  in ssb_pmu1_pllinit_r0()
298 	ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, pllctl);  in ssb_pmu1_pllinit_r0()
302 		pllctl = ssb_chipco_pll_read(cc, SSB_PMU1_PLLCTL5);  in ssb_pmu1_pllinit_r0()
303 		pllctl &= ~SSB_PMU1_PLLCTL5_CLKDRV;  in ssb_pmu1_pllinit_r0()
304 		pllctl |= (buffer_strength << SSB_PMU1_PLLCTL5_CLKDRV_SHIFT) & SSB_PMU1_PLLCTL5_CLKDRV;  in ssb_pmu1_pllinit_r0()
305 		ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, pllctl);  in ssb_pmu1_pllinit_r0()