Lines Matching refs:sspi
141 static int read_fifo(struct synquacer_spi *sspi) in read_fifo() argument
143 u32 len = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTATUS); in read_fifo()
147 len = min(len, sspi->rx_words); in read_fifo()
149 switch (sspi->bpw) { in read_fifo()
151 u8 *buf = sspi->rx_buf; in read_fifo()
153 ioread8_rep(sspi->regs + SYNQUACER_HSSPI_REG_RX_FIFO, in read_fifo()
155 sspi->rx_buf = buf + len; in read_fifo()
159 u16 *buf = sspi->rx_buf; in read_fifo()
161 ioread16_rep(sspi->regs + SYNQUACER_HSSPI_REG_RX_FIFO, in read_fifo()
163 sspi->rx_buf = buf + len; in read_fifo()
169 u32 *buf = sspi->rx_buf; in read_fifo()
171 ioread32_rep(sspi->regs + SYNQUACER_HSSPI_REG_RX_FIFO, in read_fifo()
173 sspi->rx_buf = buf + len; in read_fifo()
180 sspi->rx_words -= len; in read_fifo()
184 static int write_fifo(struct synquacer_spi *sspi) in write_fifo() argument
186 u32 len = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTATUS); in write_fifo()
191 sspi->tx_words); in write_fifo()
193 switch (sspi->bpw) { in write_fifo()
195 const u8 *buf = sspi->tx_buf; in write_fifo()
197 iowrite8_rep(sspi->regs + SYNQUACER_HSSPI_REG_TX_FIFO, in write_fifo()
199 sspi->tx_buf = buf + len; in write_fifo()
203 const u16 *buf = sspi->tx_buf; in write_fifo()
205 iowrite16_rep(sspi->regs + SYNQUACER_HSSPI_REG_TX_FIFO, in write_fifo()
207 sspi->tx_buf = buf + len; in write_fifo()
213 const u32 *buf = sspi->tx_buf; in write_fifo()
215 iowrite32_rep(sspi->regs + SYNQUACER_HSSPI_REG_TX_FIFO, in write_fifo()
217 sspi->tx_buf = buf + len; in write_fifo()
224 sspi->tx_words -= len; in write_fifo()
232 struct synquacer_spi *sspi = spi_master_get_devdata(master); in synquacer_spi_config() local
239 dev_err(sspi->dev, in synquacer_spi_config()
258 if (speed == sspi->speed && in synquacer_spi_config()
259 bus_width == sspi->bus_width && bpw == sspi->bpw && in synquacer_spi_config()
260 mode == sspi->mode && cs == sspi->cs && in synquacer_spi_config()
261 transfer_mode == sspi->transfer_mode) { in synquacer_spi_config()
265 sspi->transfer_mode = transfer_mode; in synquacer_spi_config()
270 dev_err(sspi->dev, "Requested rate too low (%u)\n", in synquacer_spi_config()
271 sspi->speed); in synquacer_spi_config()
275 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_PCC(cs)); in synquacer_spi_config()
304 if (sspi->aces) in synquacer_spi_config()
309 if (sspi->rtm) in synquacer_spi_config()
321 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_PCC(cs)); in synquacer_spi_config()
323 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_FIFOCFG); in synquacer_spi_config()
327 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_FIFOCFG); in synquacer_spi_config()
329 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_config()
342 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_config()
344 sspi->bpw = bpw; in synquacer_spi_config()
345 sspi->mode = mode; in synquacer_spi_config()
346 sspi->speed = speed; in synquacer_spi_config()
347 sspi->cs = spi->chip_select; in synquacer_spi_config()
348 sspi->bus_width = bus_width; in synquacer_spi_config()
357 struct synquacer_spi *sspi = spi_master_get_devdata(master); in synquacer_spi_transfer_one() local
364 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_transfer_one()
366 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_transfer_one()
368 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_FIFOCFG); in synquacer_spi_transfer_one()
371 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_FIFOCFG); in synquacer_spi_transfer_one()
389 reinit_completion(&sspi->transfer_done); in synquacer_spi_transfer_one()
391 sspi->tx_buf = xfer->tx_buf; in synquacer_spi_transfer_one()
392 sspi->rx_buf = xfer->rx_buf; in synquacer_spi_transfer_one()
394 switch (sspi->bpw) { in synquacer_spi_transfer_one()
407 dev_err(sspi->dev, "unsupported bpw: %d\n", sspi->bpw); in synquacer_spi_transfer_one()
412 sspi->tx_words = words; in synquacer_spi_transfer_one()
414 sspi->tx_words = 0; in synquacer_spi_transfer_one()
417 sspi->rx_words = words; in synquacer_spi_transfer_one()
419 sspi->rx_words = 0; in synquacer_spi_transfer_one()
422 status = write_fifo(sspi); in synquacer_spi_transfer_one()
424 dev_err(sspi->dev, "failed write_fifo. status: 0x%x\n", in synquacer_spi_transfer_one()
431 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_FIFOCFG); in synquacer_spi_transfer_one()
434 val |= ((sspi->rx_words > SYNQUACER_HSSPI_FIFO_DEPTH ? in synquacer_spi_transfer_one()
435 SYNQUACER_HSSPI_FIFO_RX_THRESHOLD : sspi->rx_words) << in synquacer_spi_transfer_one()
437 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_FIFOCFG); in synquacer_spi_transfer_one()
440 writel(~0, sspi->regs + SYNQUACER_HSSPI_REG_TXC); in synquacer_spi_transfer_one()
441 writel(~0, sspi->regs + SYNQUACER_HSSPI_REG_RXC); in synquacer_spi_transfer_one()
444 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_transfer_one()
446 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_transfer_one()
450 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_TXE); in synquacer_spi_transfer_one()
451 status = wait_for_completion_timeout(&sspi->transfer_done, in synquacer_spi_transfer_one()
453 writel(0, sspi->regs + SYNQUACER_HSSPI_REG_TXE); in synquacer_spi_transfer_one()
461 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_RXE); in synquacer_spi_transfer_one()
462 status = wait_for_completion_timeout(&sspi->transfer_done, in synquacer_spi_transfer_one()
464 writel(0, sspi->regs + SYNQUACER_HSSPI_REG_RXE); in synquacer_spi_transfer_one()
467 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_transfer_one()
469 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_transfer_one()
470 sspi->rx_buf = buf; in synquacer_spi_transfer_one()
471 sspi->rx_words = SYNQUACER_HSSPI_FIFO_DEPTH; in synquacer_spi_transfer_one()
472 read_fifo(sspi); in synquacer_spi_transfer_one()
476 dev_err(sspi->dev, "failed to transfer. status: 0x%x\n", in synquacer_spi_transfer_one()
486 struct synquacer_spi *sspi = spi_master_get_devdata(spi->master); in synquacer_spi_set_cs() local
489 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_set_cs()
497 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_set_cs()
500 static int synquacer_spi_wait_status_update(struct synquacer_spi *sspi, in synquacer_spi_wait_status_update() argument
509 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_MCTRL) & in synquacer_spi_wait_status_update()
517 dev_err(sspi->dev, "timeout occurs in updating Module Enable Status\n"); in synquacer_spi_wait_status_update()
525 struct synquacer_spi *sspi = spi_master_get_devdata(master); in synquacer_spi_enable() local
528 writel(0, sspi->regs + SYNQUACER_HSSPI_REG_MCTRL); in synquacer_spi_enable()
529 status = synquacer_spi_wait_status_update(sspi, false); in synquacer_spi_enable()
533 writel(0, sspi->regs + SYNQUACER_HSSPI_REG_TXE); in synquacer_spi_enable()
534 writel(0, sspi->regs + SYNQUACER_HSSPI_REG_RXE); in synquacer_spi_enable()
535 writel(~0, sspi->regs + SYNQUACER_HSSPI_REG_TXC); in synquacer_spi_enable()
536 writel(~0, sspi->regs + SYNQUACER_HSSPI_REG_RXC); in synquacer_spi_enable()
537 writel(~0, sspi->regs + SYNQUACER_HSSPI_REG_FAULTC); in synquacer_spi_enable()
539 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMCFG); in synquacer_spi_enable()
542 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMCFG); in synquacer_spi_enable()
544 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_MCTRL); in synquacer_spi_enable()
545 if (sspi->clk_src_type == SYNQUACER_HSSPI_CLOCK_SRC_IPCLK) in synquacer_spi_enable()
555 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_MCTRL); in synquacer_spi_enable()
556 status = synquacer_spi_wait_status_update(sspi, true); in synquacer_spi_enable()
566 struct synquacer_spi *sspi = priv; in sq_spi_rx_handler() local
568 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_RXF); in sq_spi_rx_handler()
571 read_fifo(sspi); in sq_spi_rx_handler()
573 if (sspi->rx_words == 0) { in sq_spi_rx_handler()
574 writel(0, sspi->regs + SYNQUACER_HSSPI_REG_RXE); in sq_spi_rx_handler()
575 complete(&sspi->transfer_done); in sq_spi_rx_handler()
586 struct synquacer_spi *sspi = priv; in sq_spi_tx_handler() local
588 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_TXF); in sq_spi_tx_handler()
590 if (sspi->tx_words == 0) { in sq_spi_tx_handler()
591 writel(0, sspi->regs + SYNQUACER_HSSPI_REG_TXE); in sq_spi_tx_handler()
592 complete(&sspi->transfer_done); in sq_spi_tx_handler()
594 write_fifo(sspi); in sq_spi_tx_handler()
606 struct synquacer_spi *sspi; in synquacer_spi_probe() local
610 master = spi_alloc_master(&pdev->dev, sizeof(*sspi)); in synquacer_spi_probe()
616 sspi = spi_master_get_devdata(master); in synquacer_spi_probe()
617 sspi->dev = &pdev->dev; in synquacer_spi_probe()
619 init_completion(&sspi->transfer_done); in synquacer_spi_probe()
621 sspi->regs = devm_platform_ioremap_resource(pdev, 0); in synquacer_spi_probe()
622 if (IS_ERR(sspi->regs)) { in synquacer_spi_probe()
623 ret = PTR_ERR(sspi->regs); in synquacer_spi_probe()
627 sspi->clk_src_type = SYNQUACER_HSSPI_CLOCK_SRC_IHCLK; /* Default */ in synquacer_spi_probe()
634 sspi->clk_src_type = SYNQUACER_HSSPI_CLOCK_SRC_IHCLK; in synquacer_spi_probe()
635 sspi->clk = devm_clk_get(sspi->dev, "iHCLK"); in synquacer_spi_probe()
638 sspi->clk_src_type = SYNQUACER_HSSPI_CLOCK_SRC_IPCLK; in synquacer_spi_probe()
639 sspi->clk = devm_clk_get(sspi->dev, "iPCLK"); in synquacer_spi_probe()
646 if (IS_ERR(sspi->clk)) { in synquacer_spi_probe()
647 ret = dev_err_probe(&pdev->dev, PTR_ERR(sspi->clk), in synquacer_spi_probe()
652 ret = clk_prepare_enable(sspi->clk); in synquacer_spi_probe()
659 master->max_speed_hz = clk_get_rate(sspi->clk); in synquacer_spi_probe()
669 sspi->aces = device_property_read_bool(&pdev->dev, in synquacer_spi_probe()
671 sspi->rtm = device_property_read_bool(&pdev->dev, "socionext,use-rtm"); in synquacer_spi_probe()
680 snprintf(sspi->rx_irq_name, SYNQUACER_HSSPI_IRQ_NAME_MAX, "%s-rx", in synquacer_spi_probe()
683 0, sspi->rx_irq_name, sspi); in synquacer_spi_probe()
694 snprintf(sspi->tx_irq_name, SYNQUACER_HSSPI_IRQ_NAME_MAX, "%s-tx", in synquacer_spi_probe()
697 0, sspi->tx_irq_name, sspi); in synquacer_spi_probe()
720 pm_runtime_set_active(sspi->dev); in synquacer_spi_probe()
721 pm_runtime_enable(sspi->dev); in synquacer_spi_probe()
723 ret = devm_spi_register_master(sspi->dev, master); in synquacer_spi_probe()
730 pm_runtime_disable(sspi->dev); in synquacer_spi_probe()
732 clk_disable_unprepare(sspi->clk); in synquacer_spi_probe()
742 struct synquacer_spi *sspi = spi_master_get_devdata(master); in synquacer_spi_remove() local
744 pm_runtime_disable(sspi->dev); in synquacer_spi_remove()
746 clk_disable_unprepare(sspi->clk); in synquacer_spi_remove()
754 struct synquacer_spi *sspi = spi_master_get_devdata(master); in synquacer_spi_suspend() local
762 clk_disable_unprepare(sspi->clk); in synquacer_spi_suspend()
770 struct synquacer_spi *sspi = spi_master_get_devdata(master); in synquacer_spi_resume() local
775 sspi->speed = 0; in synquacer_spi_resume()
777 ret = clk_prepare_enable(sspi->clk); in synquacer_spi_resume()
786 clk_disable_unprepare(sspi->clk); in synquacer_spi_resume()
794 clk_disable_unprepare(sspi->clk); in synquacer_spi_resume()