Lines Matching refs:SYNQUACER_HSSPI_REG_DMSTART
36 #define SYNQUACER_HSSPI_REG_DMSTART 0x38 macro
329 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_config()
342 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_config()
364 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_transfer_one()
366 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_transfer_one()
444 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_transfer_one()
446 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_transfer_one()
467 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_transfer_one()
469 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_transfer_one()
489 val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_set_cs()
497 writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART); in synquacer_spi_set_cs()