173 	int (*reg_read)(struct qcom_swrm_ctrl *ctrl, int reg, u32 *val);
174 	int (*reg_write)(struct qcom_swrm_ctrl *ctrl, int reg, int val);
205 static int qcom_swrm_ahb_reg_read(struct qcom_swrm_ctrl *ctrl, int reg,  in qcom_swrm_ahb_reg_read()  argument
208 	struct regmap *wcd_regmap = ctrl->regmap;  in qcom_swrm_ahb_reg_read()
225 static int qcom_swrm_ahb_reg_write(struct qcom_swrm_ctrl *ctrl,  in qcom_swrm_ahb_reg_write()  argument
228 	struct regmap *wcd_regmap = ctrl->regmap;  in qcom_swrm_ahb_reg_write()
245 static int qcom_swrm_cpu_reg_read(struct qcom_swrm_ctrl *ctrl, int reg,  in qcom_swrm_cpu_reg_read()  argument
248 	*val = readl(ctrl->mmio + reg);  in qcom_swrm_cpu_reg_read()
252 static int qcom_swrm_cpu_reg_write(struct qcom_swrm_ctrl *ctrl, int reg,  in qcom_swrm_cpu_reg_write()  argument
255 	writel(val, ctrl->mmio + reg);  in qcom_swrm_cpu_reg_write()
425 static int qcom_swrm_get_alert_slave_dev_num(struct qcom_swrm_ctrl *ctrl)  in qcom_swrm_get_alert_slave_dev_num()  argument
430 	ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val);  in qcom_swrm_get_alert_slave_dev_num()
436 			ctrl->status[dev_num] = status;  in qcom_swrm_get_alert_slave_dev_num()
444 static void qcom_swrm_get_device_status(struct qcom_swrm_ctrl *ctrl)  in qcom_swrm_get_device_status()  argument
449 	ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val);  in qcom_swrm_get_device_status()
450 	ctrl->slave_status = val;  in qcom_swrm_get_device_status()
457 		ctrl->status[i] = s;  in qcom_swrm_get_device_status()
464 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_set_slave_dev_num()  local
467 	ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &status);  in qcom_swrm_set_slave_dev_num()
482 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_enumerate()  local
493 		if (!ctrl->status[i])  in qcom_swrm_enumerate()
497 		ctrl->reg_read(ctrl, SWRM_ENUMERATOR_SLAVE_DEV_ID_1(i), &val1);  in qcom_swrm_enumerate()
500 		ctrl->reg_read(ctrl, SWRM_ENUMERATOR_SLAVE_DEV_ID_2(i), &val2);  in qcom_swrm_enumerate()
526 	complete(&ctrl->enumeration);  in qcom_swrm_enumerate()
672 static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)  in qcom_swrm_init()  argument
677 	val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index);  in qcom_swrm_init()
678 	val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index);  in qcom_swrm_init()
680 	reset_control_reset(ctrl->audio_cgcr);  in qcom_swrm_init()
682 	ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);  in qcom_swrm_init()
685 	ctrl->reg_write(ctrl, SWRM_ENUMERATOR_CFG_ADDR, 1);  in qcom_swrm_init()
687 	ctrl->intr_mask = SWRM_INTERRUPT_STATUS_RMSK;  in qcom_swrm_init()
689 	ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR,  in qcom_swrm_init()
693 	ctrl->reg_read(ctrl, SWRM_MCP_CFG_ADDR, &val);  in qcom_swrm_init()
695 	ctrl->reg_write(ctrl, SWRM_MCP_CFG_ADDR, val);  in qcom_swrm_init()
697 	ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START);  in qcom_swrm_init()
699 	if (ctrl->version > 0x01050001) {  in qcom_swrm_init()
701 		ctrl->reg_write(ctrl, SWRM_CMD_FIFO_CFG_ADDR,  in qcom_swrm_init()
705 		ctrl->reg_write(ctrl, SWRM_CMD_FIFO_CFG_ADDR,  in qcom_swrm_init()
710 	ctrl->reg_write(ctrl, SWRM_COMP_CFG_ADDR,  in qcom_swrm_init()
715 	if (ctrl->mmio) {  in qcom_swrm_init()
716 		ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN,  in qcom_swrm_init()
719 	ctrl->slave_status = 0;  in qcom_swrm_init()
720 	ctrl->reg_read(ctrl, SWRM_COMP_PARAMS, &val);  in qcom_swrm_init()
721 	ctrl->rd_fifo_depth = FIELD_GET(SWRM_COMP_PARAMS_RD_FIFO_DEPTH, val);  in qcom_swrm_init()
722 	ctrl->wr_fifo_depth = FIELD_GET(SWRM_COMP_PARAMS_WR_FIFO_DEPTH, val);  in qcom_swrm_init()
730 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_xfer_msg()  local
740 			ret = qcom_swrm_cmd_fifo_rd_cmd(ctrl, msg->dev_num,  in qcom_swrm_xfer_msg()
750 			ret = qcom_swrm_cmd_fifo_wr_cmd(ctrl, msg->buf[i],  in qcom_swrm_xfer_msg()
764 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_pre_bank_switch()  local
767 	ctrl->reg_read(ctrl, reg, &val);  in qcom_swrm_pre_bank_switch()
769 	u32p_replace_bits(&val, ctrl->cols_index, SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK);  in qcom_swrm_pre_bank_switch()
770 	u32p_replace_bits(&val, ctrl->rows_index, SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK);  in qcom_swrm_pre_bank_switch()
772 	return ctrl->reg_write(ctrl, reg, val);  in qcom_swrm_pre_bank_switch()
779 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_port_params()  local
781 	return ctrl->reg_write(ctrl, SWRM_DP_BLOCK_CTRL_1(p_params->num),  in qcom_swrm_port_params()
790 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_transport_params()  local
796 	pcfg = &ctrl->pconfig[params->port_num];  in qcom_swrm_transport_params()
802 	ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
809 		ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
817 		ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
826 		ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
830 		ret = ctrl->reg_write(ctrl, reg, value);  in qcom_swrm_transport_params()
838 		ret = ctrl->reg_write(ctrl, reg, pcfg->bp_mode);  in qcom_swrm_transport_params()
850 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_port_enable()  local
853 	ctrl->reg_read(ctrl, reg, &val);  in qcom_swrm_port_enable()
860 	return ctrl->reg_write(ctrl, reg, val);  in qcom_swrm_port_enable()
876 	struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus);  in qcom_swrm_compute_params()  local
887 			pcfg = &ctrl->pconfig[p_rt->num];  in qcom_swrm_compute_params()
904 					pcfg = &ctrl->pconfig[m_port];  in qcom_swrm_compute_params()
906 					pcfg = &ctrl->pconfig[i];  in qcom_swrm_compute_params()
937 static void qcom_swrm_stream_free_ports(struct qcom_swrm_ctrl *ctrl,  in qcom_swrm_stream_free_ports()  argument
944 	mutex_lock(&ctrl->port_lock);  in qcom_swrm_stream_free_ports()
948 			port_mask = &ctrl->dout_port_mask;  in qcom_swrm_stream_free_ports()
950 			port_mask = &ctrl->din_port_mask;  in qcom_swrm_stream_free_ports()
956 	mutex_unlock(&ctrl->port_lock);  in qcom_swrm_stream_free_ports()
959 static int qcom_swrm_stream_alloc_ports(struct qcom_swrm_ctrl *ctrl,  in qcom_swrm_stream_alloc_ports()  argument
974 	mutex_lock(&ctrl->port_lock);  in qcom_swrm_stream_alloc_ports()
977 			maxport = ctrl->num_dout_ports;  in qcom_swrm_stream_alloc_ports()
978 			port_mask = &ctrl->dout_port_mask;  in qcom_swrm_stream_alloc_ports()
980 			maxport = ctrl->num_din_ports;  in qcom_swrm_stream_alloc_ports()
981 			port_mask = &ctrl->din_port_mask;  in qcom_swrm_stream_alloc_ports()
995 					dev_err(ctrl->dev, "All ports busy\n");  in qcom_swrm_stream_alloc_ports()
1017 	sdw_stream_add_master(&ctrl->bus, &sconfig, pconfig,  in qcom_swrm_stream_alloc_ports()
1025 	mutex_unlock(&ctrl->port_lock);  in qcom_swrm_stream_alloc_ports()
1034 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev);  in qcom_swrm_hw_params()  local
1035 	struct sdw_stream_runtime *sruntime = ctrl->sruntime[dai->id];  in qcom_swrm_hw_params()
1038 	ret = qcom_swrm_stream_alloc_ports(ctrl, sruntime, params,  in qcom_swrm_hw_params()
1041 		qcom_swrm_stream_free_ports(ctrl, sruntime);  in qcom_swrm_hw_params()
1049 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev);  in qcom_swrm_hw_free()  local
1050 	struct sdw_stream_runtime *sruntime = ctrl->sruntime[dai->id];  in qcom_swrm_hw_free()
1052 	qcom_swrm_stream_free_ports(ctrl, sruntime);  in qcom_swrm_hw_free()
1053 	sdw_stream_remove_master(&ctrl->bus, sruntime);  in qcom_swrm_hw_free()
1061 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev);  in qcom_swrm_set_sdw_stream()  local
1063 	ctrl->sruntime[dai->id] = stream;  in qcom_swrm_set_sdw_stream()
1070 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev);  in qcom_swrm_get_sdw_stream()  local
1072 	return ctrl->sruntime[dai->id];  in qcom_swrm_get_sdw_stream()
1078 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev);  in qcom_swrm_startup()  local
1084 	ret = pm_runtime_resume_and_get(ctrl->dev);  in qcom_swrm_startup()
1086 		dev_err_ratelimited(ctrl->dev,  in qcom_swrm_startup()
1096 	ctrl->sruntime[dai->id] = sruntime;  in qcom_swrm_startup()
1115 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev);  in qcom_swrm_shutdown()  local
1117 	sdw_release_stream(ctrl->sruntime[dai->id]);  in qcom_swrm_shutdown()
1118 	ctrl->sruntime[dai->id] = NULL;  in qcom_swrm_shutdown()
1119 	pm_runtime_mark_last_busy(ctrl->dev);  in qcom_swrm_shutdown()
1120 	pm_runtime_put_autosuspend(ctrl->dev);  in qcom_swrm_shutdown()
1137 static int qcom_swrm_register_dais(struct qcom_swrm_ctrl *ctrl)  in qcom_swrm_register_dais()  argument
1139 	int num_dais = ctrl->num_dout_ports + ctrl->num_din_ports;  in qcom_swrm_register_dais()
1142 	struct device *dev = ctrl->dev;  in qcom_swrm_register_dais()
1155 		if (i < ctrl->num_dout_ports)  in qcom_swrm_register_dais()
1169 	return devm_snd_soc_register_component(ctrl->dev,  in qcom_swrm_register_dais()
1174 static int qcom_swrm_get_port_config(struct qcom_swrm_ctrl *ctrl)  in qcom_swrm_get_port_config()  argument
1176 	struct device_node *np = ctrl->dev->of_node;  in qcom_swrm_get_port_config()
1188 	ctrl->reg_read(ctrl, SWRM_COMP_PARAMS, &val);  in qcom_swrm_get_port_config()
1190 	ctrl->num_dout_ports = FIELD_GET(SWRM_COMP_PARAMS_DOUT_PORTS_MASK, val);  in qcom_swrm_get_port_config()
1191 	ctrl->num_din_ports = FIELD_GET(SWRM_COMP_PARAMS_DIN_PORTS_MASK, val);  in qcom_swrm_get_port_config()
1197 	if (val > ctrl->num_din_ports)  in qcom_swrm_get_port_config()
1200 	ctrl->num_din_ports = val;  in qcom_swrm_get_port_config()
1206 	if (val > ctrl->num_dout_ports)  in qcom_swrm_get_port_config()
1209 	ctrl->num_dout_ports = val;  in qcom_swrm_get_port_config()
1211 	nports = ctrl->num_dout_ports + ctrl->num_din_ports;  in qcom_swrm_get_port_config()
1213 	set_bit(0, &ctrl->dout_port_mask);  in qcom_swrm_get_port_config()
1214 	set_bit(0, &ctrl->din_port_mask);  in qcom_swrm_get_port_config()
1234 		if (ctrl->version <= 0x01030000)  in qcom_swrm_get_port_config()
1257 		ctrl->pconfig[i + 1].si = si[i];  in qcom_swrm_get_port_config()
1258 		ctrl->pconfig[i + 1].off1 = off1[i];  in qcom_swrm_get_port_config()
1259 		ctrl->pconfig[i + 1].off2 = off2[i];  in qcom_swrm_get_port_config()
1260 		ctrl->pconfig[i + 1].bp_mode = bp_mode[i];  in qcom_swrm_get_port_config()
1261 		ctrl->pconfig[i + 1].hstart = hstart[i];  in qcom_swrm_get_port_config()
1262 		ctrl->pconfig[i + 1].hstop = hstop[i];  in qcom_swrm_get_port_config()
1263 		ctrl->pconfig[i + 1].word_length = word_length[i];  in qcom_swrm_get_port_config()
1264 		ctrl->pconfig[i + 1].blk_group_count = blk_group_count[i];  in qcom_swrm_get_port_config()
1265 		ctrl->pconfig[i + 1].lane_control = lane_control[i];  in qcom_swrm_get_port_config()
1303 	struct qcom_swrm_ctrl *ctrl;  local
1308 	ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
1309 	if (!ctrl)
1313 	ctrl->rows_index = sdw_find_row_index(data->default_rows);
1314 	ctrl->cols_index = sdw_find_col_index(data->default_cols);
1320 		ctrl->reg_read = qcom_swrm_ahb_reg_read;
1321 		ctrl->reg_write = qcom_swrm_ahb_reg_write;
1322 		ctrl->regmap = dev_get_regmap(dev->parent, NULL);
1323 		if (!ctrl->regmap)
1326 		ctrl->reg_read = qcom_swrm_cpu_reg_read;
1327 		ctrl->reg_write = qcom_swrm_cpu_reg_write;
1328 		ctrl->mmio = devm_platform_ioremap_resource(pdev, 0);
1329 		if (IS_ERR(ctrl->mmio))
1330 			return PTR_ERR(ctrl->mmio);
1334 		ctrl->audio_cgcr = devm_reset_control_get_exclusive(dev, "swr_audio_cgcr");
1335 		if (IS_ERR_OR_NULL(ctrl->audio_cgcr)) {
1337 			ret = PTR_ERR(ctrl->audio_cgcr);
1342 	ctrl->irq = of_irq_get(dev->of_node, 0);
1343 	if (ctrl->irq < 0) {
1344 		ret = ctrl->irq;
1348 	ctrl->hclk = devm_clk_get(dev, "iface");
1349 	if (IS_ERR(ctrl->hclk)) {
1350 		ret = PTR_ERR(ctrl->hclk);
1354 	clk_prepare_enable(ctrl->hclk);
1356 	ctrl->dev = dev;
1357 	dev_set_drvdata(&pdev->dev, ctrl);
1358 	mutex_init(&ctrl->port_lock);
1359 	init_completion(&ctrl->broadcast);
1360 	init_completion(&ctrl->enumeration);
1362 	ctrl->bus.ops = &qcom_swrm_ops;
1363 	ctrl->bus.port_ops = &qcom_swrm_port_ops;
1364 	ctrl->bus.compute_params = &qcom_swrm_compute_params;
1365 	ctrl->bus.clk_stop_timeout = 300;
1367 	ret = qcom_swrm_get_port_config(ctrl);
1371 	params = &ctrl->bus.params;
1376 	ctrl->reg_read(ctrl, SWRM_MCP_STATUS, &val);
1380 	prop = &ctrl->bus.prop;
1388 	ctrl->reg_read(ctrl, SWRM_COMP_HW_VERSION, &ctrl->version);
1390 	ret = devm_request_threaded_irq(dev, ctrl->irq, NULL,
1394 					"soundwire", ctrl);
1400 	ctrl->wake_irq = of_irq_get(dev->of_node, 1);
1401 	if (ctrl->wake_irq > 0) {
1402 		ret = devm_request_threaded_irq(dev, ctrl->wake_irq, NULL,
1405 						"swr_wake_irq", ctrl);
1412 	ret = sdw_bus_master_add(&ctrl->bus, dev, dev->fwnode);
1419 	qcom_swrm_init(ctrl);
1420 	wait_for_completion_timeout(&ctrl->enumeration,
1422 	ret = qcom_swrm_register_dais(ctrl);
1427 		 (ctrl->version >> 24) & 0xff, (ctrl->version >> 16) & 0xff,
1428 		 ctrl->version & 0xffff);
1437 	if (ctrl->version <= 0x01030000) {
1438 		ctrl->clock_stop_not_supported = true;
1440 		ctrl->reg_read(ctrl, SWRM_COMP_MASTER_ID, &val);
1442 			ctrl->clock_stop_not_supported = true;
1446 	ctrl->debugfs = debugfs_create_dir("qualcomm-sdw", ctrl->bus.debugfs);
1447 	debugfs_create_file("qualcomm-registers", 0400, ctrl->debugfs, ctrl,
1454 	sdw_bus_master_delete(&ctrl->bus);
1456 	clk_disable_unprepare(ctrl->hclk);
1463 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(&pdev->dev);  local
1465 	sdw_bus_master_delete(&ctrl->bus);
1466 	clk_disable_unprepare(ctrl->hclk);
1493 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);  local
1496 	if (ctrl->wake_irq > 0) {
1497 		if (!irqd_irq_disabled(irq_get_irq_data(ctrl->wake_irq)))
1498 			disable_irq_nosync(ctrl->wake_irq);
1501 	clk_prepare_enable(ctrl->hclk);
1503 	if (ctrl->clock_stop_not_supported) {
1504 		reinit_completion(&ctrl->enumeration);
1505 		ctrl->reg_write(ctrl, SWRM_COMP_SW_RESET, 0x01);
1508 		qcom_swrm_init(ctrl);
1511 		if (!swrm_wait_for_frame_gen_enabled(ctrl))
1512 			dev_err(ctrl->dev, "link failed to connect\n");
1515 		wait_for_completion_timeout(&ctrl->enumeration,
1517 		qcom_swrm_get_device_status(ctrl);
1518 		sdw_handle_slave_status(&ctrl->bus, ctrl->status);
1520 		reset_control_reset(ctrl->audio_cgcr);
1522 		ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START);
1523 		ctrl->reg_write(ctrl, SWRM_INTERRUPT_CLEAR,
1526 		ctrl->intr_mask |= SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
1527 		ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
1528 		ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
1531 		if (!swrm_wait_for_frame_gen_enabled(ctrl))
1532 			dev_err(ctrl->dev, "link failed to connect\n");
1534 		ret = sdw_bus_exit_clk_stop(&ctrl->bus);
1536 			dev_err(ctrl->dev, "bus failed to exit clock stop %d\n", ret);
1544 	struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);  local
1547 	if (!ctrl->clock_stop_not_supported) {
1549 		ctrl->intr_mask &= ~SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
1550 		ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
1551 		ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
1553 		ret = sdw_bus_prep_clk_stop(&ctrl->bus);
1559 		ret = sdw_bus_clk_stop(&ctrl->bus);
1566 	clk_disable_unprepare(ctrl->hclk);
1570 	if (ctrl->wake_irq > 0) {
1571 		if (irqd_irq_disabled(irq_get_irq_data(ctrl->wake_irq)))
1572 			enable_irq(ctrl->wake_irq);