487 static void tegra_pmc_writel(struct tegra_pmc *pmc, u32 value,  in tegra_pmc_writel()  function
520 		tegra_pmc_writel(pmc, value, offset);  in tegra_pmc_scratch_writel()
579 		tegra_pmc_writel(pmc, PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE);  in tegra20_powergate_set()
606 	tegra_pmc_writel(pmc, PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE);  in tegra114_powergate_set()
664 			tegra_pmc_writel(pmc, 0, GPU_RG_CNTRL);  in __tegra_powergate_remove_clamping()
680 	tegra_pmc_writel(pmc, mask, REMOVE_CLAMPING);  in __tegra_powergate_remove_clamping()
1124 	tegra_pmc_writel(pmc, value, PMC_CNTRL);  in tegra_pmc_restart()
1144 		tegra_pmc_writel(pmc, go_to_charger_mode, PMC_SCRATCH37);  in tegra_pmc_power_off_handler()
1591 		tegra_pmc_writel(pmc, DPD_SAMPLE_ENABLE, DPD_SAMPLE);  in tegra_io_pad_prepare()
1596 		tegra_pmc_writel(pmc, value, SEL_DPD_TIM);  in tegra_io_pad_prepare()
1623 		tegra_pmc_writel(pmc, DPD_SAMPLE_DISABLE, DPD_SAMPLE);  in tegra_io_pad_unprepare()
1646 	tegra_pmc_writel(pmc, IO_DPD_REQ_CODE_OFF | mask, request);  in tegra_io_pad_power_enable()
1682 	tegra_pmc_writel(pmc, IO_DPD_REQ_CODE_ON | mask, request);  in tegra_io_pad_power_disable()
1737 		tegra_pmc_writel(pmc, value, PMC_IMPL_E_33V_PWR);  in tegra_io_pad_set_voltage()
1742 		tegra_pmc_writel(pmc, value, PMC_PWR_DET);  in tegra_io_pad_set_voltage()
1752 		tegra_pmc_writel(pmc, value, PMC_PWR_DET_VALUE);  in tegra_io_pad_set_voltage()
1847 	tegra_pmc_writel(pmc, ticks, PMC_CPUPWRGOOD_TIMER);  in tegra_pmc_enter_suspend_mode()
1851 	tegra_pmc_writel(pmc, ticks, PMC_CPUPWROFF_TIMER);  in tegra_pmc_enter_suspend_mode()
1856 	tegra_pmc_writel(pmc, value, PMC_CNTRL);  in tegra_pmc_enter_suspend_mode()
1981 	tegra_pmc_writel(pmc, value, PMC_SENSOR_CTRL);  in tegra_pmc_init_tsense_reset()
1985 	tegra_pmc_writel(pmc, value, PMC_SCRATCH54);  in tegra_pmc_init_tsense_reset()
2003 	tegra_pmc_writel(pmc, value, PMC_SCRATCH55);  in tegra_pmc_init_tsense_reset()
2007 	tegra_pmc_writel(pmc, value, PMC_SENSOR_CTRL);  in tegra_pmc_init_tsense_reset()
2324 	tegra_pmc_writel(pmc, 0, PMC_SW_WAKE_STATUS);  in tegra210_pmc_irq_set_wake()
2325 	tegra_pmc_writel(pmc, 0, PMC_SW_WAKE2_STATUS);  in tegra210_pmc_irq_set_wake()
2327 	tegra_pmc_writel(pmc, 0, PMC_WAKE_STATUS);  in tegra210_pmc_irq_set_wake()
2328 	tegra_pmc_writel(pmc, 0, PMC_WAKE2_STATUS);  in tegra210_pmc_irq_set_wake()
2343 	tegra_pmc_writel(pmc, value, offset);  in tegra210_pmc_irq_set_wake()
2383 	tegra_pmc_writel(pmc, value, offset);  in tegra210_pmc_irq_set_type()
2560 	tegra_pmc_writel(pmc, val, clk->offs);  in pmc_clk_mux_set_parent()
2582 	tegra_pmc_writel(pmc, val, offs);  in pmc_clk_set_state()
2745 		tegra_pmc_writel(pmc, 0x0, PMC_BLINK_TIMER);  in tegra_pmc_clock_register()
2814 	tegra_pmc_writel(pmc, value, offset);  in tegra_pmc_regmap_writel()
3023 	tegra_pmc_writel(pmc, virt_to_phys(tegra_resume), PMC_SCRATCH41);  in tegra_pmc_suspend()
3032 	tegra_pmc_writel(pmc, 0x0, PMC_SCRATCH41);  in tegra_pmc_resume()
3071 	tegra_pmc_writel(pmc, value, PMC_CNTRL);  in tegra20_pmc_init()
3086 	tegra_pmc_writel(pmc, value, PMC_CNTRL);  in tegra20_pmc_init()
3091 	tegra_pmc_writel(pmc, value, PMC_CNTRL);  in tegra20_pmc_init()
3098 		tegra_pmc_writel(pmc, ((osc << 8) & 0xff00) | (pmu & 0xff),  in tegra20_pmc_init()
3100 		tegra_pmc_writel(pmc, off, PMC_COREPWROFF_TIMER);  in tegra20_pmc_init()
3117 	tegra_pmc_writel(pmc, value, PMC_CNTRL);  in tegra20_pmc_setup_irq_polarity()