309 		reg_val = readw(&ha->reg->ctrl_status);  in qla4xxx_isp_check_reg()
4660 	uint32_t ctrl_status;  in qla4xxx_hw_reset()  local
4674 	ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4675 	if ((ctrl_status & CSR_SCSI_RESET_INTR) != 0)  in qla4xxx_hw_reset()
4676 		writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4679 	writel(set_rmask(CSR_SOFT_RESET), &ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4680 	readl(&ha->reg->ctrl_status);  in qla4xxx_hw_reset()
4695 	uint32_t ctrl_status;  in qla4xxx_soft_reset()  local
4706 		ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4709 		if ((ctrl_status & CSR_NET_RESET_INTR) == 0)  in qla4xxx_soft_reset()
4715 	if ((ctrl_status & CSR_NET_RESET_INTR) != 0) {  in qla4xxx_soft_reset()
4721 		writel(set_rmask(CSR_NET_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4722 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4730 		ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4733 		if ((ctrl_status & CSR_SOFT_RESET) == 0) {  in qla4xxx_soft_reset()
4746 	ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4747 	if ((ctrl_status & CSR_SCSI_RESET_INTR) != 0) {  in qla4xxx_soft_reset()
4748 		writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4749 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4762 		writel(set_rmask(CSR_FORCE_SOFT_RESET), &ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4763 		readl(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4769 			ctrl_status = readw(&ha->reg->ctrl_status);  in qla4xxx_soft_reset()
4772 			if ((ctrl_status & CSR_FORCE_SOFT_RESET) == 0) {  in qla4xxx_soft_reset()
5399 			while ((readw(&ha->reg->ctrl_status) &  in qla4xxx_do_dpc()
5476 		       &ha->reg->ctrl_status);  in qla4xxx_free_adapter()
5477 		readl(&ha->reg->ctrl_status);  in qla4xxx_free_adapter()